ethdev: get DCB information
This patch adds one new API to get dcb related info. rte_eth_dev_get_dcb_info Signed-off-by: Jingjing Wu <jingjing.wu@intel.com> Acked-by: Jijiang Liu <jijiang.liu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
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@ -247,6 +247,8 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
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enum rte_filter_type filter_type,
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enum rte_filter_op filter_op,
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void *arg);
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static int i40e_dev_get_dcb_info(struct rte_eth_dev *dev,
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struct rte_eth_dcb_info *dcb_info);
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static void i40e_configure_registers(struct i40e_hw *hw);
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static void i40e_hw_init(struct i40e_hw *hw);
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static int i40e_config_qinq(struct i40e_hw *hw, struct i40e_vsi *vsi);
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@ -320,6 +322,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
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.timesync_disable = i40e_timesync_disable,
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.timesync_read_rx_timestamp = i40e_timesync_read_rx_timestamp,
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.timesync_read_tx_timestamp = i40e_timesync_read_tx_timestamp,
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.get_dcb_info = i40e_dev_get_dcb_info,
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};
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static struct eth_driver rte_i40e_pmd = {
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@ -7016,3 +7019,42 @@ i40e_dcb_setup(struct rte_eth_dev *dev)
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}
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return 0;
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}
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static int
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i40e_dev_get_dcb_info(struct rte_eth_dev *dev,
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struct rte_eth_dcb_info *dcb_info)
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{
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struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
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struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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struct i40e_vsi *vsi = pf->main_vsi;
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struct i40e_dcbx_config *dcb_cfg = &hw->local_dcbx_config;
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uint16_t bsf, tc_mapping;
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int i;
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if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)
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dcb_info->nb_tcs = rte_bsf32(vsi->enabled_tc + 1);
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else
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dcb_info->nb_tcs = 1;
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for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
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dcb_info->prio_tc[i] = dcb_cfg->etscfg.prioritytable[i];
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for (i = 0; i < dcb_info->nb_tcs; i++)
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dcb_info->tc_bws[i] = dcb_cfg->etscfg.tcbwtable[i];
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for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
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if (vsi->enabled_tc & (1 << i)) {
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tc_mapping = rte_le_to_cpu_16(vsi->info.tc_mapping[i]);
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/* only main vsi support multi TCs */
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dcb_info->tc_queue.tc_rxq[0][i].base =
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(tc_mapping & I40E_AQ_VSI_TC_QUE_OFFSET_MASK) >>
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I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT;
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dcb_info->tc_queue.tc_txq[0][i].base =
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dcb_info->tc_queue.tc_rxq[0][i].base;
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bsf = (tc_mapping & I40E_AQ_VSI_TC_QUE_NUMBER_MASK) >>
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I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT;
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dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 1 << bsf;
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dcb_info->tc_queue.tc_txq[0][i].nb_queue =
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dcb_info->tc_queue.tc_rxq[0][i].nb_queue;
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}
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}
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return 0;
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}
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@ -304,6 +304,8 @@ static int ixgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu);
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static int ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
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struct ether_addr *mc_addr_set,
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uint32_t nb_mc_addr);
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static int ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,
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struct rte_eth_dcb_info *dcb_info);
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static int ixgbe_get_reg_length(struct rte_eth_dev *dev);
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static int ixgbe_get_regs(struct rte_eth_dev *dev,
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@ -465,6 +467,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
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.get_eeprom_length = ixgbe_get_eeprom_length,
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.get_eeprom = ixgbe_get_eeprom,
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.set_eeprom = ixgbe_set_eeprom,
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.get_dcb_info = ixgbe_dev_get_dcb_info,
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};
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/*
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@ -5734,6 +5737,82 @@ ixgbe_rss_update_sp(enum ixgbe_mac_type mac_type) {
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}
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}
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static int
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ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,
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struct rte_eth_dcb_info *dcb_info)
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{
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struct ixgbe_dcb_config *dcb_config =
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IXGBE_DEV_PRIVATE_TO_DCB_CFG(dev->data->dev_private);
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struct ixgbe_dcb_tc_config *tc;
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uint8_t i, j;
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if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)
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dcb_info->nb_tcs = dcb_config->num_tcs.pg_tcs;
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else
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dcb_info->nb_tcs = 1;
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if (dcb_config->vt_mode) { /* vt is enabled*/
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struct rte_eth_vmdq_dcb_conf *vmdq_rx_conf =
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&dev->data->dev_conf.rx_adv_conf.vmdq_dcb_conf;
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for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)
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dcb_info->prio_tc[i] = vmdq_rx_conf->dcb_tc[i];
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for (i = 0; i < vmdq_rx_conf->nb_queue_pools; i++) {
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for (j = 0; j < dcb_info->nb_tcs; j++) {
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dcb_info->tc_queue.tc_rxq[i][j].base =
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i * dcb_info->nb_tcs + j;
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dcb_info->tc_queue.tc_rxq[i][j].nb_queue = 1;
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dcb_info->tc_queue.tc_txq[i][j].base =
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i * dcb_info->nb_tcs + j;
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dcb_info->tc_queue.tc_txq[i][j].nb_queue = 1;
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}
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}
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} else { /* vt is disabled*/
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struct rte_eth_dcb_rx_conf *rx_conf =
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&dev->data->dev_conf.rx_adv_conf.dcb_rx_conf;
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for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)
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dcb_info->prio_tc[i] = rx_conf->dcb_tc[i];
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if (dcb_info->nb_tcs == ETH_4_TCS) {
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for (i = 0; i < dcb_info->nb_tcs; i++) {
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dcb_info->tc_queue.tc_rxq[0][i].base = i * 32;
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dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;
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}
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dcb_info->tc_queue.tc_txq[0][0].base = 0;
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dcb_info->tc_queue.tc_txq[0][1].base = 64;
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dcb_info->tc_queue.tc_txq[0][2].base = 96;
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dcb_info->tc_queue.tc_txq[0][3].base = 112;
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dcb_info->tc_queue.tc_txq[0][0].nb_queue = 64;
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dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;
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dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;
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dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;
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} else if (dcb_info->nb_tcs == ETH_8_TCS) {
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for (i = 0; i < dcb_info->nb_tcs; i++) {
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dcb_info->tc_queue.tc_rxq[0][i].base = i * 16;
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dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;
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}
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dcb_info->tc_queue.tc_txq[0][0].base = 0;
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dcb_info->tc_queue.tc_txq[0][1].base = 32;
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dcb_info->tc_queue.tc_txq[0][2].base = 64;
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dcb_info->tc_queue.tc_txq[0][3].base = 80;
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dcb_info->tc_queue.tc_txq[0][4].base = 96;
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dcb_info->tc_queue.tc_txq[0][5].base = 104;
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dcb_info->tc_queue.tc_txq[0][6].base = 112;
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dcb_info->tc_queue.tc_txq[0][7].base = 120;
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dcb_info->tc_queue.tc_txq[0][0].nb_queue = 32;
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dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;
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dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;
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dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;
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dcb_info->tc_queue.tc_txq[0][4].nb_queue = 8;
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dcb_info->tc_queue.tc_txq[0][5].nb_queue = 8;
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dcb_info->tc_queue.tc_txq[0][6].nb_queue = 8;
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dcb_info->tc_queue.tc_txq[0][7].nb_queue = 8;
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}
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}
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for (i = 0; i < dcb_info->nb_tcs; i++) {
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tc = &dcb_config->tc_config[i];
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dcb_info->tc_bws[i] = tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent;
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}
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return 0;
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}
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static struct rte_driver rte_ixgbe_driver = {
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.type = PMD_PDEV,
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@ -3143,3 +3143,21 @@ rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
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FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
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return (*dev->dev_ops->set_eeprom)(dev, info);
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}
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int
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rte_eth_dev_get_dcb_info(uint8_t port_id,
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struct rte_eth_dcb_info *dcb_info)
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{
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struct rte_eth_dev *dev;
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if (!rte_eth_dev_is_valid_port(port_id)) {
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PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
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return -ENODEV;
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}
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dev = &rte_eth_devices[port_id];
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memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
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FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
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return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
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}
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@ -854,6 +854,38 @@ struct rte_eth_xstats {
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uint64_t value;
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};
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#define ETH_DCB_NUM_TCS 8
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#define ETH_MAX_VMDQ_POOL 64
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/**
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* A structure used to get the information of queue and
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* TC mapping on both TX and RX paths.
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*/
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struct rte_eth_dcb_tc_queue_mapping {
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/** rx queues assigned to tc per Pool */
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struct {
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uint8_t base;
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uint8_t nb_queue;
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} tc_rxq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
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/** rx queues assigned to tc per Pool */
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struct {
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uint8_t base;
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uint8_t nb_queue;
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} tc_txq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
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};
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/**
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* A structure used to get the information of DCB.
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* It includes TC UP mapping and queue TC mapping.
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*/
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struct rte_eth_dcb_info {
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uint8_t nb_tcs; /**< number of TCs */
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uint8_t prio_tc[ETH_DCB_NUM_USER_PRIORITIES]; /**< Priority to tc */
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uint8_t tc_bws[ETH_DCB_NUM_TCS]; /**< TX BW percentage for each TC */
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/** rx queues assigned to tc */
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struct rte_eth_dcb_tc_queue_mapping tc_queue;
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};
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struct rte_eth_dev;
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struct rte_eth_dev_callback;
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@ -1207,6 +1239,10 @@ typedef int (*eth_filter_ctrl_t)(struct rte_eth_dev *dev,
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void *arg);
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/**< @internal Take operations to assigned filter type on an Ethernet device */
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typedef int (*eth_get_dcb_info)(struct rte_eth_dev *dev,
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struct rte_eth_dcb_info *dcb_info);
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/**< @internal Get dcb information on an Ethernet device */
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/**
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* @internal A structure containing the functions exported by an Ethernet driver.
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*/
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@ -1312,6 +1348,9 @@ struct eth_dev_ops {
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eth_timesync_read_rx_timestamp_t timesync_read_rx_timestamp;
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/** Read the IEEE1588/802.1AS TX timestamp. */
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eth_timesync_read_tx_timestamp_t timesync_read_tx_timestamp;
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/** Get DCB information */
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eth_get_dcb_info get_dcb_info;
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};
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/**
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@ -3320,6 +3359,21 @@ int rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_ty
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int rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
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enum rte_filter_op filter_op, void *arg);
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/**
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* Get DCB information on an Ethernet device.
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*
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* @param port_id
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* The port identifier of the Ethernet device.
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* @param dcb_info
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* dcb information.
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* @return
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* - (0) if successful.
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* - (-ENODEV) if port identifier is invalid.
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* - (-ENOTSUP) if hardware doesn't support.
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*/
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int rte_eth_dev_get_dcb_info(uint8_t port_id,
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struct rte_eth_dcb_info *dcb_info);
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/**
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* Add a callback to be called on packet RX on a given port and queue.
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*
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@ -127,3 +127,10 @@ DPDK_2.1 {
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rte_eth_timesync_read_tx_timestamp;
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} DPDK_2.0;
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DPDK_2.2 {
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global:
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rte_eth_dev_get_dcb_info;
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} DPDK_2.1;
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