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net/sfc/base: import PHY flags control

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EFSYS_OPT_PHY_FLAGS should be enabled to use it.

From Solarflare Communications Inc.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This commit is contained in:
Andrew Rybchenko 2016-11-29 16:18:47 +00:00 committed by Ferruh Yigit
parent 7243cc0869
commit 8bc0b2bd78
6 changed files with 24 additions and 0 deletions
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4
drivers/net/sfc/base/ef10_phy.c
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@ -293,7 +293,11 @@ ef10_phy_reconfigure(
speed = 0; speed = 0;
MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed); MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
#if EFSYS_OPT_PHY_FLAGS
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
#else
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0); MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
#endif /* EFSYS_OPT_PHY_FLAGS */
efx_mcdi_execute(enp, &req); efx_mcdi_execute(enp, &req);

3
drivers/net/sfc/base/efx.h
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@ -668,6 +668,9 @@ typedef struct efx_nic_cfg_s {
uint32_t enc_rx_prefix_size; uint32_t enc_rx_prefix_size;
uint32_t enc_rx_buf_align_start; uint32_t enc_rx_buf_align_start;
uint32_t enc_rx_buf_align_end; uint32_t enc_rx_buf_align_end;
#if EFSYS_OPT_PHY_FLAGS
uint32_t enc_phy_flags_mask;
#endif /* EFSYS_OPT_PHY_FLAGS */
#if EFSYS_OPT_MCDI #if EFSYS_OPT_MCDI
uint8_t enc_mcdi_mdio_channel; uint8_t enc_mcdi_mdio_channel;
#endif /* EFSYS_OPT_MCDI */ #endif /* EFSYS_OPT_MCDI */

7
drivers/net/sfc/base/efx_check.h
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@ -166,6 +166,13 @@
# error "PHY_BIST is obsolete (replaced by BIST)." # error "PHY_BIST is obsolete (replaced by BIST)."
#endif #endif
#if EFSYS_OPT_PHY_FLAGS
/* Support PHY flags */
# if !EFSYS_OPT_SIENA
# error "PHY_FLAGS requires SIENA"
# endif
#endif /* EFSYS_OPT_PHY_FLAGS */
#ifdef EFSYS_OPT_PHY_NULL #ifdef EFSYS_OPT_PHY_NULL
# error "PHY_NULL is obsolete and is not supported." # error "PHY_NULL is obsolete and is not supported."
#endif #endif

3
drivers/net/sfc/base/efx_impl.h
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@ -237,6 +237,9 @@ typedef struct efx_port_s {
uint8_t ep_mulcst_addr_list[EFX_MAC_ADDR_LEN * uint8_t ep_mulcst_addr_list[EFX_MAC_ADDR_LEN *
EFX_MAC_MULTICAST_LIST_MAX]; EFX_MAC_MULTICAST_LIST_MAX];
uint32_t ep_mulcst_addr_count; uint32_t ep_mulcst_addr_count;
#if EFSYS_OPT_PHY_FLAGS
uint32_t ep_phy_flags;
#endif /* EFSYS_OPT_PHY_FLAGS */
efx_phy_media_type_t ep_fixed_port_type; efx_phy_media_type_t ep_fixed_port_type;
efx_phy_media_type_t ep_module_type; efx_phy_media_type_t ep_module_type;
uint32_t ep_adv_cap_mask; uint32_t ep_adv_cap_mask;

3
drivers/net/sfc/base/efx_mcdi.c
View File

@ -1425,6 +1425,9 @@ efx_mcdi_get_phy_cfg(
epp->ep_phy_cap_mask = epp->ep_phy_cap_mask =
MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP); MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
#if EFSYS_OPT_PHY_FLAGS
encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
#endif /* EFSYS_OPT_PHY_FLAGS */
encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT); encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);

4
drivers/net/sfc/base/siena_phy.c
View File

@ -277,7 +277,11 @@ siena_phy_reconfigure(
speed = 0; speed = 0;
MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed); MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
#if EFSYS_OPT_PHY_FLAGS
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
#else
MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0); MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
#endif /* EFSYS_OPT_PHY_FLAGS */
efx_mcdi_execute(enp, &req); efx_mcdi_execute(enp, &req);