net/sfc/base: import MAC statistics
MAC statistics are either periodically (if supported/requested) or on-demand written to provided DMA-mapped memory. If periodic update is not supported (e.g. for EF10 virtual functions), it is the driver responsibility to handle it. EFSYS_OPT_MAC_STATS should be enabled to use it. From Solarflare Communications Inc. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
This commit is contained in:
Andrew Rybchenko
Ferruh Yigit
parent
b1d06c75e3
commit
8c7c723dfe
@ -1103,6 +1103,12 @@ ef10_ev_mcdi(
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break;
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case MCDI_EVENT_CODE_MAC_STATS_DMA:
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#if EFSYS_OPT_MAC_STATS
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if (eecp->eec_mac_stats != NULL) {
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eecp->eec_mac_stats(arg,
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MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
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}
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#endif
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break;
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case MCDI_EVENT_CODE_FWALERT: {
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@ -259,6 +259,23 @@ extern void
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ef10_mac_filter_default_rxq_clear(
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__in efx_nic_t *enp);
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#if EFSYS_OPT_MAC_STATS
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extern __checkReturn efx_rc_t
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ef10_mac_stats_get_mask(
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__in efx_nic_t *enp,
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__inout_bcount(mask_size) uint32_t *maskp,
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__in size_t mask_size);
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extern __checkReturn efx_rc_t
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ef10_mac_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
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__inout_opt uint32_t *generationp);
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#endif /* EFSYS_OPT_MAC_STATS */
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/* MCDI */
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@ -443,4 +443,419 @@ ef10_mac_filter_default_rxq_clear(
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}
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#if EFSYS_OPT_MAC_STATS
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__checkReturn efx_rc_t
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ef10_mac_stats_get_mask(
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__in efx_nic_t *enp,
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__inout_bcount(mask_size) uint32_t *maskp,
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__in size_t mask_size)
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{
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const struct efx_mac_stats_range ef10_common[] = {
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{ EFX_MAC_RX_OCTETS, EFX_MAC_RX_GE_15XX_PKTS },
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{ EFX_MAC_RX_FCS_ERRORS, EFX_MAC_RX_DROP_EVENTS },
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{ EFX_MAC_RX_JABBER_PKTS, EFX_MAC_RX_JABBER_PKTS },
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{ EFX_MAC_RX_NODESC_DROP_CNT, EFX_MAC_TX_PAUSE_PKTS },
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};
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const struct efx_mac_stats_range ef10_tx_size_bins[] = {
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{ EFX_MAC_TX_LE_64_PKTS, EFX_MAC_TX_GE_15XX_PKTS },
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};
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efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
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efx_port_t *epp = &(enp->en_port);
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efx_rc_t rc;
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if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
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ef10_common, EFX_ARRAY_SIZE(ef10_common))) != 0)
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goto fail1;
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if (epp->ep_phy_cap_mask & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) {
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const struct efx_mac_stats_range ef10_40g_extra[] = {
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{ EFX_MAC_RX_ALIGN_ERRORS, EFX_MAC_RX_ALIGN_ERRORS },
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};
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if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
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ef10_40g_extra, EFX_ARRAY_SIZE(ef10_40g_extra))) != 0)
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goto fail2;
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if (encp->enc_mac_stats_40g_tx_size_bins) {
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if ((rc = efx_mac_stats_mask_add_ranges(maskp,
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mask_size, ef10_tx_size_bins,
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EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
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goto fail3;
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}
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} else {
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if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
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ef10_tx_size_bins, EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
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goto fail4;
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}
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if (encp->enc_pm_and_rxdp_counters) {
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const struct efx_mac_stats_range ef10_pm_and_rxdp[] = {
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{ EFX_MAC_PM_TRUNC_BB_OVERFLOW, EFX_MAC_RXDP_HLB_WAIT },
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};
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if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
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ef10_pm_and_rxdp, EFX_ARRAY_SIZE(ef10_pm_and_rxdp))) != 0)
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goto fail5;
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}
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if (encp->enc_datapath_cap_evb) {
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const struct efx_mac_stats_range ef10_vadaptor[] = {
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{ EFX_MAC_VADAPTER_RX_UNICAST_PACKETS,
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EFX_MAC_VADAPTER_TX_OVERFLOW },
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};
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if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
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ef10_vadaptor, EFX_ARRAY_SIZE(ef10_vadaptor))) != 0)
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goto fail6;
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}
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return (0);
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fail6:
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EFSYS_PROBE(fail6);
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fail5:
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EFSYS_PROBE(fail5);
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fail4:
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EFSYS_PROBE(fail4);
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fail3:
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EFSYS_PROBE(fail3);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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#define EF10_MAC_STAT_READ(_esmp, _field, _eqp) \
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EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
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__checkReturn efx_rc_t
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ef10_mac_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
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__inout_opt uint32_t *generationp)
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{
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efx_qword_t value;
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efx_qword_t generation_start;
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efx_qword_t generation_end;
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_NOTE(ARGUNUSED(enp))
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/* Read END first so we don't race with the MC */
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EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
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&generation_end);
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EFSYS_MEM_READ_BARRIER();
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/* TX */
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
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EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
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EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
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/* RX */
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
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EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
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EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
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&(value.eq_dword[0]));
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
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&(value.eq_dword[1]));
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
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&(value.eq_dword[0]));
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
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&(value.eq_dword[1]));
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
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&(value.eq_dword[0]));
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
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&(value.eq_dword[1]));
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
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&(value.eq_dword[0]));
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EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
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&(value.eq_dword[1]));
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
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/* Packet memory (EF10 only) */
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_BB_OVERFLOW]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_BB_OVERFLOW]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_VFIFO_FULL, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_VFIFO_FULL]), &value);
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EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_VFIFO_FULL, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_VFIFO_FULL]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_QBB, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_QBB]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_QBB, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_QBB]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_MAPPING, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_MAPPING]), &value);
|
||||
|
||||
/* RX datapath */
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_Q_DISABLED_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_Q_DISABLED_PKTS]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_DI_DROPPED_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_DI_DROPPED_PKTS]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_STREAMING_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_STREAMING_PKTS]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_FETCH]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_WAIT]), &value);
|
||||
|
||||
|
||||
/* VADAPTER RX */
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_BYTES, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_BYTES]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_OVERFLOW, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_OVERFLOW]), &value);
|
||||
|
||||
/* VADAPTER TX */
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]),
|
||||
&value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_PACKETS]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_BYTES, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_BYTES]), &value);
|
||||
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value);
|
||||
|
||||
|
||||
EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
|
||||
EFSYS_MEM_READ_BARRIER();
|
||||
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
|
||||
&generation_start);
|
||||
|
||||
/* Check that we didn't read the stats in the middle of a DMA */
|
||||
/* Not a good enough check ? */
|
||||
if (memcmp(&generation_start, &generation_end,
|
||||
sizeof (generation_start)))
|
||||
return (EAGAIN);
|
||||
|
||||
if (generationp)
|
||||
*generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
|
||||
|
||||
@ -1371,10 +1371,20 @@ ef10_nic_probe(
|
||||
edcp->edc_max_piobuf_count = 0;
|
||||
edcp->edc_pio_alloc_size = 0;
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
/* Wipe the MAC statistics */
|
||||
if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0)
|
||||
goto fail5;
|
||||
#endif
|
||||
|
||||
encp->enc_features = enp->en_features;
|
||||
|
||||
return (0);
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
fail5:
|
||||
EFSYS_PROBE(fail5);
|
||||
#endif
|
||||
fail4:
|
||||
EFSYS_PROBE(fail4);
|
||||
fail3:
|
||||
|
||||
@ -326,6 +326,98 @@ efx_intr_fini(
|
||||
|
||||
/* MAC */
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
/* START MKCONFIG GENERATED EfxHeaderMacBlock e323546097fd7c65 */
|
||||
typedef enum efx_mac_stat_e {
|
||||
EFX_MAC_RX_OCTETS,
|
||||
EFX_MAC_RX_PKTS,
|
||||
EFX_MAC_RX_UNICST_PKTS,
|
||||
EFX_MAC_RX_MULTICST_PKTS,
|
||||
EFX_MAC_RX_BRDCST_PKTS,
|
||||
EFX_MAC_RX_PAUSE_PKTS,
|
||||
EFX_MAC_RX_LE_64_PKTS,
|
||||
EFX_MAC_RX_65_TO_127_PKTS,
|
||||
EFX_MAC_RX_128_TO_255_PKTS,
|
||||
EFX_MAC_RX_256_TO_511_PKTS,
|
||||
EFX_MAC_RX_512_TO_1023_PKTS,
|
||||
EFX_MAC_RX_1024_TO_15XX_PKTS,
|
||||
EFX_MAC_RX_GE_15XX_PKTS,
|
||||
EFX_MAC_RX_ERRORS,
|
||||
EFX_MAC_RX_FCS_ERRORS,
|
||||
EFX_MAC_RX_DROP_EVENTS,
|
||||
EFX_MAC_RX_FALSE_CARRIER_ERRORS,
|
||||
EFX_MAC_RX_SYMBOL_ERRORS,
|
||||
EFX_MAC_RX_ALIGN_ERRORS,
|
||||
EFX_MAC_RX_INTERNAL_ERRORS,
|
||||
EFX_MAC_RX_JABBER_PKTS,
|
||||
EFX_MAC_RX_LANE0_CHAR_ERR,
|
||||
EFX_MAC_RX_LANE1_CHAR_ERR,
|
||||
EFX_MAC_RX_LANE2_CHAR_ERR,
|
||||
EFX_MAC_RX_LANE3_CHAR_ERR,
|
||||
EFX_MAC_RX_LANE0_DISP_ERR,
|
||||
EFX_MAC_RX_LANE1_DISP_ERR,
|
||||
EFX_MAC_RX_LANE2_DISP_ERR,
|
||||
EFX_MAC_RX_LANE3_DISP_ERR,
|
||||
EFX_MAC_RX_MATCH_FAULT,
|
||||
EFX_MAC_RX_NODESC_DROP_CNT,
|
||||
EFX_MAC_TX_OCTETS,
|
||||
EFX_MAC_TX_PKTS,
|
||||
EFX_MAC_TX_UNICST_PKTS,
|
||||
EFX_MAC_TX_MULTICST_PKTS,
|
||||
EFX_MAC_TX_BRDCST_PKTS,
|
||||
EFX_MAC_TX_PAUSE_PKTS,
|
||||
EFX_MAC_TX_LE_64_PKTS,
|
||||
EFX_MAC_TX_65_TO_127_PKTS,
|
||||
EFX_MAC_TX_128_TO_255_PKTS,
|
||||
EFX_MAC_TX_256_TO_511_PKTS,
|
||||
EFX_MAC_TX_512_TO_1023_PKTS,
|
||||
EFX_MAC_TX_1024_TO_15XX_PKTS,
|
||||
EFX_MAC_TX_GE_15XX_PKTS,
|
||||
EFX_MAC_TX_ERRORS,
|
||||
EFX_MAC_TX_SGL_COL_PKTS,
|
||||
EFX_MAC_TX_MULT_COL_PKTS,
|
||||
EFX_MAC_TX_EX_COL_PKTS,
|
||||
EFX_MAC_TX_LATE_COL_PKTS,
|
||||
EFX_MAC_TX_DEF_PKTS,
|
||||
EFX_MAC_TX_EX_DEF_PKTS,
|
||||
EFX_MAC_PM_TRUNC_BB_OVERFLOW,
|
||||
EFX_MAC_PM_DISCARD_BB_OVERFLOW,
|
||||
EFX_MAC_PM_TRUNC_VFIFO_FULL,
|
||||
EFX_MAC_PM_DISCARD_VFIFO_FULL,
|
||||
EFX_MAC_PM_TRUNC_QBB,
|
||||
EFX_MAC_PM_DISCARD_QBB,
|
||||
EFX_MAC_PM_DISCARD_MAPPING,
|
||||
EFX_MAC_RXDP_Q_DISABLED_PKTS,
|
||||
EFX_MAC_RXDP_DI_DROPPED_PKTS,
|
||||
EFX_MAC_RXDP_STREAMING_PKTS,
|
||||
EFX_MAC_RXDP_HLB_FETCH,
|
||||
EFX_MAC_RXDP_HLB_WAIT,
|
||||
EFX_MAC_VADAPTER_RX_UNICAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_RX_UNICAST_BYTES,
|
||||
EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_RX_MULTICAST_BYTES,
|
||||
EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_RX_BROADCAST_BYTES,
|
||||
EFX_MAC_VADAPTER_RX_BAD_PACKETS,
|
||||
EFX_MAC_VADAPTER_RX_BAD_BYTES,
|
||||
EFX_MAC_VADAPTER_RX_OVERFLOW,
|
||||
EFX_MAC_VADAPTER_TX_UNICAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_TX_UNICAST_BYTES,
|
||||
EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_TX_MULTICAST_BYTES,
|
||||
EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS,
|
||||
EFX_MAC_VADAPTER_TX_BROADCAST_BYTES,
|
||||
EFX_MAC_VADAPTER_TX_BAD_PACKETS,
|
||||
EFX_MAC_VADAPTER_TX_BAD_BYTES,
|
||||
EFX_MAC_VADAPTER_TX_OVERFLOW,
|
||||
EFX_MAC_NSTATS
|
||||
} efx_mac_stat_t;
|
||||
|
||||
/* END MKCONFIG GENERATED EfxHeaderMacBlock */
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
typedef enum efx_link_mode_e {
|
||||
EFX_LINK_UNKNOWN = 0,
|
||||
EFX_LINK_DOWN,
|
||||
@ -431,6 +523,76 @@ efx_mac_fcntl_get(
|
||||
__out unsigned int *fcntl_linkp);
|
||||
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
#if EFSYS_OPT_NAMES
|
||||
|
||||
extern __checkReturn const char *
|
||||
efx_mac_stat_name(
|
||||
__in efx_nic_t *enp,
|
||||
__in unsigned int id);
|
||||
|
||||
#endif /* EFSYS_OPT_NAMES */
|
||||
|
||||
#define EFX_MAC_STATS_MASK_BITS_PER_PAGE (8 * sizeof (uint32_t))
|
||||
|
||||
#define EFX_MAC_STATS_MASK_NPAGES \
|
||||
(P2ROUNDUP(EFX_MAC_NSTATS, EFX_MAC_STATS_MASK_BITS_PER_PAGE) / \
|
||||
EFX_MAC_STATS_MASK_BITS_PER_PAGE)
|
||||
|
||||
/*
|
||||
* Get mask of MAC statistics supported by the hardware.
|
||||
*
|
||||
* If mask_size is insufficient to return the mask, EINVAL error is
|
||||
* returned. EFX_MAC_STATS_MASK_NPAGES multiplied by size of the page
|
||||
* (which is sizeof (uint32_t)) is sufficient.
|
||||
*/
|
||||
extern __checkReturn efx_rc_t
|
||||
efx_mac_stats_get_mask(
|
||||
__in efx_nic_t *enp,
|
||||
__out_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size);
|
||||
|
||||
#define EFX_MAC_STAT_SUPPORTED(_mask, _stat) \
|
||||
((_mask)[(_stat) / EFX_MAC_STATS_MASK_BITS_PER_PAGE] & \
|
||||
(1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1))))
|
||||
|
||||
#define EFX_MAC_STATS_SIZE 0x400
|
||||
|
||||
/*
|
||||
* Upload mac statistics supported by the hardware into the given buffer.
|
||||
*
|
||||
* The reference buffer must be at least %EFX_MAC_STATS_SIZE bytes,
|
||||
* and page aligned.
|
||||
*
|
||||
* The hardware will only DMA statistics that it understands (of course).
|
||||
* Drivers should not make any assumptions about which statistics are
|
||||
* supported, especially when the statistics are generated by firmware.
|
||||
*
|
||||
* Thus, drivers should zero this buffer before use, so that not-understood
|
||||
* statistics read back as zero.
|
||||
*/
|
||||
extern __checkReturn efx_rc_t
|
||||
efx_mac_stats_upload(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp);
|
||||
|
||||
extern __checkReturn efx_rc_t
|
||||
efx_mac_stats_periodic(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__in uint16_t period_ms,
|
||||
__in boolean_t events);
|
||||
|
||||
extern __checkReturn efx_rc_t
|
||||
efx_mac_stats_update(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
|
||||
__inout_opt uint32_t *generationp);
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
/* MON */
|
||||
|
||||
typedef enum efx_mon_type_e {
|
||||
@ -1122,6 +1284,16 @@ typedef __checkReturn boolean_t
|
||||
__in_opt void *arg,
|
||||
__in efx_link_mode_t link_mode);
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
typedef __checkReturn boolean_t
|
||||
(*efx_mac_stats_ev_t)(
|
||||
__in_opt void *arg,
|
||||
__in uint32_t generation
|
||||
);
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
typedef struct efx_ev_callbacks_s {
|
||||
efx_initialized_ev_t eec_initialized;
|
||||
efx_rx_ev_t eec_rx;
|
||||
@ -1135,6 +1307,9 @@ typedef struct efx_ev_callbacks_s {
|
||||
efx_wake_up_ev_t eec_wake_up;
|
||||
efx_timer_ev_t eec_timer;
|
||||
efx_link_change_ev_t eec_link_change;
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
efx_mac_stats_ev_t eec_mac_stats;
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
} efx_ev_callbacks_t;
|
||||
|
||||
extern __checkReturn boolean_t
|
||||
|
||||
@ -91,6 +91,13 @@
|
||||
# error "MAC_FALCON_XMAC is obsolete and is not supported."
|
||||
#endif
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
/* Support MAC statistics */
|
||||
# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
|
||||
# error "MAC_STATS requires SIENA or HUNTINGTON or MEDFORD"
|
||||
# endif
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
#if EFSYS_OPT_MCDI
|
||||
/* Support management controller messages */
|
||||
# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
|
||||
|
||||
@ -1065,6 +1065,12 @@ siena_ev_mcdi(
|
||||
break;
|
||||
|
||||
case MCDI_EVENT_CODE_MAC_STATS_DMA:
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
if (eecp->eec_mac_stats != NULL) {
|
||||
eecp->eec_mac_stats(arg,
|
||||
MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
|
||||
case MCDI_EVENT_CODE_FWALERT: {
|
||||
|
||||
@ -174,6 +174,14 @@ typedef struct efx_mac_ops_s {
|
||||
efx_rc_t (*emo_filter_default_rxq_set)(efx_nic_t *,
|
||||
efx_rxq_t *, boolean_t);
|
||||
void (*emo_filter_default_rxq_clear)(efx_nic_t *);
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
efx_rc_t (*emo_stats_get_mask)(efx_nic_t *, uint32_t *, size_t);
|
||||
efx_rc_t (*emo_stats_upload)(efx_nic_t *, efsys_mem_t *);
|
||||
efx_rc_t (*emo_stats_periodic)(efx_nic_t *, efsys_mem_t *,
|
||||
uint16_t, boolean_t);
|
||||
efx_rc_t (*emo_stats_update)(efx_nic_t *, efsys_mem_t *,
|
||||
efsys_stat_t *, uint32_t *);
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
} efx_mac_ops_t;
|
||||
|
||||
typedef struct efx_phy_ops_s {
|
||||
@ -909,6 +917,27 @@ efx_mcdi_get_workarounds(
|
||||
|
||||
#endif /* EFSYS_OPT_MCDI */
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
/*
|
||||
* Closed range of stats (i.e. the first and the last are included).
|
||||
* The last must be greater or equal (if the range is one item only) to
|
||||
* the first.
|
||||
*/
|
||||
struct efx_mac_stats_range {
|
||||
efx_mac_stat_t first;
|
||||
efx_mac_stat_t last;
|
||||
};
|
||||
|
||||
extern efx_rc_t
|
||||
efx_mac_stats_mask_add_ranges(
|
||||
__inout_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size,
|
||||
__in_ecount(rng_count) const struct efx_mac_stats_range *rngp,
|
||||
__in unsigned int rng_count);
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -50,6 +50,12 @@ static const efx_mac_ops_t __efx_siena_mac_ops = {
|
||||
siena_mac_multicast_list_set, /* emo_multicast_list_set */
|
||||
NULL, /* emo_filter_set_default_rxq */
|
||||
NULL, /* emo_filter_default_rxq_clear */
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
siena_mac_stats_get_mask, /* emo_stats_get_mask */
|
||||
efx_mcdi_mac_stats_upload, /* emo_stats_upload */
|
||||
efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */
|
||||
siena_mac_stats_update /* emo_stats_update */
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
};
|
||||
#endif /* EFSYS_OPT_SIENA */
|
||||
|
||||
@ -65,6 +71,12 @@ static const efx_mac_ops_t __efx_ef10_mac_ops = {
|
||||
ef10_mac_filter_default_rxq_set, /* emo_filter_default_rxq_set */
|
||||
ef10_mac_filter_default_rxq_clear,
|
||||
/* emo_filter_default_rxq_clear */
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
ef10_mac_stats_get_mask, /* emo_stats_get_mask */
|
||||
efx_mcdi_mac_stats_upload, /* emo_stats_upload */
|
||||
efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */
|
||||
ef10_mac_stats_update /* emo_stats_update */
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
};
|
||||
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
|
||||
|
||||
@ -492,6 +504,299 @@ efx_mac_filter_default_rxq_clear(
|
||||
}
|
||||
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
#if EFSYS_OPT_NAMES
|
||||
|
||||
/* START MKCONFIG GENERATED EfxMacStatNamesBlock c11b91b42f922516 */
|
||||
static const char * const __efx_mac_stat_name[] = {
|
||||
"rx_octets",
|
||||
"rx_pkts",
|
||||
"rx_unicst_pkts",
|
||||
"rx_multicst_pkts",
|
||||
"rx_brdcst_pkts",
|
||||
"rx_pause_pkts",
|
||||
"rx_le_64_pkts",
|
||||
"rx_65_to_127_pkts",
|
||||
"rx_128_to_255_pkts",
|
||||
"rx_256_to_511_pkts",
|
||||
"rx_512_to_1023_pkts",
|
||||
"rx_1024_to_15xx_pkts",
|
||||
"rx_ge_15xx_pkts",
|
||||
"rx_errors",
|
||||
"rx_fcs_errors",
|
||||
"rx_drop_events",
|
||||
"rx_false_carrier_errors",
|
||||
"rx_symbol_errors",
|
||||
"rx_align_errors",
|
||||
"rx_internal_errors",
|
||||
"rx_jabber_pkts",
|
||||
"rx_lane0_char_err",
|
||||
"rx_lane1_char_err",
|
||||
"rx_lane2_char_err",
|
||||
"rx_lane3_char_err",
|
||||
"rx_lane0_disp_err",
|
||||
"rx_lane1_disp_err",
|
||||
"rx_lane2_disp_err",
|
||||
"rx_lane3_disp_err",
|
||||
"rx_match_fault",
|
||||
"rx_nodesc_drop_cnt",
|
||||
"tx_octets",
|
||||
"tx_pkts",
|
||||
"tx_unicst_pkts",
|
||||
"tx_multicst_pkts",
|
||||
"tx_brdcst_pkts",
|
||||
"tx_pause_pkts",
|
||||
"tx_le_64_pkts",
|
||||
"tx_65_to_127_pkts",
|
||||
"tx_128_to_255_pkts",
|
||||
"tx_256_to_511_pkts",
|
||||
"tx_512_to_1023_pkts",
|
||||
"tx_1024_to_15xx_pkts",
|
||||
"tx_ge_15xx_pkts",
|
||||
"tx_errors",
|
||||
"tx_sgl_col_pkts",
|
||||
"tx_mult_col_pkts",
|
||||
"tx_ex_col_pkts",
|
||||
"tx_late_col_pkts",
|
||||
"tx_def_pkts",
|
||||
"tx_ex_def_pkts",
|
||||
"pm_trunc_bb_overflow",
|
||||
"pm_discard_bb_overflow",
|
||||
"pm_trunc_vfifo_full",
|
||||
"pm_discard_vfifo_full",
|
||||
"pm_trunc_qbb",
|
||||
"pm_discard_qbb",
|
||||
"pm_discard_mapping",
|
||||
"rxdp_q_disabled_pkts",
|
||||
"rxdp_di_dropped_pkts",
|
||||
"rxdp_streaming_pkts",
|
||||
"rxdp_hlb_fetch",
|
||||
"rxdp_hlb_wait",
|
||||
"vadapter_rx_unicast_packets",
|
||||
"vadapter_rx_unicast_bytes",
|
||||
"vadapter_rx_multicast_packets",
|
||||
"vadapter_rx_multicast_bytes",
|
||||
"vadapter_rx_broadcast_packets",
|
||||
"vadapter_rx_broadcast_bytes",
|
||||
"vadapter_rx_bad_packets",
|
||||
"vadapter_rx_bad_bytes",
|
||||
"vadapter_rx_overflow",
|
||||
"vadapter_tx_unicast_packets",
|
||||
"vadapter_tx_unicast_bytes",
|
||||
"vadapter_tx_multicast_packets",
|
||||
"vadapter_tx_multicast_bytes",
|
||||
"vadapter_tx_broadcast_packets",
|
||||
"vadapter_tx_broadcast_bytes",
|
||||
"vadapter_tx_bad_packets",
|
||||
"vadapter_tx_bad_bytes",
|
||||
"vadapter_tx_overflow",
|
||||
};
|
||||
/* END MKCONFIG GENERATED EfxMacStatNamesBlock */
|
||||
|
||||
__checkReturn const char *
|
||||
efx_mac_stat_name(
|
||||
__in efx_nic_t *enp,
|
||||
__in unsigned int id)
|
||||
{
|
||||
_NOTE(ARGUNUSED(enp))
|
||||
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
|
||||
|
||||
EFSYS_ASSERT3U(id, <, EFX_MAC_NSTATS);
|
||||
return (__efx_mac_stat_name[id]);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_NAMES */
|
||||
|
||||
static efx_rc_t
|
||||
efx_mac_stats_mask_add_range(
|
||||
__inout_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size,
|
||||
__in const struct efx_mac_stats_range *rngp)
|
||||
{
|
||||
unsigned int mask_npages = mask_size / sizeof (*maskp);
|
||||
unsigned int el;
|
||||
unsigned int el_min;
|
||||
unsigned int el_max;
|
||||
unsigned int low;
|
||||
unsigned int high;
|
||||
unsigned int width;
|
||||
efx_rc_t rc;
|
||||
|
||||
if ((mask_npages * EFX_MAC_STATS_MASK_BITS_PER_PAGE) <=
|
||||
(unsigned int)rngp->last) {
|
||||
rc = EINVAL;
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
EFSYS_ASSERT3U(rngp->first, <=, rngp->last);
|
||||
EFSYS_ASSERT3U(rngp->last, <, EFX_MAC_NSTATS);
|
||||
|
||||
for (el = 0; el < mask_npages; ++el) {
|
||||
el_min = el * EFX_MAC_STATS_MASK_BITS_PER_PAGE;
|
||||
el_max =
|
||||
el_min + (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1);
|
||||
if ((unsigned int)rngp->first > el_max ||
|
||||
(unsigned int)rngp->last < el_min)
|
||||
continue;
|
||||
low = MAX((unsigned int)rngp->first, el_min);
|
||||
high = MIN((unsigned int)rngp->last, el_max);
|
||||
width = high - low + 1;
|
||||
maskp[el] |=
|
||||
(width == EFX_MAC_STATS_MASK_BITS_PER_PAGE) ?
|
||||
(~0ULL) : (((1ULL << width) - 1) << (low - el_min));
|
||||
}
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
efx_rc_t
|
||||
efx_mac_stats_mask_add_ranges(
|
||||
__inout_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size,
|
||||
__in_ecount(rng_count) const struct efx_mac_stats_range *rngp,
|
||||
__in unsigned int rng_count)
|
||||
{
|
||||
unsigned int i;
|
||||
efx_rc_t rc;
|
||||
|
||||
for (i = 0; i < rng_count; ++i) {
|
||||
if ((rc = efx_mac_stats_mask_add_range(maskp, mask_size,
|
||||
&rngp[i])) != 0)
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mac_stats_get_mask(
|
||||
__in efx_nic_t *enp,
|
||||
__out_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size)
|
||||
{
|
||||
efx_port_t *epp = &(enp->en_port);
|
||||
const efx_mac_ops_t *emop = epp->ep_emop;
|
||||
efx_rc_t rc;
|
||||
|
||||
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
|
||||
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
|
||||
EFSYS_ASSERT(maskp != NULL);
|
||||
EFSYS_ASSERT(mask_size % sizeof (maskp[0]) == 0);
|
||||
|
||||
(void) memset(maskp, 0, mask_size);
|
||||
|
||||
if ((rc = emop->emo_stats_get_mask(enp, maskp, mask_size)) != 0)
|
||||
goto fail1;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mac_stats_upload(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp)
|
||||
{
|
||||
efx_port_t *epp = &(enp->en_port);
|
||||
const efx_mac_ops_t *emop = epp->ep_emop;
|
||||
efx_rc_t rc;
|
||||
|
||||
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
|
||||
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
|
||||
EFSYS_ASSERT(emop != NULL);
|
||||
|
||||
/*
|
||||
* Don't assert !ep_mac_stats_pending, because the client might
|
||||
* have failed to finalise statistics when previously stopping
|
||||
* the port.
|
||||
*/
|
||||
if ((rc = emop->emo_stats_upload(enp, esmp)) != 0)
|
||||
goto fail1;
|
||||
|
||||
epp->ep_mac_stats_pending = B_TRUE;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mac_stats_periodic(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__in uint16_t period_ms,
|
||||
__in boolean_t events)
|
||||
{
|
||||
efx_port_t *epp = &(enp->en_port);
|
||||
const efx_mac_ops_t *emop = epp->ep_emop;
|
||||
efx_rc_t rc;
|
||||
|
||||
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
|
||||
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
|
||||
|
||||
EFSYS_ASSERT(emop != NULL);
|
||||
|
||||
if (emop->emo_stats_periodic == NULL) {
|
||||
rc = EINVAL;
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
if ((rc = emop->emo_stats_periodic(enp, esmp, period_ms, events)) != 0)
|
||||
goto fail2;
|
||||
|
||||
return (0);
|
||||
|
||||
fail2:
|
||||
EFSYS_PROBE(fail2);
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mac_stats_update(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *essp,
|
||||
__inout_opt uint32_t *generationp)
|
||||
{
|
||||
efx_port_t *epp = &(enp->en_port);
|
||||
const efx_mac_ops_t *emop = epp->ep_emop;
|
||||
efx_rc_t rc;
|
||||
|
||||
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
|
||||
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
|
||||
EFSYS_ASSERT(emop != NULL);
|
||||
|
||||
rc = emop->emo_stats_update(enp, esmp, essp, generationp);
|
||||
if (rc == 0)
|
||||
epp->ep_mac_stats_pending = B_FALSE;
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mac_select(
|
||||
__in efx_nic_t *enp)
|
||||
|
||||
@ -1708,6 +1708,164 @@ efx_mcdi_log_ctrl(
|
||||
}
|
||||
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
typedef enum efx_stats_action_e {
|
||||
EFX_STATS_CLEAR,
|
||||
EFX_STATS_UPLOAD,
|
||||
EFX_STATS_ENABLE_NOEVENTS,
|
||||
EFX_STATS_ENABLE_EVENTS,
|
||||
EFX_STATS_DISABLE,
|
||||
} efx_stats_action_t;
|
||||
|
||||
static __checkReturn efx_rc_t
|
||||
efx_mcdi_mac_stats(
|
||||
__in efx_nic_t *enp,
|
||||
__in_opt efsys_mem_t *esmp,
|
||||
__in efx_stats_action_t action)
|
||||
{
|
||||
efx_mcdi_req_t req;
|
||||
uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN,
|
||||
MC_CMD_MAC_STATS_OUT_DMA_LEN)];
|
||||
int clear = (action == EFX_STATS_CLEAR);
|
||||
int upload = (action == EFX_STATS_UPLOAD);
|
||||
int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
|
||||
int events = (action == EFX_STATS_ENABLE_EVENTS);
|
||||
int disable = (action == EFX_STATS_DISABLE);
|
||||
efx_rc_t rc;
|
||||
|
||||
(void) memset(payload, 0, sizeof (payload));
|
||||
req.emr_cmd = MC_CMD_MAC_STATS;
|
||||
req.emr_in_buf = payload;
|
||||
req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
|
||||
req.emr_out_buf = payload;
|
||||
req.emr_out_length = MC_CMD_MAC_STATS_OUT_DMA_LEN;
|
||||
|
||||
MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
|
||||
MAC_STATS_IN_DMA, upload,
|
||||
MAC_STATS_IN_CLEAR, clear,
|
||||
MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
|
||||
MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
|
||||
MAC_STATS_IN_PERIODIC_NOEVENT, !events,
|
||||
MAC_STATS_IN_PERIOD_MS, (enable | events) ? 1000 : 0);
|
||||
|
||||
if (esmp != NULL) {
|
||||
int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
|
||||
|
||||
EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
|
||||
EFX_MAC_STATS_SIZE);
|
||||
|
||||
MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
|
||||
EFSYS_MEM_ADDR(esmp) & 0xffffffff);
|
||||
MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
|
||||
EFSYS_MEM_ADDR(esmp) >> 32);
|
||||
MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
|
||||
} else {
|
||||
EFSYS_ASSERT(!upload && !enable && !events);
|
||||
}
|
||||
|
||||
/*
|
||||
* NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
|
||||
* as this may fail (and leave periodic DMA enabled) if the
|
||||
* vadapter has already been deleted.
|
||||
*/
|
||||
MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
|
||||
(disable ? EVB_PORT_ID_NULL : enp->en_vport_id));
|
||||
|
||||
efx_mcdi_execute(enp, &req);
|
||||
|
||||
if (req.emr_rc != 0) {
|
||||
/* EF10: Expect ENOENT if no DMA queues are initialised */
|
||||
if ((req.emr_rc != ENOENT) ||
|
||||
(enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
|
||||
rc = req.emr_rc;
|
||||
goto fail1;
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mcdi_mac_stats_clear(
|
||||
__in efx_nic_t *enp)
|
||||
{
|
||||
efx_rc_t rc;
|
||||
|
||||
if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR)) != 0)
|
||||
goto fail1;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mcdi_mac_stats_upload(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp)
|
||||
{
|
||||
efx_rc_t rc;
|
||||
|
||||
/*
|
||||
* The MC DMAs aggregate statistics for our convenience, so we can
|
||||
* avoid having to pull the statistics buffer into the cache to
|
||||
* maintain cumulative statistics.
|
||||
*/
|
||||
if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD)) != 0)
|
||||
goto fail1;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
efx_mcdi_mac_stats_periodic(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__in uint16_t period,
|
||||
__in boolean_t events)
|
||||
{
|
||||
efx_rc_t rc;
|
||||
|
||||
/*
|
||||
* The MC DMAs aggregate statistics for our convenience, so we can
|
||||
* avoid having to pull the statistics buffer into the cache to
|
||||
* maintain cumulative statistics.
|
||||
* Huntington uses a fixed 1sec period, so use that on Siena too.
|
||||
*/
|
||||
if (period == 0)
|
||||
rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE);
|
||||
else if (events)
|
||||
rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS);
|
||||
else
|
||||
rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS);
|
||||
|
||||
if (rc != 0)
|
||||
goto fail1;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
|
||||
|
||||
/*
|
||||
|
||||
@ -232,6 +232,23 @@ siena_mac_pdu_get(
|
||||
__in efx_nic_t *enp,
|
||||
__out size_t *pdu);
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
extern __checkReturn efx_rc_t
|
||||
siena_mac_stats_get_mask(
|
||||
__in efx_nic_t *enp,
|
||||
__inout_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size);
|
||||
|
||||
extern __checkReturn efx_rc_t
|
||||
siena_mac_stats_update(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
|
||||
__inout_opt uint32_t *generationp);
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -194,6 +194,241 @@ siena_mac_reconfigure(
|
||||
return (rc);
|
||||
}
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
siena_mac_stats_get_mask(
|
||||
__in efx_nic_t *enp,
|
||||
__inout_bcount(mask_size) uint32_t *maskp,
|
||||
__in size_t mask_size)
|
||||
{
|
||||
const struct efx_mac_stats_range siena_stats[] = {
|
||||
{ EFX_MAC_RX_OCTETS, EFX_MAC_RX_GE_15XX_PKTS },
|
||||
/* EFX_MAC_RX_ERRORS is not supported */
|
||||
{ EFX_MAC_RX_FCS_ERRORS, EFX_MAC_TX_EX_DEF_PKTS },
|
||||
};
|
||||
efx_rc_t rc;
|
||||
|
||||
_NOTE(ARGUNUSED(enp))
|
||||
|
||||
if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
|
||||
siena_stats, EFX_ARRAY_SIZE(siena_stats))) != 0)
|
||||
goto fail1;
|
||||
|
||||
return (0);
|
||||
|
||||
fail1:
|
||||
EFSYS_PROBE1(fail1, efx_rc_t, rc);
|
||||
|
||||
return (rc);
|
||||
}
|
||||
|
||||
#define SIENA_MAC_STAT_READ(_esmp, _field, _eqp) \
|
||||
EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
siena_mac_stats_update(
|
||||
__in efx_nic_t *enp,
|
||||
__in efsys_mem_t *esmp,
|
||||
__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
|
||||
__inout_opt uint32_t *generationp)
|
||||
{
|
||||
efx_qword_t value;
|
||||
efx_qword_t generation_start;
|
||||
efx_qword_t generation_end;
|
||||
|
||||
_NOTE(ARGUNUSED(enp))
|
||||
|
||||
/* Read END first so we don't race with the MC */
|
||||
EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
|
||||
&generation_end);
|
||||
EFSYS_MEM_READ_BARRIER();
|
||||
|
||||
/* TX */
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
|
||||
EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
|
||||
EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
|
||||
EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
|
||||
&value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
|
||||
|
||||
/* RX */
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
|
||||
EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
|
||||
EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
|
||||
&(value.eq_dword[0]));
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
|
||||
&(value.eq_dword[1]));
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
|
||||
&(value.eq_dword[0]));
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
|
||||
&(value.eq_dword[1]));
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
|
||||
&(value.eq_dword[0]));
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
|
||||
&(value.eq_dword[1]));
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
|
||||
&(value.eq_dword[0]));
|
||||
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
|
||||
&(value.eq_dword[1]));
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
|
||||
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
|
||||
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
|
||||
|
||||
EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
|
||||
EFSYS_MEM_READ_BARRIER();
|
||||
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
|
||||
&generation_start);
|
||||
|
||||
/* Check that we didn't read the stats in the middle of a DMA */
|
||||
/* Not a good enough check ? */
|
||||
if (memcmp(&generation_start, &generation_end,
|
||||
sizeof (generation_start)))
|
||||
return (EAGAIN);
|
||||
|
||||
if (generationp)
|
||||
*generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
#endif /* EFSYS_OPT_MAC_STATS */
|
||||
|
||||
__checkReturn efx_rc_t
|
||||
siena_mac_pdu_get(
|
||||
__in efx_nic_t *enp,
|
||||
|
||||
@ -210,10 +210,20 @@ siena_nic_probe(
|
||||
epp->ep_default_adv_cap_mask = sls.sls_adv_cap_mask;
|
||||
epp->ep_adv_cap_mask = sls.sls_adv_cap_mask;
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
/* Wipe the MAC statistics */
|
||||
if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0)
|
||||
goto fail10;
|
||||
#endif
|
||||
|
||||
encp->enc_features = enp->en_features;
|
||||
|
||||
return (0);
|
||||
|
||||
#if EFSYS_OPT_MAC_STATS
|
||||
fail10:
|
||||
EFSYS_PROBE(fail10);
|
||||
#endif
|
||||
fail8:
|
||||
EFSYS_PROBE(fail8);
|
||||
fail7:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user