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net/enetc: relax read for Tx CI in clean Tx

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We don't need barriers here since this read doesn't have to be strictly
serialized in relation to other surrounding memory/register accesses.
We only want a reasonably recent value out of hardware so we know how
much we can clean.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Gagandeep Singh <g.singh@nxp.com>
This commit is contained in:
Alex Marginean 2020-03-02 20:02:01 +05:30 committed by Ferruh Yigit
parent 6efb46f0e8
commit 8cb6b561ea
1 changed files with 6 additions and 3 deletions
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9
drivers/net/enetc/enetc_rxtx.c
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@ -23,12 +23,15 @@ enetc_clean_tx_ring(struct enetc_bdr *tx_ring)
struct enetc_swbd *tx_swbd;
int i, hwci;
/* we don't need barriers here, we just want a relatively current value
* from HW.
*/
hwci = (int)(rte_read32_relaxed(tx_ring->tcisr) &
ENETC_TBCISR_IDX_MASK);
i = tx_ring->next_to_clean;
tx_swbd = &tx_ring->q_swbd[i];
hwci = (int)(enetc_rd_reg(tx_ring->tcisr) &
ENETC_TBCISR_IDX_MASK);
/* we're only reading the CI index once here, which means HW may update
* it while we're doing clean-up. We could read the register in a loop
* but for now I assume it's OK to leave a few Tx frames for next call.