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bnx2x: add periodic debug option

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The periodic debug option is used to collect periodic
events like statistics, register access etc and won't
interfere with user-level messages.

Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
This commit is contained in:
Harish Patil 2015-12-10 22:36:36 -08:00 committed by Thomas Monjalon
parent c275e3cb52
commit 8dc08a093a
9 changed files with 38 additions and 24 deletions
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1
config/common_bsdapp
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@ -237,6 +237,7 @@ CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD

1
config/common_linuxapp
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@ -236,6 +236,7 @@ CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
#
# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD

4
drivers/net/bnx2x/Makefile
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@ -5,7 +5,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
#
LIB = librte_pmd_bnx2x.a
CFLAGS += -O3 -g
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
CFLAGS += -DZLIB_CONST
LDLIBS += -lz
@ -24,7 +24,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += ecore_sp.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += elink.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_vfpf.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG) += debug.c
SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC) += debug.c
# this lib depends upon:
DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_eal lib/librte_ether lib/librte_hash

6
drivers/net/bnx2x/bnx2x.c
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@ -4343,7 +4343,7 @@ static void bnx2x_eq_int(struct bnx2x_softc *sc)
/* handle eq element */
switch (opcode) {
case EVENT_RING_OPCODE_STAT_QUERY:
PMD_DRV_LOG(DEBUG, "got statistics completion event %d",
PMD_DEBUG_PERIODIC_LOG(DEBUG, "got statistics completion event %d",
sc->stats_comp++);
/* nothing to do with stats comp */
goto next_spqe;
@ -4494,7 +4494,7 @@ static int bnx2x_handle_sp_tq(struct bnx2x_softc *sc)
/* SP events: STAT_QUERY and others */
if (status & BNX2X_DEF_SB_IDX) {
/* handle EQ completions */
PMD_DRV_LOG(DEBUG, "---> EQ INTR <---");
PMD_DEBUG_PERIODIC_LOG(DEBUG, "---> EQ INTR <---");
bnx2x_eq_int(sc);
bnx2x_ack_sb(sc, sc->igu_dsb_id, USTORM_ID,
le16toh(sc->def_idx), IGU_INT_NOP, 1);
@ -4567,7 +4567,7 @@ int bnx2x_intr_legacy(struct bnx2x_softc *sc, int scan_fp)
return 0;
}
PMD_DRV_LOG(DEBUG, "Interrupt status 0x%04x", status);
PMD_DEBUG_PERIODIC_LOG(DEBUG, "Interrupt status 0x%04x", status);
//bnx2x_dump_status_block(sc);
FOR_EACH_ETH_QUEUE(sc, i) {

2
drivers/net/bnx2x/bnx2x.h
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@ -1445,7 +1445,7 @@ struct bnx2x_func_init_params {
#define BAR1 2
#define BAR2 4
#ifdef RTE_LIBRTE_BNX2X_DEBUG
#ifdef RTE_LIBRTE_BNX2X_DEBUG_PERIODIC
uint8_t bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset);
uint16_t bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset);
uint32_t bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset);

2
drivers/net/bnx2x/bnx2x_ethdev.c
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@ -52,7 +52,7 @@ bnx2x_interrupt_action(struct rte_eth_dev *dev)
struct bnx2x_softc *sc = dev->data->dev_private;
uint32_t link_status;
PMD_DRV_LOG(INFO, "Interrupt handled");
PMD_DEBUG_PERIODIC_LOG(INFO, "Interrupt handled");
if (bnx2x_intr_legacy(sc, 0))
DELAY_MS(250);

8
drivers/net/bnx2x/bnx2x_logs.h
View File

@ -47,4 +47,12 @@
#define PMD_DRV_LOG(level, fmt, args...) \
PMD_DRV_LOG_RAW(level, fmt "\n", ## args)
#ifdef RTE_LIBRTE_BNX2X_DEBUG_PERIODIC
#define PMD_DEBUG_PERIODIC_LOG(level, fmt, args...) \
RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args)
#else
#define PMD_DEBUG_PERIODIC_LOG(level, fmt, args...) do { } while(0)
#endif
#endif /* _PMD_LOGS_H_ */

2
drivers/net/bnx2x/bnx2x_stats.c
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@ -105,7 +105,7 @@ bnx2x_storm_stats_post(struct bnx2x_softc *sc)
sc->fw_stats_req->hdr.drv_stats_counter =
htole16(sc->stats_counter++);
PMD_DRV_LOG(DEBUG,
PMD_DEBUG_PERIODIC_LOG(DEBUG,
"sending statistics ramrod %d",
le16toh(sc->fw_stats_req->hdr.drv_stats_counter));

36
drivers/net/bnx2x/debug.c
View File

@ -44,30 +44,32 @@
void
bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
{
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val);
*((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
*((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
}
void
bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
{
if ((offset % 2) != 0) {
PMD_DRV_LOG(DEBUG, "Unaligned 16-bit write to 0x%08lx", offset);
PMD_DRV_LOG(NOTICE, "Unaligned 16-bit write to 0x%08lx",
(unsigned long)offset);
}
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%04x", offset, val);
*((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x", (unsigned long)offset, val);
*((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
}
void
bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
{
if ((offset % 4) != 0) {
PMD_DRV_LOG(DEBUG, "Unaligned 32-bit write to 0x%08lx", offset);
PMD_DRV_LOG(NOTICE, "Unaligned 32-bit write to 0x%08lx",
(unsigned long)offset);
}
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
*((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val;
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
*((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
}
uint8_t
@ -75,8 +77,8 @@ bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset)
{
uint8_t val;
val = (uint8_t)(*((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val);
val = (uint8_t)(*((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
return (val);
}
@ -87,11 +89,12 @@ bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset)
uint16_t val;
if ((offset % 2) != 0) {
PMD_DRV_LOG(DEBUG, "Unaligned 16-bit read from 0x%08lx", offset);
PMD_DRV_LOG(NOTICE, "Unaligned 16-bit read from 0x%08lx",
(unsigned long)offset);
}
val = (uint16_t)(*((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
val = (uint16_t)(*((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
return (val);
}
@ -102,12 +105,13 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
uint32_t val;
if ((offset % 4) != 0) {
PMD_DRV_LOG(DEBUG, "Unaligned 32-bit read from 0x%08lx", offset);
PMD_DRV_LOG(NOTICE, "Unaligned 32-bit read from 0x%08lx",
(unsigned long)offset);
return 0;
}
val = (uint32_t)(*((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)));
PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val);
val = (uint32_t)(*((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
return (val);
}