net/octeontx2: fix PTP and HIGIG2 coexistence
octeontx2 PMD does not support both PTP and HIGIG2 together. Added a check to enforce this and updated the Rx offload capabilities when Higig2 mode enabled. Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2") Cc: stable@dpdk.org Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
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@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
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{
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uint64_t capa = NIX_RX_OFFLOAD_CAPA;
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if (otx2_dev_is_vf(dev))
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if (otx2_dev_is_vf(dev) ||
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dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
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capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
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return capa;
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@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
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goto fail_offloads;
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}
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if (dev->ptp_en &&
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dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
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otx2_err("Both PTP and switch header enabled");
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goto free_nix_lf;
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}
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rc = nix_lf_switch_header_type_enable(dev);
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if (rc) {
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otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
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@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
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return -EINVAL;
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}
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if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
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otx2_err("Both PTP and switch header enabled");
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return -EINVAL;
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}
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/* Allocating a iova address for tx tstamp */
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const struct rte_memzone *ts;
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ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
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