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ethdev: enhance burst mode information API

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Change the type of burst mode information from bit field to free string
data, so that each PMD can describe the Rx/Tx busrt functions flexibly.

Fixes: eb5902504a13 ("ethdev: add API for getting burst mode information")
Fixes: 6b6609f68ccd ("net/i40e: support Rx/Tx burst mode info")
Fixes: e9a10e6c2102 ("net/ice: support Rx/Tx burst mode info")
Fixes: 7fe108edcf53 ("app/testpmd: show Rx/Tx burst mode description")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
This commit is contained in:
Haiyue Wang 2019-11-06 09:30:05 +08:00 committed by Ferruh Yigit
parent 6c8b332843
commit 8dedb54699
8 changed files with 129 additions and 194 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
app/test-pmd/config.c
View File

@ -350,21 +350,6 @@ nic_stats_mapping_display(portid_t port_id)
nic_stats_mapping_border, nic_stats_mapping_border);
}
static void
burst_mode_options_display(uint64_t options)
{
int offset;
while (options != 0) {
offset = rte_bsf64(options);
printf(" %s",
rte_eth_burst_mode_option_name(1ULL << offset));
options &= ~(1ULL << offset);
}
}
void
rx_queue_infos_display(portid_t port_id, uint16_t queue_id)
{
@ -397,10 +382,11 @@ rx_queue_infos_display(portid_t port_id, uint16_t queue_id)
(qinfo.scattered_rx != 0) ? "on" : "off");
printf("\nNumber of RXDs: %hu", qinfo.nb_desc);
if (rte_eth_rx_burst_mode_get(port_id, queue_id, &mode) == 0) {
printf("\nBurst mode:");
burst_mode_options_display(mode.options);
}
if (rte_eth_rx_burst_mode_get(port_id, queue_id, &mode) == 0)
printf("\nBurst mode: %s%s",
mode.info,
mode.flags & RTE_ETH_BURST_FLAG_PER_QUEUE ?
" (per queue)" : "");
printf("\n");
}
@ -433,10 +419,11 @@ tx_queue_infos_display(portid_t port_id, uint16_t queue_id)
(qinfo.conf.tx_deferred_start != 0) ? "on" : "off");
printf("\nNumber of TXDs: %hu", qinfo.nb_desc);
if (rte_eth_tx_burst_mode_get(port_id, queue_id, &mode) == 0) {
printf("\nBurst mode:");
burst_mode_options_display(mode.options);
}
if (rte_eth_tx_burst_mode_get(port_id, queue_id, &mode) == 0)
printf("\nBurst mode: %s%s",
mode.info,
mode.flags & RTE_ETH_BURST_FLAG_PER_QUEUE ?
" (per queue)" : "");
printf("\n");
}

3
doc/guides/nics/features.rst
View File

@ -879,8 +879,7 @@ Burst mode info
Supports to get Rx/Tx packet burst mode information.
* **[implements] eth_dev_ops**: ``rx_burst_mode_get``, ``tx_burst_mode_get``.
* **[related] API**: ``rte_eth_rx_burst_mode_get()``, ``rte_eth_tx_burst_mode_get()``,
``rte_eth_burst_mode_option_name()``.
* **[related] API**: ``rte_eth_rx_burst_mode_get()``, ``rte_eth_tx_burst_mode_get()``.
.. _nic_features_other:

2
doc/guides/rel_notes/release_19_11.rst
View File

@ -128,8 +128,6 @@ New Features
``rte_eth_tx_burst_mode_get`` that allow an application
to retrieve the mode information about RX/TX packet burst
such as Scalar or Vector, and Vector technology like AVX2.
Another new function ``rte_eth_burst_mode_option_name`` is
provided for burst mode options stringification.
* **Updated the Intel ice driver.**

117
drivers/net/i40e/i40e_rxtx.c
View File

@ -3017,49 +3017,45 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
}
}
static const struct {
eth_rx_burst_t pkt_burst;
const char *info;
} i40e_rx_burst_infos[] = {
{ i40e_recv_scattered_pkts, "Scalar Scattered" },
{ i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
{ i40e_recv_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
{ i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
{ i40e_recv_pkts_vec_avx2, "Vector AVX2" },
{ i40e_recv_scattered_pkts_vec, "Vector SSE Scattered" },
{ i40e_recv_pkts_vec, "Vector SSE" },
#elif defined(RTE_ARCH_ARM64)
{ i40e_recv_scattered_pkts_vec, "Vector Neon Scattered" },
{ i40e_recv_pkts_vec, "Vector Neon" },
#elif defined(RTE_ARCH_PPC_64)
{ i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered" },
{ i40e_recv_pkts_vec, "Vector AltiVec" },
#endif
};
int
i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
uint64_t options;
int ret = -EINVAL;
unsigned int i;
if (pkt_burst == i40e_recv_scattered_pkts)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == i40e_recv_pkts_bulk_alloc)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC;
else if (pkt_burst == i40e_recv_pkts)
options = RTE_ETH_BURST_SCALAR;
#ifdef RTE_ARCH_X86
else if (pkt_burst == i40e_recv_scattered_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == i40e_recv_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
else if (pkt_burst == i40e_recv_scattered_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == i40e_recv_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
#elif defined(RTE_ARCH_ARM64)
else if (pkt_burst == i40e_recv_scattered_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == i40e_recv_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
#elif defined(RTE_ARCH_PPC_64)
else if (pkt_burst == i40e_recv_scattered_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == i40e_recv_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
#endif
else
options = 0;
for (i = 0; i < RTE_DIM(i40e_rx_burst_infos); ++i) {
if (pkt_burst == i40e_rx_burst_infos[i].pkt_burst) {
snprintf(mode->info, sizeof(mode->info), "%s",
i40e_rx_burst_infos[i].info);
ret = 0;
break;
}
}
mode->options = options;
return options != 0 ? 0 : -EINVAL;
return ret;
}
void __attribute__((cold))
@ -3155,35 +3151,40 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
}
}
static const struct {
eth_tx_burst_t pkt_burst;
const char *info;
} i40e_tx_burst_infos[] = {
{ i40e_xmit_pkts_simple, "Scalar Simple" },
{ i40e_xmit_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
{ i40e_xmit_pkts_vec_avx2, "Vector AVX2" },
{ i40e_xmit_pkts_vec, "Vector SSE" },
#elif defined(RTE_ARCH_ARM64)
{ i40e_xmit_pkts_vec, "Vector Neon" },
#elif defined(RTE_ARCH_PPC_64)
{ i40e_xmit_pkts_vec, "Vector AltiVec" },
#endif
};
int
i40e_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
uint64_t options;
int ret = -EINVAL;
unsigned int i;
if (pkt_burst == i40e_xmit_pkts_simple)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE;
else if (pkt_burst == i40e_xmit_pkts)
options = RTE_ETH_BURST_SCALAR;
#ifdef RTE_ARCH_X86
else if (pkt_burst == i40e_xmit_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
else if (pkt_burst == i40e_xmit_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
#elif defined(RTE_ARCH_ARM64)
else if (pkt_burst == i40e_xmit_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
#elif defined(RTE_ARCH_PPC_64)
else if (pkt_burst == i40e_xmit_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
#endif
else
options = 0;
for (i = 0; i < RTE_DIM(i40e_tx_burst_infos); ++i) {
if (pkt_burst == i40e_tx_burst_infos[i].pkt_burst) {
snprintf(mode->info, sizeof(mode->info), "%s",
i40e_tx_burst_infos[i].info);
ret = 0;
break;
}
}
mode->options = options;
return options != 0 ? 0 : -EINVAL;
return ret;
}
void __attribute__((cold))

89
drivers/net/ice/ice_rxtx.c
View File

@ -2831,37 +2831,39 @@ ice_set_rx_function(struct rte_eth_dev *dev)
}
}
static const struct {
eth_rx_burst_t pkt_burst;
const char *info;
} ice_rx_burst_infos[] = {
{ ice_recv_scattered_pkts, "Scalar Scattered" },
{ ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
{ ice_recv_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
{ ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
{ ice_recv_pkts_vec_avx2, "Vector AVX2" },
{ ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
{ ice_recv_pkts_vec, "Vector SSE" },
#endif
};
int
ice_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
uint64_t options;
int ret = -EINVAL;
unsigned int i;
if (pkt_burst == ice_recv_scattered_pkts)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == ice_recv_pkts_bulk_alloc)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC;
else if (pkt_burst == ice_recv_pkts)
options = RTE_ETH_BURST_SCALAR;
#ifdef RTE_ARCH_X86
else if (pkt_burst == ice_recv_scattered_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == ice_recv_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
else if (pkt_burst == ice_recv_scattered_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE |
RTE_ETH_BURST_SCATTERED;
else if (pkt_burst == ice_recv_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
#endif
else
options = 0;
for (i = 0; i < RTE_DIM(ice_rx_burst_infos); ++i) {
if (pkt_burst == ice_rx_burst_infos[i].pkt_burst) {
snprintf(mode->info, sizeof(mode->info), "%s",
ice_rx_burst_infos[i].info);
ret = 0;
break;
}
}
mode->options = options;
return options != 0 ? 0 : -EINVAL;
return ret;
}
void __attribute__((cold))
@ -2987,29 +2989,36 @@ ice_set_tx_function(struct rte_eth_dev *dev)
}
}
static const struct {
eth_tx_burst_t pkt_burst;
const char *info;
} ice_tx_burst_infos[] = {
{ ice_xmit_pkts_simple, "Scalar Simple" },
{ ice_xmit_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
{ ice_xmit_pkts_vec_avx2, "Vector AVX2" },
{ ice_xmit_pkts_vec, "Vector SSE" },
#endif
};
int
ice_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
uint64_t options;
int ret = -EINVAL;
unsigned int i;
if (pkt_burst == ice_xmit_pkts_simple)
options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE;
else if (pkt_burst == ice_xmit_pkts)
options = RTE_ETH_BURST_SCALAR;
#ifdef RTE_ARCH_X86
else if (pkt_burst == ice_xmit_pkts_vec_avx2)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
else if (pkt_burst == ice_xmit_pkts_vec)
options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
#endif
else
options = 0;
for (i = 0; i < RTE_DIM(ice_tx_burst_infos); ++i) {
if (pkt_burst == ice_tx_burst_infos[i].pkt_burst) {
snprintf(mode->info, sizeof(mode->info), "%s",
ice_tx_burst_infos[i].info);
ret = 0;
break;
}
}
mode->options = options;
return options != 0 ? 0 : -EINVAL;
return ret;
}
/* For each value it means, datasheet of hardware can tell more details

35
lib/librte_ethdev/rte_ethdev.c
View File

@ -166,25 +166,6 @@ static const struct {
#undef RTE_TX_OFFLOAD_BIT2STR
static const struct {
uint64_t option;
const char *name;
} rte_burst_option_names[] = {
{ RTE_ETH_BURST_SCALAR, "Scalar" },
{ RTE_ETH_BURST_VECTOR, "Vector" },
{ RTE_ETH_BURST_ALTIVEC, "AltiVec" },
{ RTE_ETH_BURST_NEON, "Neon" },
{ RTE_ETH_BURST_SSE, "SSE" },
{ RTE_ETH_BURST_AVX2, "AVX2" },
{ RTE_ETH_BURST_AVX512, "AVX512" },
{ RTE_ETH_BURST_SCATTERED, "Scattered" },
{ RTE_ETH_BURST_BULK_ALLOC, "Bulk Alloc" },
{ RTE_ETH_BURST_SIMPLE, "Simple" },
{ RTE_ETH_BURST_PER_QUEUE, "Per Queue" },
};
/**
* The user application callback description.
*
@ -4478,22 +4459,6 @@ rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
}
const char *
rte_eth_burst_mode_option_name(uint64_t option)
{
const char *name = "";
unsigned int i;
for (i = 0; i < RTE_DIM(rte_burst_option_names); ++i) {
if (option == rte_burst_option_names[i].option) {
name = rte_burst_option_names[i].name;
break;
}
}
return name;
}
int
rte_eth_dev_set_mc_addr_list(uint16_t port_id,
struct rte_ether_addr *mc_addr_set,

43
lib/librte_ethdev/rte_ethdev.h
View File

@ -1287,33 +1287,24 @@ struct rte_eth_txq_info {
uint16_t nb_desc; /**< configured number of TXDs. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
/**
* Burst mode types, values can be ORed to define the burst mode of a driver.
* If the queues have different burst mode description, this bit will be set
* by PMD, then the application can iterate to retrieve burst description for
* all other queues.
*/
enum rte_eth_burst_mode_option {
RTE_ETH_BURST_SCALAR = (1 << 0),
RTE_ETH_BURST_VECTOR = (1 << 1),
/**< bits[15:2] are reserved for each vector type */
RTE_ETH_BURST_ALTIVEC = (1 << 2),
RTE_ETH_BURST_NEON = (1 << 3),
RTE_ETH_BURST_SSE = (1 << 4),
RTE_ETH_BURST_AVX2 = (1 << 5),
RTE_ETH_BURST_AVX512 = (1 << 6),
RTE_ETH_BURST_SCATTERED = (1 << 16), /**< Support scattered packets */
RTE_ETH_BURST_BULK_ALLOC = (1 << 17), /**< Support mbuf bulk alloc */
RTE_ETH_BURST_SIMPLE = (1 << 18),
RTE_ETH_BURST_PER_QUEUE = (1 << 19), /**< Support per queue burst */
};
#define RTE_ETH_BURST_FLAG_PER_QUEUE (1ULL << 0)
/**
* Ethernet device RX/TX queue packet burst mode information structure.
* Used to retrieve information about packet burst mode setting.
*/
struct rte_eth_burst_mode {
uint64_t options;
uint64_t flags; /**< The ORed values of RTE_ETH_BURST_FLAG_xxx */
#define RTE_ETH_BURST_MODE_INFO_SIZE 1024 /**< Maximum size for information */
char info[RTE_ETH_BURST_MODE_INFO_SIZE]; /**< burst mode information */
};
/** Maximum name length for extended statistics counters */
@ -3787,20 +3778,6 @@ __rte_experimental
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
struct rte_eth_burst_mode *mode);
/**
* Retrieve name about burst mode option.
*
* @param option
* The burst mode option of type *rte_eth_burst_mode_option*.
*
* @return
* - "": Not found
* - "xxx": name of the mode option.
*/
__rte_experimental
const char *
rte_eth_burst_mode_option_name(uint64_t option);
/**
* Retrieve device registers and register attributes (number of registers and
* register size)

1
lib/librte_ethdev/rte_ethdev_version.map
View File

@ -284,7 +284,6 @@ EXPERIMENTAL {
rte_eth_read_clock;
# added in 19.11
rte_eth_burst_mode_option_name;
rte_eth_dev_hairpin_capability_get;
rte_eth_rx_burst_mode_get;
rte_eth_rx_hairpin_queue_setup;