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net/i40e/base: correct global reset timeout calculation

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The wait time for Global Reset Ready steady state is calculated based on
the GLGEN_RSTCTL.GRSTDEL value. However, current impelementation multiplied
that value by 20 as a workaround for an issue in SOC platforms.
This resulted in the maximum GLGEN_RSTCTL.GRSTDEL timeout of 6.5 seconds
becoming 130 seconds, which is so long that the VMkernel watchdog thinks
the kernel is frozen and triggers a PSOD.

Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
This commit is contained in:
Qi Zhang 2018-09-25 10:34:33 +08:00 committed by Ferruh Yigit
parent 49ea51605b
commit 92451d9039
1 changed files with 1 additions and 1 deletions
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2
drivers/net/i40e/base/i40e_common.c
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@ -1342,7 +1342,7 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)
I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
grst_del = grst_del * 20;
grst_del = min(grst_del * 20, 160U);
for (cnt = 0; cnt < grst_del; cnt++) {
reg = rd32(hw, I40E_GLGEN_RSTAT);