net/ice/base: enable masking for RSS and FD field vectors
Allow masking per word field on RSS and FD field vectors. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
This commit is contained in:
Qi Zhang
Ferruh Yigit
parent
37e960435c
commit
9467486f17
@ -2499,6 +2499,102 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
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return ICE_SUCCESS;
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}
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/**
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* ice_prof_has_mask_idx - determine if profile index masking is identical
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* @hw: pointer to the hardware structure
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* @blk: HW block
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* @prof: profile to check
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* @idx: profile index to check
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* @masks: masks to match
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*/
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static bool
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ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
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u16 mask)
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{
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bool expect_no_mask = false;
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bool found = false;
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bool match = false;
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u16 i;
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/* If mask is 0x0000 or 0xffff, then there is no masking */
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if (mask == 0 || mask == 0xffff)
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expect_no_mask = true;
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/* Scan the enabled masks on this profile, for the specified idx */
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for (i = 0; i < ICE_PROFILE_MASK_COUNT; i++)
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if (hw->blk[blk].es.mask_ena[prof] & BIT(i))
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if (hw->blk[blk].masks.masks[i].in_use &&
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hw->blk[blk].masks.masks[i].idx == idx) {
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found = true;
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if (hw->blk[blk].masks.masks[i].mask == mask)
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match = true;
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break;
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}
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if (expect_no_mask) {
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if (found)
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return false;
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} else {
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if (!match)
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return false;
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}
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return true;
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}
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/**
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* ice_prof_has_mask - determine if profile masking is identical
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* @hw: pointer to the hardware structure
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* @blk: HW block
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* @prof: profile to check
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* @masks: masks to match
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*/
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static bool
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ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks)
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{
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u16 i;
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/* es->mask_ena[prof] will have the mask */
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for (i = 0; i < hw->blk[blk].es.fvw; i++)
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if (!ice_prof_has_mask_idx(hw, blk, prof, i, masks[i]))
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return false;
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return true;
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}
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/**
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* ice_find_prof_id_with_mask - find profile ID for a given field vector
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* @hw: pointer to the hardware structure
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* @blk: HW block
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* @fv: field vector to search for
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* @masks: masks for fv
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* @prof_id: receives the profile ID
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*/
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static enum ice_status
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ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
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struct ice_fv_word *fv, u16 *masks, u8 *prof_id)
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{
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struct ice_es *es = &hw->blk[blk].es;
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u16 i;
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for (i = 0; i < es->count; i++) {
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u16 off = i * es->fvw;
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u16 j;
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if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
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continue;
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/* check if masks settings are the same for this profile */
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if (!ice_prof_has_mask(hw, blk, i, masks))
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continue;
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*prof_id = i;
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return ICE_SUCCESS;
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}
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return ICE_ERR_DOES_NOT_EXIST;
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}
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/**
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* ice_find_prof_id - find profile ID for a given field vector
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* @hw: pointer to the hardware structure
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@ -2686,6 +2782,334 @@ ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
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return ICE_SUCCESS;
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}
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/**
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* ice_write_prof_mask_reg - write profile mask register
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @mask_idx: mask index
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* @idx: index of the FV which will use the mask
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* @mask: the 16-bit mask
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*/
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static void
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ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx,
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u16 idx, u16 mask)
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{
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u32 offset;
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u32 val;
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switch (blk) {
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case ICE_BLK_RSS:
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offset = GLQF_HMASK(mask_idx);
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val = (idx << GLQF_HMASK_MSK_INDEX_S) &
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GLQF_HMASK_MSK_INDEX_M;
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val |= (mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
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break;
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case ICE_BLK_FD:
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offset = GLQF_FDMASK(mask_idx);
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val = (idx << GLQF_FDMASK_MSK_INDEX_S) &
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GLQF_FDMASK_MSK_INDEX_M;
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val |= (mask << GLQF_FDMASK_MASK_S) &
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GLQF_FDMASK_MASK_M;
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break;
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default:
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ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
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blk);
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return;
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}
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wr32(hw, offset, val);
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ice_debug(hw, ICE_DBG_PKG, "write mask, blk %d (%d): %x = %x\n",
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blk, idx, offset, val);
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}
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/**
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* ice_write_prof_mask_enable_res - write profile mask enable register
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @prof_id: profile id
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* @enable_mask: enable mask
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*/
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static void
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ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk,
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u16 prof_id, u32 enable_mask)
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{
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u32 offset;
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switch (blk) {
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case ICE_BLK_RSS:
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offset = GLQF_HMASK_SEL(prof_id);
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break;
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case ICE_BLK_FD:
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offset = GLQF_FDMASK_SEL(prof_id);
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break;
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default:
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ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
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blk);
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return;
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}
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wr32(hw, offset, enable_mask);
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ice_debug(hw, ICE_DBG_PKG, "write mask enable, blk %d (%d): %x = %x\n",
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blk, prof_id, offset, enable_mask);
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}
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/**
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* ice_init_prof_masks - initial prof masks
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* @hw: pointer to the HW struct
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* @blk: hardware block
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*/
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static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk)
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{
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#define MAX_NUM_PORTS 8
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u16 num_ports = MAX_NUM_PORTS;
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u16 i;
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ice_init_lock(&hw->blk[blk].masks.lock);
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hw->blk[blk].masks.count = ICE_PROFILE_MASK_COUNT / num_ports;
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hw->blk[blk].masks.first = hw->pf_id * hw->blk[blk].masks.count;
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ice_memset(hw->blk[blk].masks.masks, 0,
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sizeof(hw->blk[blk].masks.masks), ICE_NONDMA_MEM);
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for (i = hw->blk[blk].masks.first;
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i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
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ice_write_prof_mask_reg(hw, blk, i, 0, 0);
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}
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/**
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* ice_init_all_prof_masks - initial all prof masks
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* @hw: pointer to the HW struct
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*/
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void ice_init_all_prof_masks(struct ice_hw *hw)
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{
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ice_init_prof_masks(hw, ICE_BLK_RSS);
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ice_init_prof_masks(hw, ICE_BLK_FD);
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}
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/**
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* ice_alloc_prof_mask - allocate profile mask
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @idx: index of FV which will use the mask
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* @mask: the 16-bit mask
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* @mask_idx: variable to receive the mask index
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*/
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static enum ice_status
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ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
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u16 *mask_idx)
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{
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bool found_unused = false, found_copy = false;
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enum ice_status status = ICE_ERR_MAX_LIMIT;
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u16 unused_idx = 0, copy_idx = 0;
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u16 i;
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if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
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return ICE_ERR_PARAM;
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ice_acquire_lock(&hw->blk[blk].masks.lock);
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for (i = hw->blk[blk].masks.first;
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i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
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if (hw->blk[blk].masks.masks[i].in_use) {
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/* if mask is in use and it exactly duplicates the
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* desired mask and index, then in can be reused
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*/
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if (hw->blk[blk].masks.masks[i].mask == mask &&
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hw->blk[blk].masks.masks[i].idx == idx) {
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found_copy = true;
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copy_idx = i;
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break;
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}
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} else {
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/* save off unused index, but keep searching in case
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* there is an exact match later on
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*/
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if (!found_unused) {
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found_unused = true;
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unused_idx = i;
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}
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}
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if (found_copy)
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i = copy_idx;
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else if (found_unused)
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i = unused_idx;
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else
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goto err_ice_alloc_prof_mask;
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/* update mask for a new entry */
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if (found_unused) {
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hw->blk[blk].masks.masks[i].in_use = true;
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hw->blk[blk].masks.masks[i].mask = mask;
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hw->blk[blk].masks.masks[i].idx = idx;
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hw->blk[blk].masks.masks[i].ref = 0;
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ice_write_prof_mask_reg(hw, blk, i, idx, mask);
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}
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hw->blk[blk].masks.masks[i].ref++;
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*mask_idx = i;
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status = ICE_SUCCESS;
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err_ice_alloc_prof_mask:
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ice_release_lock(&hw->blk[blk].masks.lock);
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return status;
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}
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/**
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* ice_free_prof_mask - free profile mask
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @mask_idx: index of mask
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*/
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static enum ice_status
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ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
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{
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if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
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return ICE_ERR_PARAM;
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if (!(mask_idx >= hw->blk[blk].masks.first &&
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mask_idx < hw->blk[blk].masks.first + hw->blk[blk].masks.count))
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return ICE_ERR_DOES_NOT_EXIST;
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ice_acquire_lock(&hw->blk[blk].masks.lock);
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if (!hw->blk[blk].masks.masks[mask_idx].in_use)
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goto exit_ice_free_prof_mask;
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if (hw->blk[blk].masks.masks[mask_idx].ref > 1) {
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hw->blk[blk].masks.masks[mask_idx].ref--;
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goto exit_ice_free_prof_mask;
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}
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/* remove mask */
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hw->blk[blk].masks.masks[mask_idx].in_use = false;
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hw->blk[blk].masks.masks[mask_idx].mask = 0;
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hw->blk[blk].masks.masks[mask_idx].idx = 0;
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/* update mask as unused entry */
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ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d", blk, mask_idx);
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ice_write_prof_mask_reg(hw, blk, mask_idx, 0, 0);
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exit_ice_free_prof_mask:
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ice_release_lock(&hw->blk[blk].masks.lock);
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return ICE_SUCCESS;
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}
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/**
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* ice_free_prof_masks - free all profile masks for a profile
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @prof_id: profile id
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*/
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static enum ice_status
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ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id)
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{
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u32 mask_bm;
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u16 i;
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if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
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return ICE_ERR_PARAM;
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mask_bm = hw->blk[blk].es.mask_ena[prof_id];
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for (i = 0; i < BITS_PER_BYTE * sizeof(mask_bm); i++)
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if (mask_bm & BIT(i))
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ice_free_prof_mask(hw, blk, i);
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return ICE_SUCCESS;
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}
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/**
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* ice_shutdown_prof_masks - releases lock for masking
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* @hw: pointer to the HW struct
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* @blk: hardware block
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*
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* This should be called before unloading the driver
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*/
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static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
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{
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u16 i;
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ice_acquire_lock(&hw->blk[blk].masks.lock);
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for (i = hw->blk[blk].masks.first;
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i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++) {
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ice_write_prof_mask_reg(hw, blk, i, 0, 0);
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hw->blk[blk].masks.masks[i].in_use = false;
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hw->blk[blk].masks.masks[i].idx = 0;
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hw->blk[blk].masks.masks[i].mask = 0;
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}
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ice_release_lock(&hw->blk[blk].masks.lock);
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ice_destroy_lock(&hw->blk[blk].masks.lock);
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}
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/**
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* ice_shutdown_all_prof_masks - releases all locks for masking
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* @hw: pointer to the HW struct
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* @blk: hardware block
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*
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* This should be called before unloading the driver
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*/
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void ice_shutdown_all_prof_masks(struct ice_hw *hw)
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{
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ice_shutdown_prof_masks(hw, ICE_BLK_RSS);
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ice_shutdown_prof_masks(hw, ICE_BLK_FD);
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}
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/**
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* ice_update_prof_masking - set registers according to masking
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* @hw: pointer to the HW struct
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* @blk: hardware block
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* @prof_id: profile id
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* @es: field vector
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* @masks: masks
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*/
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static enum ice_status
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ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
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struct ice_fv_word *es, u16 *masks)
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{
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bool err = false;
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u32 ena_mask = 0;
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u16 idx;
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u16 i;
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/* Only support FD and RSS masking, otherwise nothing to be done */
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if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
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return ICE_SUCCESS;
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for (i = 0; i < hw->blk[blk].es.fvw; i++)
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if (masks[i] && masks[i] != 0xFFFF) {
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if (!ice_alloc_prof_mask(hw, blk, i, masks[i], &idx)) {
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ena_mask |= BIT(idx);
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} else {
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/* not enough bitmaps */
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err = true;
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break;
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}
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}
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if (err) {
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/* free any bitmaps we have allocated */
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for (i = 0; i < BITS_PER_BYTE * sizeof(ena_mask); i++)
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if (ena_mask & BIT(i))
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ice_free_prof_mask(hw, blk, i);
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return ICE_ERR_OUT_OF_RANGE;
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}
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/* enable the masks for this profile */
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ice_write_prof_mask_enable_res(hw, blk, prof_id, ena_mask);
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/* store enabled masks with profile so that they can be freed later */
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hw->blk[blk].es.mask_ena[prof_id] = ena_mask;
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return ICE_SUCCESS;
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}
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/**
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* ice_write_es - write an extraction sequence to hardware
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* @hw: pointer to the HW struct
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@ -2725,6 +3149,7 @@ ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
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if (hw->blk[blk].es.ref_count[prof_id] > 0) {
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if (!--hw->blk[blk].es.ref_count[prof_id]) {
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ice_write_es(hw, blk, prof_id, NULL);
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ice_free_prof_masks(hw, blk, prof_id);
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return ice_free_prof_id(hw, blk, prof_id);
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}
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}
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@ -3089,6 +3514,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
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ice_free(hw, hw->blk[i].es.t);
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ice_free(hw, hw->blk[i].es.ref_count);
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ice_free(hw, hw->blk[i].es.written);
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ice_free(hw, hw->blk[i].es.mask_ena);
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}
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LIST_FOR_EACH_ENTRY_SAFE(r, rt, &hw->rss_list_head,
|
||||
@ -3097,6 +3523,7 @@ void ice_free_hw_tbls(struct ice_hw *hw)
|
||||
ice_free(hw, r);
|
||||
}
|
||||
ice_destroy_lock(&hw->rss_locks);
|
||||
ice_shutdown_all_prof_masks(hw);
|
||||
ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);
|
||||
}
|
||||
|
||||
@ -3121,6 +3548,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
|
||||
|
||||
ice_init_lock(&hw->rss_locks);
|
||||
INIT_LIST_HEAD(&hw->rss_list_head);
|
||||
ice_init_all_prof_masks(hw);
|
||||
for (i = 0; i < ICE_BLK_COUNT; i++) {
|
||||
struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
|
||||
struct ice_prof_tcam *prof = &hw->blk[i].prof;
|
||||
@ -3212,7 +3640,8 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
|
||||
|
||||
es->written = (u8 *)
|
||||
ice_calloc(hw, es->count, sizeof(*es->written));
|
||||
|
||||
es->mask_ena = (u32 *)
|
||||
ice_calloc(hw, es->count, sizeof(*es->mask_ena));
|
||||
if (!es->ref_count)
|
||||
goto err;
|
||||
}
|
||||
@ -3853,6 +4282,115 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
|
||||
return ICE_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_add_prof_with_mask - add profile
|
||||
* @hw: pointer to the HW struct
|
||||
* @blk: hardware block
|
||||
* @id: profile tracking ID
|
||||
* @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
|
||||
* @es: extraction sequence (length of array is determined by the block)
|
||||
* @masks: extraction sequence (length of array is determined by the block)
|
||||
*
|
||||
* This function registers a profile, which matches a set of PTYPES with a
|
||||
* particular extraction sequence. While the hardware profile is allocated
|
||||
* it will not be written until the first call to ice_add_flow that specifies
|
||||
* the ID value used here.
|
||||
*/
|
||||
enum ice_status
|
||||
ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id,
|
||||
u8 ptypes[], struct ice_fv_word *es, u16 *masks)
|
||||
{
|
||||
u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
|
||||
struct ice_prof_map *prof;
|
||||
enum ice_status status;
|
||||
u32 byte = 0;
|
||||
u8 prof_id;
|
||||
|
||||
ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
|
||||
|
||||
/* search for existing profile */
|
||||
status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id);
|
||||
if (status) {
|
||||
/* allocate profile ID */
|
||||
status = ice_alloc_prof_id(hw, blk, &prof_id);
|
||||
if (status)
|
||||
goto err_ice_add_prof;
|
||||
if (blk == ICE_BLK_FD) {
|
||||
/* For Flow Director block, the extraction sequence may
|
||||
* need to be altered in the case where there are paired
|
||||
* fields that have no match. This is necessary because
|
||||
* for Flow Director, src and dest fields need to paired
|
||||
* for filter programming and these values are swapped
|
||||
* during Tx.
|
||||
*/
|
||||
status = ice_update_fd_swap(hw, prof_id, es);
|
||||
if (status)
|
||||
goto err_ice_add_prof;
|
||||
}
|
||||
status = ice_update_prof_masking(hw, blk, prof_id, es, masks);
|
||||
if (status)
|
||||
goto err_ice_add_prof;
|
||||
|
||||
/* and write new es */
|
||||
ice_write_es(hw, blk, prof_id, es);
|
||||
}
|
||||
|
||||
ice_prof_inc_ref(hw, blk, prof_id);
|
||||
|
||||
/* add profile info */
|
||||
|
||||
prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));
|
||||
if (!prof)
|
||||
goto err_ice_add_prof;
|
||||
|
||||
prof->profile_cookie = id;
|
||||
prof->prof_id = prof_id;
|
||||
prof->ptype_count = 0;
|
||||
prof->context = 0;
|
||||
|
||||
/* build list of ptgs */
|
||||
while (bytes && prof->ptype_count < ICE_MAX_PTYPE_PER_PROFILE) {
|
||||
u32 bit;
|
||||
|
||||
if (!ptypes[byte]) {
|
||||
bytes--;
|
||||
byte++;
|
||||
continue;
|
||||
}
|
||||
/* Examine 8 bits per byte */
|
||||
for (bit = 0; bit < 8; bit++) {
|
||||
if (ptypes[byte] & BIT(bit)) {
|
||||
u16 ptype;
|
||||
u8 m;
|
||||
|
||||
ptype = byte * BITS_PER_BYTE + bit;
|
||||
if (ptype < ICE_FLOW_PTYPE_MAX) {
|
||||
prof->ptype[prof->ptype_count] = ptype;
|
||||
|
||||
if (++prof->ptype_count >=
|
||||
ICE_MAX_PTYPE_PER_PROFILE)
|
||||
break;
|
||||
}
|
||||
|
||||
/* nothing left in byte, then exit */
|
||||
m = ~((1 << (bit + 1)) - 1);
|
||||
if (!(ptypes[byte] & m))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
bytes--;
|
||||
byte++;
|
||||
}
|
||||
|
||||
LIST_ADD(&prof->list, &hw->blk[blk].es.prof_map);
|
||||
status = ICE_SUCCESS;
|
||||
|
||||
err_ice_add_prof:
|
||||
ice_release_lock(&hw->blk[blk].es.prof_map_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* ice_add_prof - add profile
|
||||
* @hw: pointer to the HW struct
|
||||
|
||||
@ -45,8 +45,13 @@ ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type);
|
||||
enum ice_status
|
||||
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
|
||||
enum ice_status
|
||||
ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id,
|
||||
u8 ptypes[], struct ice_fv_word *es, u16 *masks);
|
||||
enum ice_status
|
||||
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
|
||||
struct ice_fv_word *es);
|
||||
void ice_init_all_prof_masks(struct ice_hw *hw);
|
||||
void ice_shutdown_all_prof_masks(struct ice_hw *hw);
|
||||
struct ice_prof_map *
|
||||
ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);
|
||||
enum ice_status
|
||||
|
||||
@ -490,6 +490,7 @@ struct ice_es {
|
||||
u16 count;
|
||||
u16 fvw;
|
||||
u16 *ref_count;
|
||||
u32 *mask_ena;
|
||||
struct LIST_HEAD_TYPE prof_map;
|
||||
struct ice_fv_word *t;
|
||||
struct ice_lock prof_map_lock; /* protect access to profiles list */
|
||||
@ -654,6 +655,21 @@ struct ice_prof_redir {
|
||||
u16 count;
|
||||
};
|
||||
|
||||
struct ice_mask {
|
||||
u16 mask; /* 16-bit mask */
|
||||
u16 idx; /* index */
|
||||
u16 ref; /* reference count */
|
||||
u8 in_use; /* non-zero if used */
|
||||
};
|
||||
|
||||
struct ice_masks {
|
||||
struct ice_lock lock; /* lock to protect this structure */
|
||||
u16 first; /* first mask owned by the PF */
|
||||
u16 count; /* number of masks owned by the PF */
|
||||
#define ICE_PROFILE_MASK_COUNT 32
|
||||
struct ice_mask masks[ICE_PROFILE_MASK_COUNT];
|
||||
};
|
||||
|
||||
/* Tables per block */
|
||||
struct ice_blk_info {
|
||||
struct ice_xlt1 xlt1;
|
||||
@ -661,6 +677,7 @@ struct ice_blk_info {
|
||||
struct ice_prof_tcam prof;
|
||||
struct ice_prof_redir prof_redir;
|
||||
struct ice_es es;
|
||||
struct ice_masks masks;
|
||||
u8 overwrite; /* set to true to allow overwrite of table entries */
|
||||
u8 is_list_init;
|
||||
};
|
||||
|
||||
@ -34,12 +34,21 @@ struct ice_flow_field_info {
|
||||
enum ice_flow_seg_hdr hdr;
|
||||
s16 off; /* Offset from start of a protocol header, in bits */
|
||||
u16 size; /* Size of fields in bits */
|
||||
u16 mask; /* 16-bit mask for field */
|
||||
};
|
||||
|
||||
#define ICE_FLOW_FLD_INFO(_hdr, _offset_bytes, _size_bytes) { \
|
||||
.hdr = _hdr, \
|
||||
.off = _offset_bytes * BITS_PER_BYTE, \
|
||||
.size = _size_bytes * BITS_PER_BYTE, \
|
||||
.off = (_offset_bytes) * BITS_PER_BYTE, \
|
||||
.size = (_size_bytes) * BITS_PER_BYTE, \
|
||||
.mask = 0, \
|
||||
}
|
||||
|
||||
#define ICE_FLOW_FLD_INFO_MSK(_hdr, _offset_bytes, _size_bytes, _mask) { \
|
||||
.hdr = _hdr, \
|
||||
.off = (_offset_bytes) * BITS_PER_BYTE, \
|
||||
.size = (_size_bytes) * BITS_PER_BYTE, \
|
||||
.mask = _mask, \
|
||||
}
|
||||
|
||||
/* Table containing properties of supported protocol header fields */
|
||||
@ -292,7 +301,7 @@ struct ice_flow_prof_params {
|
||||
* This will give us the direction flags.
|
||||
*/
|
||||
struct ice_fv_word es[ICE_MAX_FV_WORDS];
|
||||
|
||||
u16 mask[ICE_MAX_FV_WORDS];
|
||||
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
|
||||
};
|
||||
|
||||
@ -544,6 +553,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
|
||||
struct ice_flow_fld_info *flds;
|
||||
u16 cnt, ese_bits, i;
|
||||
s16 adj = 0;
|
||||
u16 mask;
|
||||
u16 off;
|
||||
|
||||
flds = params->prof->segs[seg].fields;
|
||||
@ -652,6 +662,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
|
||||
|
||||
/* Fill in the extraction sequence entries needed for this field */
|
||||
off = flds[fld].xtrct.off;
|
||||
mask = ice_flds_info[fld].mask;
|
||||
for (i = 0; i < cnt; i++) {
|
||||
/* Only consume an extraction sequence entry if there is no
|
||||
* sibling field associated with this field or the sibling entry
|
||||
@ -676,6 +687,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
|
||||
|
||||
params->es[idx].prot_id = prot_id;
|
||||
params->es[idx].off = off;
|
||||
params->mask[idx] = mask;
|
||||
params->es_cnt++;
|
||||
}
|
||||
|
||||
@ -1048,7 +1060,8 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
|
||||
}
|
||||
|
||||
/* Add a HW profile for this flow profile */
|
||||
status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes, params.es);
|
||||
status = ice_add_prof_with_mask(hw, blk, prof_id, (u8 *)params.ptypes,
|
||||
params.es, params.mask);
|
||||
if (status) {
|
||||
ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");
|
||||
goto out;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user