use registered name for OCTEON TX references
'OCTEON TX' is the registered name. All other usages need to be fixed. Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Anoob Joseph
Thomas Monjalon
parent
96b5a4df6b
commit
95a6b04f7d
@ -523,7 +523,7 @@ F: drivers/net/liquidio/
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F: doc/guides/nics/liquidio.rst
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F: doc/guides/nics/features/liquidio.ini
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Cavium OcteonTX
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Cavium OCTEON TX
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M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
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F: drivers/common/octeontx/
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F: drivers/mempool/octeontx/
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@ -909,7 +909,7 @@ Compression Drivers
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M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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T: git://dpdk.org/next/dpdk-next-crypto
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Cavium OCTEONTX zipvf
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Cavium OCTEON TX zipvf
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M: Ashish Gupta <ashish.gupta@cavium.com>
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F: drivers/compress/octeontx/
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F: doc/guides/compressdevs/octeontx.rst
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@ -938,12 +938,12 @@ Eventdev Drivers
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M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
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T: git://dpdk.org/next/dpdk-next-eventdev
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Cavium OCTEONTX ssovf
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Cavium OCTEON TX ssovf
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M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
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F: drivers/event/octeontx/
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F: doc/guides/eventdevs/octeontx.rst
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Cavium OCTEONTX timvf
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Cavium OCTEON TX timvf
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M: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
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F: drivers/event/octeontx/timvf_*
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@ -1,7 +1,7 @@
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;
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; Refer to default.ini for the full list of available PMD features.
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;
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; Supported features of 'OCTEONTX ZIP' compression driver.
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; Supported features of 'OCTEON TX ZIP' compression driver.
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;
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[Features]
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HW Accelerated = Y
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@ -1,12 +1,12 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2018 Cavium Networks.
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Octeontx ZIP Compression Poll Mode Driver
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=========================================
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OCTEON TX ZIP Compression Poll Mode Driver
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==========================================
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The Octeontx ZIP PMD (**librte_pmd_octeontx_zip**) provides poll mode
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The OCTEON TX ZIP PMD (**librte_pmd_octeontx_zip**) provides poll mode
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compression & decompression driver for ZIP HW offload device, found in
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**Cavium OCTEONTX** SoC family.
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**Cavium OCTEON TX** SoC family.
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More information can be found at `Cavium, Inc Official Website
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<http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
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@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
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Features
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--------
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Octeontx ZIP PMD has support for:
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OCTEON TX ZIP PMD has support for:
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Compression/Decompression algorithm:
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@ -34,24 +34,24 @@ Limitations
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* Chained mbufs are not supported.
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Supported OCTEONTX SoCs
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-----------------------
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Supported OCTEON TX SoCs
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------------------------
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- CN83xx
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Steps To Setup Platform
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-----------------------
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Octeontx SDK includes kernel image which provides Octeontx ZIP PF
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OCTEON TX SDK includes kernel image which provides OCTEON TX ZIP PF
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driver to manage configuration of ZIPVF device
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Required version of SDK is "OCTEONTX-SDK-6.2.0-build35" or above.
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SDK can be install by using below command.
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#rpm -ivh CTEONTX-SDK-6.2.0-build35.x86_64.rpm --force --nodeps
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#rpm -ivh OCTEONTX-SDK-6.2.0-build35.x86_64.rpm --force --nodeps
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It will install OCTEONTX-SDK at following default location
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/usr/local/Cavium_Networks/OCTEONTX-SDK/
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For more information on building and booting linux kernel on OCTEONTX
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For more information on building and booting linux kernel on OCTEON TX
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please refer /usr/local/Cavium_Networks/OCTEONTX-SDK/docs/OcteonTX-SDK-UG_6.2.0.pdf.
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SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
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@ -62,7 +62,7 @@ Installation
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Driver Compilation
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~~~~~~~~~~~~~~~~~~
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To compile the OCTEONTX ZIP PMD for Linux arm64 gcc target, run the
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To compile the OCTEON TX ZIP PMD for Linux arm64 gcc target, run the
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following ``make`` command:
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.. code-block:: console
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@ -74,7 +74,7 @@ following ``make`` command:
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Initialization
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--------------
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The octeontx zip is exposed as pci device which consists of a set of
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The OCTEON TX zip is exposed as pci device which consists of a set of
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PCIe VF devices. On EAL initialization, ZIP PCIe VF devices will be
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probed. To use the PMD in an application, user must:
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@ -1,11 +1,11 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2017 Cavium, Inc
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OCTEONTX SSOVF Eventdev Driver
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==============================
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OCTEON TX SSOVF Eventdev Driver
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===============================
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The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
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eventdev driver support for the inbuilt event device found in the **Cavium OCTEONTX**
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The OCTEON TX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
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eventdev driver support for the inbuilt event device found in the **Cavium OCTEON TX**
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SoC family as well as their virtual functions (VF) in SR-IOV context.
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More information can be found at `Cavium, Inc Official Website
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@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
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Features
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--------
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Features of the OCTEONTX SSOVF PMD are:
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Features of the OCTEON TX SSOVF PMD are:
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- 64 Event queues
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- 32 Event ports
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@ -32,8 +32,8 @@ Features of the OCTEONTX SSOVF PMD are:
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time granularity of 1us.
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- Up to 64 event timer adapters.
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Supported OCTEONTX SoCs
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-----------------------
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Supported OCTEON TX SoCs
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------------------------
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- CN83xx
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Prerequisites
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@ -57,7 +57,7 @@ Please note that enabling debugging options may affect system performance.
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Driver Compilation
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~~~~~~~~~~~~~~~~~~
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To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
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To compile the OCTEON TX SSOVF PMD for Linux arm64 gcc target, run the
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following ``make`` command:
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.. code-block:: console
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@ -69,7 +69,7 @@ following ``make`` command:
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Initialization
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--------------
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The octeontx eventdev is exposed as a vdev device which consists of a set
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The OCTEON TX eventdev is exposed as a vdev device which consists of a set
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of SSO group and work-slot PCIe VF devices. On EAL initialization,
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SSO PCIe VF devices will be probed and then the vdev device can be created
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from the application code, or from the EAL command line based on
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@ -90,7 +90,7 @@ Example:
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Selftest
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--------
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The functionality of octeontx eventdev can be verified using this option,
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The functionality of OCTEON TX eventdev can be verified using this option,
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various unit and functional tests are run to verify the sanity.
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The tests are run once the vdev creation is successfully complete.
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@ -1,11 +1,11 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2017 Cavium, Inc
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OCTEONTX FPAVF Mempool Driver
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=============================
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OCTEON TX FPAVF Mempool Driver
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==============================
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The OCTEONTX FPAVF PMD (**librte_mempool_octeontx**) is a mempool
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driver for offload mempool device found in **Cavium OCTEONTX** SoC
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The OCTEON TX FPAVF PMD (**librte_mempool_octeontx**) is a mempool
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driver for offload mempool device found in **Cavium OCTEON TX** SoC
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family.
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More information can be found at `Cavium, Inc Official Website
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@ -14,14 +14,14 @@ More information can be found at `Cavium, Inc Official Website
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Features
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--------
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Features of the OCTEONTX FPAVF PMD are:
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Features of the OCTEON TX FPAVF PMD are:
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- 32 SR-IOV Virtual functions
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- 32 Pools
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- HW mempool manager
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Supported OCTEONTX SoCs
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-----------------------
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Supported OCTEON TX SoCs
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------------------------
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- CN83xx
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@ -50,7 +50,7 @@ Please note that enabling debugging options may affect system performance.
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Driver Compilation
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~~~~~~~~~~~~~~~~~~
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To compile the OCTEONTX FPAVF MEMPOOL PMD for Linux arm64 gcc target, run the
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To compile the OCTEON TX FPAVF MEMPOOL PMD for Linux arm64 gcc target, run the
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following ``make`` command:
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.. code-block:: console
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@ -62,7 +62,7 @@ following ``make`` command:
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Initialization
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--------------
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The octeontx fpavf mempool initialization similar to other mempool
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The OCTEON TX fpavf mempool initialization similar to other mempool
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drivers like ring. However user need to pass --base-virtaddr as
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command line input to application example test_mempool.c application.
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@ -1,11 +1,11 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2017 Cavium, Inc
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OCTEONTX Poll Mode driver
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=========================
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OCTEON TX Poll Mode driver
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==========================
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The OCTEONTX ETHDEV PMD (**librte_pmd_octeontx**) provides poll mode ethdev
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driver support for the inbuilt network device found in the **Cavium OCTEONTX**
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The OCTEON TX ETHDEV PMD (**librte_pmd_octeontx**) provides poll mode ethdev
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driver support for the inbuilt network device found in the **Cavium OCTEON TX**
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SoC family as well as their virtual functions (VF) in SR-IOV context.
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More information can be found at `Cavium, Inc Official Website
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@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
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Features
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--------
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Features of the OCTEONTX Ethdev PMD are:
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Features of the OCTEON TX Ethdev PMD are:
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- Packet type information
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- Promiscuous mode
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@ -26,8 +26,8 @@ Features of the OCTEONTX Ethdev PMD are:
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- Lock-free Tx queue
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- HW offloaded `ethdev Rx queue` to `eventdev event queue` packet injection
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Supported OCTEONTX SoCs
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-----------------------
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Supported OCTEON TX SoCs
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------------------------
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- CN83xx
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@ -65,7 +65,7 @@ Driver compilation and testing
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Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
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for details.
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To compile the OCTEONTX PMD for Linux arm64 gcc target, run the
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To compile the OCTEON TX PMD for Linux arm64 gcc target, run the
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following ``make`` command:
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.. code-block:: console
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@ -122,7 +122,7 @@ following ``make`` command:
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Initialization
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--------------
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The octeontx ethdev pmd is exposed as a vdev device which consists of a set
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The OCTEON TX ethdev pmd is exposed as a vdev device which consists of a set
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of PKI and PKO PCIe VF devices. On EAL initialization,
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PKI/PKO PCIe VF devices will be probed and then the vdev device can be created
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from the application code, or from the EAL command line based on
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@ -156,21 +156,21 @@ Limitations
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``octeontx_fpavf`` external mempool handler dependency
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The OCTEONTX SoC family NIC has inbuilt HW assisted external mempool manager.
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The OCTEON TX SoC family NIC has inbuilt HW assisted external mempool manager.
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This driver will only work with ``octeontx_fpavf`` external mempool handler
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as it is the most performance effective way for packet allocation and Tx buffer
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recycling on OCTEONTX SoC platform.
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recycling on OCTEON TX SoC platform.
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CRC striping
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~~~~~~~~~~~~
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The OCTEONTX SoC family NICs strip the CRC for every packets coming into the
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The OCTEON TX SoC family NICs strip the CRC for every packets coming into the
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host interface irrespective of the offload configuration.
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Maximum packet length
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~~~~~~~~~~~~~~~~~~~~~
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The OCTEONTX SoC family NICs support a maximum of a 32K jumbo frame. The value
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The OCTEON TX SoC family NICs support a maximum of a 32K jumbo frame. The value
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is fixed and cannot be changed. So, even when the ``rxmode.max_rx_pkt_len``
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member of ``struct rte_eth_conf`` is set to a value lower than 32k, frames
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up to 32k bytes can still reach the host interface.
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@ -1,12 +1,12 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2017 Cavium, Inc
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OCTEONTX Board Support Package
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==============================
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OCTEON TX Board Support Package
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===============================
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This doc has information about steps to setup octeontx platform
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This doc has information about steps to setup OCTEON TX platform
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and information about common offload hw block drivers of
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**Cavium OCTEONTX** SoC family.
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**Cavium OCTEON TX** SoC family.
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More information about SoC can be found at `Cavium, Inc Official Website
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@ -27,11 +27,11 @@ Steps To Setup Platform
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-----------------------
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There are three main pre-prerequisites for setting up Platform drivers on
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OCTEONTX compatible board:
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OCTEON TX compatible board:
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1. **OCTEONTX Linux kernel PF driver for Network acceleration HW blocks**
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1. **OCTEON TX Linux kernel PF driver for Network acceleration HW blocks**
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The OCTEONTX Linux kernel drivers (includes the required PF driver for the
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The OCTEON TX Linux kernel drivers (includes the required PF driver for the
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Platform drivers) are available on Github at `octeontx-kmod <https://github.com/caviumnetworks/octeontx-kmod>`_
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along with build, install and dpdk usage instructions.
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@ -48,7 +48,7 @@ OCTEONTX compatible board:
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As an alternative method, Platform drivers can also be executed using images provided
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as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
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to bring up a OCTEONTX board.
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to bring up a OCTEON TX board.
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SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
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@ -84,7 +84,7 @@
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#define SSOVF_SELFTEST_ARG ("selftest")
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/*
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* In Cavium OcteonTX SoC, all accesses to the device registers are
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* In Cavium OCTEON TX SoC, all accesses to the device registers are
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* implictly strongly ordered. So, The relaxed version of IO operation is
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* safe to use with out any IO memory barriers.
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*/
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@ -50,7 +50,7 @@
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#define OCTEONTX_FPAVF_BUF_OFFSET 128
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/*
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* In Cavium OcteonTX SoC, all accesses to the device registers are
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* In Cavium OCTEON TX SoC, all accesses to the device registers are
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* implicitly strongly ordered. So, the relaxed version of IO operation is
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* safe to use with out any IO memory barriers.
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*/
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@ -10,7 +10,7 @@
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#include <rte_io.h>
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/* In Cavium OcteonTX SoC, all accesses to the device registers are
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/* In Cavium OCTEON TX SoC, all accesses to the device registers are
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* implicitly strongly ordered. So, The relaxed version of IO operation is
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* safe to use with out any IO memory barriers.
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||||
*/
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Loading…
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Reference in New Issue
Block a user