net/sfc/base: modify phy caps to indicate FEC request
The capability bits to request FEC modes are implicitly valid when the corresponding FEC mode is a supported capability. Drivers expect that it is only valid to advertise those capabilities explicitly marked as supported. The capabilities reported by firmware is modified with the implicit capabilities to present the explicit model to drivers. Signed-off-by: Richard Houldsworth <rhouldsworth@solarflare.com> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
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@ -1772,6 +1772,21 @@ ef10_nic_board_cfg(
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if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
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goto fail6;
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/*
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* Firmware with support for *_FEC capability bits does not
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* report that the corresponding *_FEC_REQUESTED bits are supported.
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* Add them here so that drivers understand that they are supported.
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*/
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if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_BASER_FEC))
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epp->ep_phy_cap_mask |=
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(1u << EFX_PHY_CAP_BASER_FEC_REQUESTED);
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if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_RS_FEC))
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epp->ep_phy_cap_mask |=
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(1u << EFX_PHY_CAP_RS_FEC_REQUESTED);
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if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_25G_BASER_FEC))
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epp->ep_phy_cap_mask |=
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(1u << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
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/* Obtain the default PHY advertised capabilities */
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if ((rc = ef10_phy_get_link(enp, &els)) != 0)
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goto fail7;
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@ -192,11 +192,6 @@ efx_phy_adv_cap_get(
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}
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}
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#define EFX_PHY_CAP_FEC_REQ_MASK \
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(1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) | \
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(1U << EFX_PHY_CAP_RS_FEC_REQUESTED) | \
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(1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED)
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__checkReturn efx_rc_t
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efx_phy_adv_cap_set(
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__in efx_nic_t *enp,
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@ -210,8 +205,7 @@ efx_phy_adv_cap_set(
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
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/* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */
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if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) {
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if ((mask & ~epp->ep_phy_cap_mask) != 0) {
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rc = ENOTSUP;
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goto fail1;
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}
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