ixgbe: add ieee1588 timestamping
Add ixgbe support for new ethdev APIs to enable and read IEEE1588 PTP timestamps. Signed-off-by: John McNamara <john.mcnamara@intel.com> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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@ -118,6 +118,12 @@
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#define IXGBE_HKEY_MAX_INDEX 10
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/* Additional timesync values. */
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#define IXGBE_TIMINCA_16NS_SHIFT 24
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#define IXGBE_TIMINCA_INCVALUE 16000000
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#define IXGBE_TIMINCA_INIT ((0x02 << IXGBE_TIMINCA_16NS_SHIFT) \
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| IXGBE_TIMINCA_INCVALUE)
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static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
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static int ixgbe_dev_configure(struct rte_eth_dev *dev);
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static int ixgbe_dev_start(struct rte_eth_dev *dev);
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@ -263,6 +269,14 @@ static int ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
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struct ether_addr *mc_addr_set,
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uint32_t nb_mc_addr);
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static int ixgbe_timesync_enable(struct rte_eth_dev *dev);
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static int ixgbe_timesync_disable(struct rte_eth_dev *dev);
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static int ixgbe_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
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struct timespec *timestamp,
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uint32_t flags);
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static int ixgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
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struct timespec *timestamp);
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/*
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* Define VF Stats MACRO for Non "cleared on read" register
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*/
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@ -388,6 +402,10 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
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.rss_hash_conf_get = ixgbe_dev_rss_hash_conf_get,
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.filter_ctrl = ixgbe_dev_filter_ctrl,
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.set_mc_addr_list = ixgbe_dev_set_mc_addr_list,
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.timesync_enable = ixgbe_timesync_enable,
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.timesync_disable = ixgbe_timesync_disable,
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.timesync_read_rx_timestamp = ixgbe_timesync_read_rx_timestamp,
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.timesync_read_tx_timestamp = ixgbe_timesync_read_tx_timestamp,
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};
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/*
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@ -4514,6 +4532,110 @@ ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
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ixgbe_dev_addr_list_itr, TRUE);
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}
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static int
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ixgbe_timesync_enable(struct rte_eth_dev *dev)
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{
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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uint32_t tsync_ctl;
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uint32_t tsauxc;
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/* Enable system time for platforms where it isn't on by default. */
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tsauxc = IXGBE_READ_REG(hw, IXGBE_TSAUXC);
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tsauxc &= ~IXGBE_TSAUXC_DISABLE_SYSTIME;
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IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc);
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/* Start incrementing the register used to timestamp PTP packets. */
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IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, IXGBE_TIMINCA_INIT);
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/* Enable L2 filtering of IEEE1588/802.1AS Ethernet frame types. */
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IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588),
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(ETHER_TYPE_1588 |
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IXGBE_ETQF_FILTER_EN |
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IXGBE_ETQF_1588));
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/* Enable timestamping of received PTP packets. */
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tsync_ctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
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tsync_ctl |= IXGBE_TSYNCRXCTL_ENABLED;
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IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, tsync_ctl);
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/* Enable timestamping of transmitted PTP packets. */
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tsync_ctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL);
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tsync_ctl |= IXGBE_TSYNCTXCTL_ENABLED;
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IXGBE_WRITE_REG(hw, IXGBE_TSYNCTXCTL, tsync_ctl);
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return 0;
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}
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static int
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ixgbe_timesync_disable(struct rte_eth_dev *dev)
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{
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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uint32_t tsync_ctl;
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/* Disable timestamping of transmitted PTP packets. */
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tsync_ctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL);
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tsync_ctl &= ~IXGBE_TSYNCTXCTL_ENABLED;
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IXGBE_WRITE_REG(hw, IXGBE_TSYNCTXCTL, tsync_ctl);
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/* Disable timestamping of received PTP packets. */
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tsync_ctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
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tsync_ctl &= ~IXGBE_TSYNCRXCTL_ENABLED;
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IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, tsync_ctl);
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/* Disable L2 filtering of IEEE1588/802.1AS Ethernet frame types. */
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IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588), 0);
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/* Stop incrementating the System Time registers. */
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IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, 0);
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return 0;
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}
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static int
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ixgbe_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
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struct timespec *timestamp,
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uint32_t flags __rte_unused)
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{
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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uint32_t tsync_rxctl;
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uint32_t rx_stmpl;
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uint32_t rx_stmph;
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tsync_rxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
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if ((tsync_rxctl & IXGBE_TSYNCRXCTL_VALID) == 0)
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return -EINVAL;
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rx_stmpl = IXGBE_READ_REG(hw, IXGBE_RXSTMPL);
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rx_stmph = IXGBE_READ_REG(hw, IXGBE_RXSTMPH);
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timestamp->tv_sec = (uint64_t)(((uint64_t)rx_stmph << 32) | rx_stmpl);
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timestamp->tv_nsec = 0;
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return 0;
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}
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static int
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ixgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
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struct timespec *timestamp)
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{
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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uint32_t tsync_txctl;
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uint32_t tx_stmpl;
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uint32_t tx_stmph;
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tsync_txctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL);
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if ((tsync_txctl & IXGBE_TSYNCTXCTL_VALID) == 0)
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return -EINVAL;
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tx_stmpl = IXGBE_READ_REG(hw, IXGBE_TXSTMPL);
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tx_stmph = IXGBE_READ_REG(hw, IXGBE_TXSTMPH);
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timestamp->tv_sec = (uint64_t)(((uint64_t)tx_stmph << 32) | tx_stmpl);
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timestamp->tv_nsec = 0;
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return 0;
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}
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static struct rte_driver rte_ixgbe_driver = {
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.type = PMD_PDEV,
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.init = rte_ixgbe_pmd_init,
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