d/numam-dpdk
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

dma/dpaa2: add driver-specific configuration API

Browse Source 
Add additional PMD APIs for DPAA2 QDMA driver for configuring
RBP, Ultra Short format, and Scatter Gather support

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This commit is contained in:
Nipun Gupta 2022-05-05 14:35:20 +05:30 committed by Thomas Monjalon
parent 379206e9b4
commit 97f9032f5a
6 changed files with 144 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
doc/api/doxy-api-index.md
View File

@ -54,6 +54,7 @@ The public API headers are grouped by topics:
[mlx5] (@ref rte_pmd_mlx5.h),
[dpaa2_mempool] (@ref rte_dpaa2_mempool.h),
[dpaa2_cmdif] (@ref rte_pmd_dpaa2_cmdif.h),
[dpaa2_qdma] (@ref rte_pmd_dpaa2_qdma.h),
[crypto_scheduler] (@ref rte_cryptodev_scheduler.h),
[dlb2] (@ref rte_pmd_dlb2.h),
[ifpga] (@ref rte_pmd_ifpga.h)

1
doc/api/doxy-api.conf.in
View File

@ -7,6 +7,7 @@ USE_MDFILE_AS_MAINPAGE = @TOPDIR@/doc/api/doxy-api-index.md
INPUT = @TOPDIR@/doc/api/doxy-api-index.md \
@TOPDIR@/drivers/bus/vdev \
@TOPDIR@/drivers/crypto/scheduler \
@TOPDIR@/drivers/dma/dpaa2 \
@TOPDIR@/drivers/event/dlb2 \
@TOPDIR@/drivers/mempool/dpaa2 \
@TOPDIR@/drivers/net/ark \

38
drivers/dma/dpaa2/dpaa2_qdma.c
View File

@ -7,7 +7,10 @@
#include <rte_dmadev.h>
#include <rte_dmadev_pmd.h>
#include <rte_kvargs.h>
#include <mc/fsl_dpdmai.h>
#include "rte_pmd_dpaa2_qdma.h"
#include "dpaa2_qdma.h"
#include "dpaa2_qdma_logs.h"
/* Dynamic log type identifier */
@ -71,6 +74,41 @@ dpaa2_qdma_configure(struct rte_dma_dev *dev,
return 0;
}
/* Enable FD in Ultra Short format */
void
rte_dpaa2_qdma_vchan_fd_us_enable(int16_t dev_id, uint16_t vchan)
{
struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
struct dpaa2_dpdmai_dev *dpdmai_dev = obj->dev_private;
struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;
qdma_dev->vqs[vchan].flags |= DPAA2_QDMA_VQ_FD_SHORT_FORMAT;
}
/* Enable internal SG processing */
void
rte_dpaa2_qdma_vchan_internal_sg_enable(int16_t dev_id, uint16_t vchan)
{
struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
struct dpaa2_dpdmai_dev *dpdmai_dev = obj->dev_private;
struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;
qdma_dev->vqs[vchan].flags |= DPAA2_QDMA_VQ_FD_SG_FORMAT;
}
/* Enable RBP */
void
rte_dpaa2_qdma_vchan_rbp_enable(int16_t dev_id, uint16_t vchan,
struct rte_dpaa2_qdma_rbp *rbp_config)
{
struct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];
struct dpaa2_dpdmai_dev *dpdmai_dev = obj->dev_private;
struct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;
memcpy(&qdma_dev->vqs[vchan].rbp, rbp_config,
sizeof(struct rte_dpaa2_qdma_rbp));
}
static int
dpaa2_qdma_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
const struct rte_dma_vchan_conf *conf,

2
drivers/dma/dpaa2/meson.build
View File

@ -14,3 +14,5 @@ sources = files('dpaa2_qdma.c')
if cc.has_argument('-Wno-pointer-arith')
cflags += '-Wno-pointer-arith'
endif
headers = files('rte_pmd_dpaa2_qdma.h')

96
drivers/dma/dpaa2/rte_pmd_dpaa2_qdma.h Normal file
View File

@ -0,0 +1,96 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright 2021-2022 NXP
*/
#ifndef _RTE_PMD_DPAA2_QDMA_H_
#define _RTE_PMD_DPAA2_QDMA_H_
/** States if the source addresses is physical. */
#define RTE_DPAA2_QDMA_JOB_SRC_PHY (1ULL << 30)
/** States if the destination addresses is physical. */
#define RTE_DPAA2_QDMA_JOB_DEST_PHY (1ULL << 31)
struct rte_dpaa2_qdma_rbp {
uint32_t use_ultrashort:1;
uint32_t enable:1;
/**
* dportid:
* 0000 PCI-Express 1
* 0001 PCI-Express 2
* 0010 PCI-Express 3
* 0011 PCI-Express 4
* 0100 PCI-Express 5
* 0101 PCI-Express 6
*/
uint32_t dportid:4;
uint32_t dpfid:2;
uint32_t dvfid:6;
/*using route by port for destination */
uint32_t drbp:1;
/**
* sportid:
* 0000 PCI-Express 1
* 0001 PCI-Express 2
* 0010 PCI-Express 3
* 0011 PCI-Express 4
* 0100 PCI-Express 5
* 0101 PCI-Express 6
*/
uint32_t sportid:4;
uint32_t spfid:2;
uint32_t svfid:6;
/* using route by port for source */
uint32_t srbp:1;
uint32_t rsv:4;
};
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
* Enable FD in Ultra Short format on a channel. This API should be
* called before calling 'rte_dma_vchan_setup()' API.
*
* @param dev_id
* The identifier of the device.
* @param vchan
* The identifier of virtual DMA channel.
*/
__rte_experimental
void rte_dpaa2_qdma_vchan_fd_us_enable(int16_t dev_id, uint16_t vchan);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
* Enable internal SG processing on a channel. This API should be
* called before calling 'rte_dma_vchan_setup()' API.
*
* @param dev_id
* The identifier of the device.
* @param vchan
* The identifier of virtual DMA channel.
*/
__rte_experimental
void rte_dpaa2_qdma_vchan_internal_sg_enable(int16_t dev_id, uint16_t vchan);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
* Enable Route-by-port on a channel. This API should be
* called before calling 'rte_dma_vchan_setup()' API.
*
* @param dev_id
* The identifier of the device.
* @param vchan
* The identifier of virtual DMA channel.
* @param rbp_config
* Configuration for route-by-port
*/
__rte_experimental
void rte_dpaa2_qdma_vchan_rbp_enable(int16_t dev_id, uint16_t vchan,
struct rte_dpaa2_qdma_rbp *rbp_config);
#endif /* _RTE_PMD_DPAA2_QDMA_H_ */

6
drivers/dma/dpaa2/version.map
View File

@ -1,3 +1,9 @@
DPDK_22 {
local: *;
};
EXPERIMENTAL {
rte_dpaa2_qdma_vchan_fd_us_enable;
rte_dpaa2_qdma_vchan_internal_sg_enable;
rte_dpaa2_qdma_vchan_rbp_enable;
};