net/dpaa: rearrange atomic queue support
This is to align the code with dpaa2 to ease out maintenance of both driver code bases. Signed-off-by: Sunil Kumar Kori <sunil.kori@nxp.com>
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@ -870,6 +870,19 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
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DPAA_TX_BURST_SIZE : nb_bufs;
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for (loop = 0; loop < frames_to_send; loop++) {
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mbuf = *(bufs++);
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seqn = mbuf->seqn;
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if (seqn != DPAA_INVALID_MBUF_SEQN) {
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index = seqn - 1;
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if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
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flags[loop] =
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((index & QM_EQCR_DCA_IDXMASK) << 8);
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flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
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DPAA_PER_LCORE_DQRR_SIZE--;
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DPAA_PER_LCORE_DQRR_HELD &=
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~(1 << index);
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}
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}
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if (likely(RTE_MBUF_DIRECT(mbuf))) {
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mp = mbuf->pool;
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bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
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@ -916,18 +929,6 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
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goto send_pkts;
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}
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}
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seqn = mbuf->seqn;
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if (seqn != DPAA_INVALID_MBUF_SEQN) {
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index = seqn - 1;
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if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
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flags[loop] =
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((index & QM_EQCR_DCA_IDXMASK) << 8);
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flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
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DPAA_PER_LCORE_DQRR_SIZE--;
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DPAA_PER_LCORE_DQRR_HELD &=
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~(1 << index);
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}
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}
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}
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send_pkts:
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