net/idpf: add Rx queue setup
Add support for rx_queue_setup ops. Signed-off-by: Beilei Xing <beilei.xing@intel.com> Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
This commit is contained in:
Junfeng Guo
Thomas Monjalon
parent
ffac2f187c
commit
9c47c29739
@ -48,12 +48,22 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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.tx_rs_thresh = IDPF_DEFAULT_TX_RS_THRESH,
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};
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dev_info->default_rxconf = (struct rte_eth_rxconf) {
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.rx_free_thresh = IDPF_DEFAULT_RX_FREE_THRESH,
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};
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dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
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.nb_max = IDPF_MAX_RING_DESC,
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.nb_min = IDPF_MIN_RING_DESC,
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.nb_align = IDPF_ALIGN_RING_DESC,
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};
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dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
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.nb_max = IDPF_MAX_RING_DESC,
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.nb_min = IDPF_MIN_RING_DESC,
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.nb_align = IDPF_ALIGN_RING_DESC,
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};
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return 0;
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}
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@ -643,6 +653,7 @@ idpf_adapter_init(struct rte_pci_device *pci_dev, struct idpf_adapter *adapter)
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static const struct eth_dev_ops idpf_eth_dev_ops = {
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.dev_configure = idpf_dev_configure,
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.dev_close = idpf_dev_close,
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.rx_queue_setup = idpf_rx_queue_setup,
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.tx_queue_setup = idpf_tx_queue_setup,
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.dev_infos_get = idpf_dev_info_get,
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};
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@ -8,6 +8,21 @@
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#include "idpf_ethdev.h"
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#include "idpf_rxtx.h"
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static int
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check_rx_thresh(uint16_t nb_desc, uint16_t thresh)
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{
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/* The following constraints must be satisfied:
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* thresh < rxq->nb_rx_desc
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*/
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if (thresh >= nb_desc) {
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PMD_INIT_LOG(ERR, "rx_free_thresh (%u) must be less than %u",
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thresh, nb_desc);
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return -EINVAL;
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}
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return 0;
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}
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static int
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check_tx_thresh(uint16_t nb_desc, uint16_t tx_rs_thresh,
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uint16_t tx_free_thresh)
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@ -56,6 +71,87 @@ check_tx_thresh(uint16_t nb_desc, uint16_t tx_rs_thresh,
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return 0;
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}
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static void
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reset_split_rx_descq(struct idpf_rx_queue *rxq)
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{
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uint16_t len;
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uint32_t i;
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if (rxq == NULL)
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return;
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len = rxq->nb_rx_desc + IDPF_RX_MAX_BURST;
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for (i = 0; i < len * sizeof(struct virtchnl2_rx_flex_desc_adv_nic_3);
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i++)
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((volatile char *)rxq->rx_ring)[i] = 0;
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rxq->rx_tail = 0;
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rxq->expected_gen_id = 1;
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}
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static void
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reset_split_rx_bufq(struct idpf_rx_queue *rxq)
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{
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uint16_t len;
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uint32_t i;
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if (rxq == NULL)
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return;
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len = rxq->nb_rx_desc + IDPF_RX_MAX_BURST;
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for (i = 0; i < len * sizeof(struct virtchnl2_splitq_rx_buf_desc);
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i++)
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((volatile char *)rxq->rx_ring)[i] = 0;
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memset(&rxq->fake_mbuf, 0x0, sizeof(rxq->fake_mbuf));
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for (i = 0; i < IDPF_RX_MAX_BURST; i++)
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rxq->sw_ring[rxq->nb_rx_desc + i] = &rxq->fake_mbuf;
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/* The next descriptor id which can be received. */
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rxq->rx_next_avail = 0;
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/* The next descriptor id which can be refilled. */
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rxq->rx_tail = 0;
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/* The number of descriptors which can be refilled. */
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rxq->nb_rx_hold = rxq->nb_rx_desc - 1;
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rxq->bufq1 = NULL;
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rxq->bufq2 = NULL;
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}
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static void
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reset_single_rx_queue(struct idpf_rx_queue *rxq)
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{
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uint16_t len;
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uint32_t i;
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if (rxq == NULL)
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return;
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len = rxq->nb_rx_desc + IDPF_RX_MAX_BURST;
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for (i = 0; i < len * sizeof(struct virtchnl2_singleq_rx_buf_desc);
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i++)
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((volatile char *)rxq->rx_ring)[i] = 0;
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memset(&rxq->fake_mbuf, 0x0, sizeof(rxq->fake_mbuf));
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for (i = 0; i < IDPF_RX_MAX_BURST; i++)
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rxq->sw_ring[rxq->nb_rx_desc + i] = &rxq->fake_mbuf;
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rxq->rx_tail = 0;
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rxq->nb_rx_hold = 0;
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if (rxq->pkt_first_seg != NULL)
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rte_pktmbuf_free(rxq->pkt_first_seg);
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rxq->pkt_first_seg = NULL;
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rxq->pkt_last_seg = NULL;
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}
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static void
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reset_split_tx_descq(struct idpf_tx_queue *txq)
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{
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@ -145,6 +241,310 @@ reset_single_tx_queue(struct idpf_tx_queue *txq)
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txq->next_rs = txq->rs_thresh - 1;
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}
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static int
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idpf_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *bufq,
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uint16_t queue_idx, uint16_t rx_free_thresh,
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uint16_t nb_desc, unsigned int socket_id,
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struct rte_mempool *mp)
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{
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struct idpf_vport *vport = dev->data->dev_private;
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struct idpf_adapter *adapter = vport->adapter;
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struct idpf_hw *hw = &adapter->hw;
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const struct rte_memzone *mz;
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uint32_t ring_size;
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uint16_t len;
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bufq->mp = mp;
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bufq->nb_rx_desc = nb_desc;
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bufq->rx_free_thresh = rx_free_thresh;
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bufq->queue_id = vport->chunks_info.rx_buf_start_qid + queue_idx;
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bufq->port_id = dev->data->port_id;
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bufq->rx_hdr_len = 0;
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bufq->adapter = adapter;
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len = rte_pktmbuf_data_room_size(bufq->mp) - RTE_PKTMBUF_HEADROOM;
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bufq->rx_buf_len = len;
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/* Allocate the software ring. */
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len = nb_desc + IDPF_RX_MAX_BURST;
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bufq->sw_ring =
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rte_zmalloc_socket("idpf rx bufq sw ring",
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sizeof(struct rte_mbuf *) * len,
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (bufq->sw_ring == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for SW ring");
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return -ENOMEM;
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}
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/* Allocate a liitle more to support bulk allocate. */
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len = nb_desc + IDPF_RX_MAX_BURST;
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ring_size = RTE_ALIGN(len *
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sizeof(struct virtchnl2_splitq_rx_buf_desc),
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IDPF_DMA_MEM_ALIGN);
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mz = rte_eth_dma_zone_reserve(dev, "rx_buf_ring", queue_idx,
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ring_size, IDPF_RING_BASE_ALIGN,
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socket_id);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "Failed to reserve DMA memory for RX buffer queue.");
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rte_free(bufq->sw_ring);
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return -ENOMEM;
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}
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/* Zero all the descriptors in the ring. */
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memset(mz->addr, 0, ring_size);
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bufq->rx_ring_phys_addr = mz->iova;
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bufq->rx_ring = mz->addr;
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bufq->mz = mz;
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reset_split_rx_bufq(bufq);
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bufq->q_set = true;
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bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +
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queue_idx * vport->chunks_info.rx_buf_qtail_spacing);
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/* TODO: allow bulk or vec */
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return 0;
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}
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static int
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idpf_rx_split_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
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uint16_t nb_desc, unsigned int socket_id,
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const struct rte_eth_rxconf *rx_conf,
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struct rte_mempool *mp)
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{
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struct idpf_vport *vport = dev->data->dev_private;
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struct idpf_adapter *adapter = vport->adapter;
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struct idpf_rx_queue *bufq1, *bufq2;
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const struct rte_memzone *mz;
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struct idpf_rx_queue *rxq;
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uint16_t rx_free_thresh;
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uint32_t ring_size;
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uint64_t offloads;
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uint16_t qid;
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uint16_t len;
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int ret;
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offloads = rx_conf->offloads | dev->data->dev_conf.rxmode.offloads;
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/* Check free threshold */
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rx_free_thresh = (rx_conf->rx_free_thresh == 0) ?
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IDPF_DEFAULT_RX_FREE_THRESH :
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rx_conf->rx_free_thresh;
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if (check_rx_thresh(nb_desc, rx_free_thresh) != 0)
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return -EINVAL;
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/* Setup Rx description queue */
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rxq = rte_zmalloc_socket("idpf rxq",
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sizeof(struct idpf_rx_queue),
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (rxq == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for rx queue data structure");
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return -ENOMEM;
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}
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rxq->mp = mp;
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rxq->nb_rx_desc = nb_desc;
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rxq->rx_free_thresh = rx_free_thresh;
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rxq->queue_id = vport->chunks_info.rx_start_qid + queue_idx;
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rxq->port_id = dev->data->port_id;
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rxq->rx_hdr_len = 0;
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rxq->adapter = adapter;
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rxq->offloads = offloads;
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len = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM;
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rxq->rx_buf_len = len;
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len = rxq->nb_rx_desc + IDPF_RX_MAX_BURST;
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ring_size = RTE_ALIGN(len *
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sizeof(struct virtchnl2_rx_flex_desc_adv_nic_3),
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IDPF_DMA_MEM_ALIGN);
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mz = rte_eth_dma_zone_reserve(dev, "rx_cpmpl_ring", queue_idx,
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ring_size, IDPF_RING_BASE_ALIGN,
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socket_id);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "Failed to reserve DMA memory for RX");
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ret = -ENOMEM;
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goto free_rxq;
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}
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/* Zero all the descriptors in the ring. */
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memset(mz->addr, 0, ring_size);
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rxq->rx_ring_phys_addr = mz->iova;
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rxq->rx_ring = mz->addr;
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rxq->mz = mz;
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reset_split_rx_descq(rxq);
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/* TODO: allow bulk or vec */
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/* setup Rx buffer queue */
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bufq1 = rte_zmalloc_socket("idpf bufq1",
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sizeof(struct idpf_rx_queue),
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (bufq1 == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for rx buffer queue 1.");
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ret = -ENOMEM;
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goto free_mz;
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}
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qid = 2 * queue_idx;
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ret = idpf_rx_split_bufq_setup(dev, bufq1, qid, rx_free_thresh,
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nb_desc, socket_id, mp);
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if (ret != 0) {
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PMD_INIT_LOG(ERR, "Failed to setup buffer queue 1");
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ret = -EINVAL;
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goto free_bufq1;
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}
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rxq->bufq1 = bufq1;
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bufq2 = rte_zmalloc_socket("idpf bufq2",
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sizeof(struct idpf_rx_queue),
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (bufq2 == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for rx buffer queue 2.");
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rte_free(bufq1->sw_ring);
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rte_memzone_free(bufq1->mz);
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ret = -ENOMEM;
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goto free_bufq1;
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}
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qid = 2 * queue_idx + 1;
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ret = idpf_rx_split_bufq_setup(dev, bufq2, qid, rx_free_thresh,
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nb_desc, socket_id, mp);
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if (ret != 0) {
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PMD_INIT_LOG(ERR, "Failed to setup buffer queue 2");
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rte_free(bufq1->sw_ring);
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rte_memzone_free(bufq1->mz);
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ret = -EINVAL;
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goto free_bufq2;
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}
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rxq->bufq2 = bufq2;
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rxq->q_set = true;
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dev->data->rx_queues[queue_idx] = rxq;
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return 0;
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free_bufq2:
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rte_free(bufq2);
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free_bufq1:
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rte_free(bufq1);
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free_mz:
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rte_memzone_free(mz);
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free_rxq:
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rte_free(rxq);
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return ret;
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}
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static int
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idpf_rx_single_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
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uint16_t nb_desc, unsigned int socket_id,
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const struct rte_eth_rxconf *rx_conf,
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struct rte_mempool *mp)
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{
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struct idpf_vport *vport = dev->data->dev_private;
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struct idpf_adapter *adapter = vport->adapter;
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struct idpf_hw *hw = &adapter->hw;
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const struct rte_memzone *mz;
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struct idpf_rx_queue *rxq;
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uint16_t rx_free_thresh;
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uint32_t ring_size;
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uint64_t offloads;
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uint16_t len;
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offloads = rx_conf->offloads | dev->data->dev_conf.rxmode.offloads;
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/* Check free threshold */
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rx_free_thresh = (rx_conf->rx_free_thresh == 0) ?
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IDPF_DEFAULT_RX_FREE_THRESH :
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rx_conf->rx_free_thresh;
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if (check_rx_thresh(nb_desc, rx_free_thresh) != 0)
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return -EINVAL;
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/* Setup Rx description queue */
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rxq = rte_zmalloc_socket("idpf rxq",
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sizeof(struct idpf_rx_queue),
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (rxq == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for rx queue data structure");
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return -ENOMEM;
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}
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rxq->mp = mp;
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rxq->nb_rx_desc = nb_desc;
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rxq->rx_free_thresh = rx_free_thresh;
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rxq->queue_id = vport->chunks_info.rx_start_qid + queue_idx;
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rxq->port_id = dev->data->port_id;
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rxq->rx_hdr_len = 0;
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rxq->adapter = adapter;
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rxq->offloads = offloads;
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len = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM;
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rxq->rx_buf_len = len;
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len = nb_desc + IDPF_RX_MAX_BURST;
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rxq->sw_ring =
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rte_zmalloc_socket("idpf rxq sw ring",
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sizeof(struct rte_mbuf *) * len,
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (rxq->sw_ring == NULL) {
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PMD_INIT_LOG(ERR, "Failed to allocate memory for SW ring");
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rte_free(rxq);
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return -ENOMEM;
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}
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/* Allocate a liitle more to support bulk allocate. */
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len = nb_desc + IDPF_RX_MAX_BURST;
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ring_size = RTE_ALIGN(len *
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sizeof(struct virtchnl2_singleq_rx_buf_desc),
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IDPF_DMA_MEM_ALIGN);
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mz = rte_eth_dma_zone_reserve(dev, "rx ring", queue_idx,
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ring_size, IDPF_RING_BASE_ALIGN,
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socket_id);
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if (mz == NULL) {
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PMD_INIT_LOG(ERR, "Failed to reserve DMA memory for RX buffer queue.");
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rte_free(rxq->sw_ring);
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rte_free(rxq);
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return -ENOMEM;
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}
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/* Zero all the descriptors in the ring. */
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memset(mz->addr, 0, ring_size);
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rxq->rx_ring_phys_addr = mz->iova;
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rxq->rx_ring = mz->addr;
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rxq->mz = mz;
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reset_single_rx_queue(rxq);
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rxq->q_set = true;
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dev->data->rx_queues[queue_idx] = rxq;
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rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +
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queue_idx * vport->chunks_info.rx_qtail_spacing);
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return 0;
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}
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int
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idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
|
||||
uint16_t nb_desc, unsigned int socket_id,
|
||||
const struct rte_eth_rxconf *rx_conf,
|
||||
struct rte_mempool *mp)
|
||||
{
|
||||
struct idpf_vport *vport = dev->data->dev_private;
|
||||
|
||||
if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE)
|
||||
return idpf_rx_single_queue_setup(dev, queue_idx, nb_desc,
|
||||
socket_id, rx_conf, mp);
|
||||
else
|
||||
return idpf_rx_split_queue_setup(dev, queue_idx, nb_desc,
|
||||
socket_id, rx_conf, mp);
|
||||
}
|
||||
|
||||
static int
|
||||
idpf_tx_split_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
|
||||
uint16_t nb_desc, unsigned int socket_id,
|
||||
|
||||
@ -15,9 +15,51 @@
|
||||
/* Base address of the HW descriptor ring should be 128B aligned. */
|
||||
#define IDPF_RING_BASE_ALIGN 128
|
||||
|
||||
#define IDPF_RX_MAX_BURST 32
|
||||
#define IDPF_DEFAULT_RX_FREE_THRESH 32
|
||||
|
||||
#define IDPF_DEFAULT_TX_RS_THRESH 32
|
||||
#define IDPF_DEFAULT_TX_FREE_THRESH 32
|
||||
|
||||
struct idpf_rx_queue {
|
||||
struct idpf_adapter *adapter; /* the adapter this queue belongs to */
|
||||
struct rte_mempool *mp; /* mbuf pool to populate Rx ring */
|
||||
const struct rte_memzone *mz; /* memzone for Rx ring */
|
||||
volatile void *rx_ring;
|
||||
struct rte_mbuf **sw_ring; /* address of SW ring */
|
||||
uint64_t rx_ring_phys_addr; /* Rx ring DMA address */
|
||||
|
||||
uint16_t nb_rx_desc; /* ring length */
|
||||
uint16_t rx_tail; /* current value of tail */
|
||||
volatile uint8_t *qrx_tail; /* register address of tail */
|
||||
uint16_t rx_free_thresh; /* max free RX desc to hold */
|
||||
uint16_t nb_rx_hold; /* number of held free RX desc */
|
||||
struct rte_mbuf *pkt_first_seg; /* first segment of current packet */
|
||||
struct rte_mbuf *pkt_last_seg; /* last segment of current packet */
|
||||
struct rte_mbuf fake_mbuf; /* dummy mbuf */
|
||||
|
||||
uint16_t rx_nb_avail;
|
||||
uint16_t rx_next_avail;
|
||||
|
||||
uint16_t port_id; /* device port ID */
|
||||
uint16_t queue_id; /* Rx queue index */
|
||||
uint16_t rx_buf_len; /* The packet buffer size */
|
||||
uint16_t rx_hdr_len; /* The header buffer size */
|
||||
uint16_t max_pkt_len; /* Maximum packet length */
|
||||
uint8_t rxdid;
|
||||
|
||||
bool q_set; /* if rx queue has been configured */
|
||||
bool q_started; /* if rx queue has been started */
|
||||
|
||||
/* only valid for split queue mode */
|
||||
uint8_t expected_gen_id;
|
||||
struct idpf_rx_queue *bufq1;
|
||||
struct idpf_rx_queue *bufq2;
|
||||
|
||||
uint64_t offloads;
|
||||
uint32_t hw_register_set;
|
||||
};
|
||||
|
||||
struct idpf_tx_entry {
|
||||
struct rte_mbuf *mbuf;
|
||||
uint16_t next_id;
|
||||
@ -63,6 +105,10 @@ struct idpf_tx_queue {
|
||||
struct idpf_tx_queue *complq;
|
||||
};
|
||||
|
||||
int idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
|
||||
uint16_t nb_desc, unsigned int socket_id,
|
||||
const struct rte_eth_rxconf *rx_conf,
|
||||
struct rte_mempool *mp);
|
||||
int idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
|
||||
uint16_t nb_desc, unsigned int socket_id,
|
||||
const struct rte_eth_txconf *tx_conf);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user