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common/qat: fix GEN3 marketing name

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This patch fixes the marketing name of the QAT GEN3 to P5xxx.
Updates this name mentioned in the compression PMD as well as
in the documentation.

Fixes: aa983f03ad ("crypto/qat: handle Single Pass Crypto Requests on GEN3")
Fixes: a124830a6f ("compress/qat: enable dynamic huffman encoding")
Fixes: 1f5e4053f9 ("common/qat: support GEN3 devices")
Cc: stable@dpdk.org

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
This commit is contained in:
Adam Dybkowski 2020-03-04 14:18:35 +01:00 committed by Akhil Goyal
parent 285b5d1b1f
commit 9cd9d3e702
3 changed files with 5 additions and 5 deletions
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6
doc/guides/cryptodevs/qat.rst
View File

@ -23,7 +23,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
* ``Intel QuickAssist Technology C62x``
* ``Intel QuickAssist Technology C3xxx``
* ``Intel QuickAssist Technology D15xx``
* ``Intel QuickAssist Technology C4xxx``
* ``Intel QuickAssist Technology P5xxx``
Features
@ -149,7 +149,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
* ``Intel QuickAssist Technology C62x``
* ``Intel QuickAssist Technology C3xxx``
* ``Intel QuickAssist Technology D15xx``
* ``Intel QuickAssist Technology C4xxx``
* ``Intel QuickAssist Technology P5xxx``
The QAT ASYM PMD has support for:
@ -376,7 +376,7 @@ to see the full table)
+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
| Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
| Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 |
| Yes | No | No | 3 | P5xxx | p | qat_p5xxx | p5xxx | 18a0 | 1 | 18a1 | 128 |
+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
The first 3 columns indicate the service:

2
doc/guides/rel_notes/release_19_11.rst
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@ -260,7 +260,7 @@ New Features
* **Enabled Single Pass GCM acceleration on QAT GEN3.**
Added support for Single Pass GCM, available on QAT GEN3 only (Intel
QuickAssist Technology C4xxx). It is automatically chosen instead of the
QuickAssist Technology P5xxx). It is automatically chosen instead of the
classic 2-pass mode when running on QAT GEN3, significantly improving
the performance of AES GCM operations.

2
drivers/compress/qat/qat_comp_pmd.c
View File

@ -666,7 +666,7 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
{
int i = 0;
if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx");
QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
return 0;
}