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regex/mlx5: move DevX SQ creation to common

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Using common function for DevX SQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
This commit is contained in:
Michael Baum 2021-01-06 08:19:35 +00:00 committed by Ferruh Yigit
parent 38f537635c
commit 9de7b16015
3 changed files with 56 additions and 121 deletions
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8
drivers/regex/mlx5/mlx5_regex.h
View File

@ -18,15 +18,10 @@
struct mlx5_regex_sq {
uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
struct mlx5_devx_obj *obj; /* The SQ DevX object. */
int64_t dbr_offset; /* Door bell record offset. */
uint32_t dbr_umem; /* Door bell record umem id. */
uint8_t *wqe; /* The SQ ring buffer. */
struct mlx5dv_devx_umem *wqe_umem; /* SQ buffer umem. */
struct mlx5_devx_sq sq_obj; /* The SQ DevX object. */
size_t pi, db_pi;
size_t ci;
uint32_t sqn;
uint32_t *dbr;
};
struct mlx5_regex_cq {
@ -73,7 +68,6 @@ struct mlx5_regex_priv {
uint32_t nb_engines; /* Number of RegEx engines. */
struct mlx5dv_devx_uar *uar; /* UAR object. */
struct ibv_pd *pd;
struct mlx5_dbr_page_list dbrpgs; /* Door-bell pages. */
struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
};

155
drivers/regex/mlx5/mlx5_regex_control.c
View File

@ -111,6 +111,27 @@ regex_get_pdn(void *pd, uint32_t *pdn)
}
#endif
/**
* Destroy the SQ object.
*
* @param qp
* Pointer to the QP element
* @param q_ind
* The index of the queue.
*
* @return
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
regex_ctrl_destroy_sq(struct mlx5_regex_qp *qp, uint16_t q_ind)
{
struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
mlx5_devx_sq_destroy(&sq->sq_obj);
memset(sq, 0, sizeof(*sq));
return 0;
}
/**
* create the SQ object.
*
@ -131,84 +152,42 @@ regex_ctrl_create_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
uint16_t q_ind, uint16_t log_nb_desc)
{
#ifdef HAVE_IBV_FLOW_DV_SUPPORT
struct mlx5_devx_create_sq_attr attr = { 0 };
struct mlx5_devx_modify_sq_attr modify_attr = { 0 };
struct mlx5_devx_wq_attr *wq_attr = &attr.wq_attr;
struct mlx5_devx_dbr_page *dbr_page = NULL;
struct mlx5_devx_create_sq_attr attr = {
.user_index = q_ind,
.cqn = qp->cq.cq_obj.cq->id,
.wq_attr = (struct mlx5_devx_wq_attr){
.uar_page = priv->uar->page_id,
},
};
struct mlx5_devx_modify_sq_attr modify_attr = {
.state = MLX5_SQC_STATE_RDY,
};
struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
void *buf = NULL;
uint32_t sq_size;
uint32_t pd_num = 0;
int ret;
sq->log_nb_desc = log_nb_desc;
sq_size = 1 << sq->log_nb_desc;
sq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
if (sq->dbr_offset < 0) {
DRV_LOG(ERR, "Can't allocate sq door bell record.");
rte_errno = ENOMEM;
goto error;
}
sq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
sq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
(uintptr_t)sq->dbr_offset);
buf = rte_calloc(NULL, 1, 64 * sq_size, 4096);
if (!buf) {
DRV_LOG(ERR, "Can't allocate wqe buffer.");
rte_errno = ENOMEM;
goto error;
}
sq->wqe = buf;
sq->wqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 64 * sq_size,
7);
sq->ci = 0;
sq->pi = 0;
if (!sq->wqe_umem) {
DRV_LOG(ERR, "Can't register wqe mem.");
rte_errno = ENOMEM;
goto error;
}
attr.state = MLX5_SQC_STATE_RST;
attr.tis_lst_sz = 0;
attr.tis_num = 0;
attr.user_index = q_ind;
attr.cqn = qp->cq.cq_obj.cq->id;
wq_attr->uar_page = priv->uar->page_id;
regex_get_pdn(priv->pd, &pd_num);
wq_attr->pd = pd_num;
wq_attr->wq_type = MLX5_WQ_TYPE_CYCLIC;
wq_attr->dbr_umem_id = sq->dbr_umem;
wq_attr->dbr_addr = sq->dbr_offset;
wq_attr->dbr_umem_valid = 1;
wq_attr->wq_umem_id = mlx5_os_get_umem_id(sq->wqe_umem);
wq_attr->wq_umem_offset = 0;
wq_attr->wq_umem_valid = 1;
wq_attr->log_wq_stride = 6;
wq_attr->log_wq_sz = sq->log_nb_desc;
sq->obj = mlx5_devx_cmd_create_sq(priv->ctx, &attr);
if (!sq->obj) {
DRV_LOG(ERR, "Can't create sq object.");
rte_errno = ENOMEM;
goto error;
}
modify_attr.state = MLX5_SQC_STATE_RDY;
ret = mlx5_devx_cmd_modify_sq(sq->obj, &modify_attr);
ret = regex_get_pdn(priv->pd, &pd_num);
if (ret)
return ret;
attr.wq_attr.pd = pd_num;
ret = mlx5_devx_sq_create(priv->ctx, &sq->sq_obj, log_nb_desc, &attr,
SOCKET_ID_ANY);
if (ret) {
DRV_LOG(ERR, "Can't change sq state to ready.");
rte_errno = ENOMEM;
goto error;
DRV_LOG(ERR, "Can't create SQ object.");
rte_errno = ENOMEM;
return -rte_errno;
}
ret = mlx5_devx_cmd_modify_sq(sq->sq_obj.sq, &modify_attr);
if (ret) {
DRV_LOG(ERR, "Can't change SQ state to ready.");
regex_ctrl_destroy_sq(qp, q_ind);
rte_errno = ENOMEM;
return -rte_errno;
}
return 0;
error:
if (sq->wqe_umem)
mlx5_glue->devx_umem_dereg(sq->wqe_umem);
if (buf)
rte_free(buf);
if (sq->dbr_offset)
mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
return -rte_errno;
#else
(void)priv;
(void)qp;
@ -219,44 +198,6 @@ error:
#endif
}
/**
* Destroy the SQ object.
*
* @param priv
* Pointer to the priv object.
* @param qp
* Pointer to the QP element
* @param q_ind
* The index of the queue.
*
* @return
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
regex_ctrl_destroy_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
uint16_t q_ind)
{
struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
if (sq->wqe_umem) {
mlx5_glue->devx_umem_dereg(sq->wqe_umem);
sq->wqe_umem = NULL;
}
if (sq->wqe) {
rte_free((void *)(uintptr_t)sq->wqe);
sq->wqe = NULL;
}
if (sq->dbr_offset) {
mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
sq->dbr_offset = -1;
}
if (sq->obj) {
mlx5_devx_cmd_destroy(sq->obj);
sq->obj = NULL;
}
return 0;
}
/**
* Setup the qp.
*
@ -329,7 +270,7 @@ err_fp:
mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh);
err_btree:
for (i = 0; i < nb_sq_config; i++)
regex_ctrl_destroy_sq(priv, qp, i);
regex_ctrl_destroy_sq(qp, i);
regex_ctrl_destroy_cq(&qp->cq);
err_cq:
rte_free(qp->sqs);

14
drivers/regex/mlx5/mlx5_regex_fastpath.c
View File

@ -110,12 +110,12 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
&priv->mr_scache, &qp->mr_ctrl,
rte_pktmbuf_mtod(op->mbuf, uintptr_t),
!!(op->mbuf->ol_flags & EXT_ATTACHED_MBUF));
uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset;
uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes + wqe_offset;
int ds = 4; /* ctrl + meta + input + output */
set_wqe_ctrl_seg((struct mlx5_wqe_ctrl_seg *)wqe, sq->pi,
MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id,
0, ds, 0, 0);
MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX,
sq->sq_obj.sq->id, 0, ds, 0, 0);
set_regex_ctrl_seg(wqe + 12, 0, op->group_id0, op->group_id1,
op->group_id2,
op->group_id3, 0);
@ -137,12 +137,12 @@ send_doorbell(struct mlx5dv_devx_uar *uar, struct mlx5_regex_sq *sq)
{
size_t wqe_offset = (sq->db_pi & (sq_size_get(sq) - 1)) *
MLX5_SEND_WQE_BB;
uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset;
uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes + wqe_offset;
((struct mlx5_wqe_ctrl_seg *)wqe)->fm_ce_se = MLX5_WQE_CTRL_CQ_UPDATE;
uint64_t *doorbell_addr =
(uint64_t *)((uint8_t *)uar->base_addr + 0x800);
rte_io_wmb();
sq->dbr[MLX5_SND_DBR] = rte_cpu_to_be_32((sq->db_pi + 1) &
sq->sq_obj.db_rec[MLX5_SND_DBR] = rte_cpu_to_be_32((sq->db_pi + 1) &
MLX5_REGEX_MAX_WQE_INDEX);
rte_wmb();
*doorbell_addr = *(volatile uint64_t *)wqe;
@ -322,7 +322,7 @@ setup_sqs(struct mlx5_regex_qp *queue)
uint32_t job_id;
for (sqid = 0; sqid < queue->nb_obj; sqid++) {
struct mlx5_regex_sq *sq = &queue->sqs[sqid];
uint8_t *wqe = (uint8_t *)sq->wqe;
uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes;
for (entry = 0 ; entry < sq_size_get(sq); entry++) {
job_id = sqid * sq_size_get(sq) + entry;
struct mlx5_regex_job *job = &queue->jobs[job_id];
@ -355,7 +355,7 @@ setup_buffers(struct mlx5_regex_qp *qp, struct ibv_pd *pd)
return -ENOMEM;
qp->metadata = mlx5_glue->reg_mr(pd, ptr,
MLX5_REGEX_METADATA_SIZE*qp->nb_desc,
MLX5_REGEX_METADATA_SIZE * qp->nb_desc,
IBV_ACCESS_LOCAL_WRITE);
if (!qp->metadata) {
DRV_LOG(ERR, "Failed to register metadata");