acl: deduplicate some SSE and AVX2 code
Vector code reorganisation/deduplication: To avoid maintaining two nearly identical implementations of calc_addr() (one for SSE, another for AVX2), replace it with a new macro that suits both SSE and AVX2 code-paths. Also remove no needed any more MM_* macros. Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com>
This commit is contained in:
Konstantin Ananyev
Thomas Monjalon
parent
cf59b29bb9
commit
a0e3310e7a
@ -73,51 +73,19 @@ static const rte_ymm_t ymm_ones_16 = {
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},
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};
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static inline __attribute__((always_inline)) ymm_t
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calc_addr_avx2(ymm_t index_mask, ymm_t next_input, ymm_t shuffle_input,
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ymm_t ones_16, ymm_t tr_lo, ymm_t tr_hi)
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{
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ymm_t in, node_type, r, t;
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ymm_t dfa_msk, dfa_ofs, quad_ofs;
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ymm_t addr;
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const ymm_t range_base = _mm256_set_epi32(
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0xffffff0c, 0xffffff08, 0xffffff04, 0xffffff00,
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0xffffff0c, 0xffffff08, 0xffffff04, 0xffffff00);
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t = _mm256_xor_si256(index_mask, index_mask);
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in = _mm256_shuffle_epi8(next_input, shuffle_input);
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/* Calc node type and node addr */
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node_type = _mm256_andnot_si256(index_mask, tr_lo);
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addr = _mm256_and_si256(index_mask, tr_lo);
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/* DFA calculations. */
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dfa_msk = _mm256_cmpeq_epi32(node_type, t);
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r = _mm256_srli_epi32(in, 30);
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r = _mm256_add_epi8(r, range_base);
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t = _mm256_srli_epi32(in, 24);
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r = _mm256_shuffle_epi8(tr_hi, r);
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dfa_ofs = _mm256_sub_epi32(t, r);
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/* QUAD/SINGLE caluclations. */
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t = _mm256_cmpgt_epi8(in, tr_hi);
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t = _mm256_sign_epi8(t, t);
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t = _mm256_maddubs_epi16(t, t);
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quad_ofs = _mm256_madd_epi16(t, ones_16);
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/* blend DFA and QUAD/SINGLE. */
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t = _mm256_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk);
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addr = _mm256_add_epi32(addr, t);
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return addr;
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}
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static const rte_ymm_t ymm_range_base = {
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.u32 = {
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0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c,
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0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c,
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},
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};
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/*
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* Process 8 transitions in parallel.
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* tr_lo contains low 32 bits for 8 transition.
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* tr_hi contains high 32 bits for 8 transition.
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* next_input contains up to 4 input bytes for 8 flows.
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*/
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static inline __attribute__((always_inline)) ymm_t
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transition8(ymm_t next_input, const uint64_t *trans, ymm_t *tr_lo, ymm_t *tr_hi)
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{
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@ -126,8 +94,10 @@ transition8(ymm_t next_input, const uint64_t *trans, ymm_t *tr_lo, ymm_t *tr_hi)
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tr = (const int32_t *)(uintptr_t)trans;
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addr = calc_addr_avx2(ymm_index_mask.y, next_input, ymm_shuffle_input.y,
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ymm_ones_16.y, *tr_lo, *tr_hi);
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/* Calculate the address (array index) for all 8 transitions. */
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ACL_TR_CALC_ADDR(mm256, 256, addr, ymm_index_mask.y, next_input,
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ymm_shuffle_input.y, ymm_ones_16.y, ymm_range_base.y,
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*tr_lo, *tr_hi);
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/* load lower 32 bits of 8 transactions at once. */
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*tr_lo = _mm256_i32gather_epi32(tr, addr, sizeof(trans[0]));
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@ -140,6 +110,11 @@ transition8(ymm_t next_input, const uint64_t *trans, ymm_t *tr_lo, ymm_t *tr_hi)
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return next_input;
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}
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/*
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* Process matches for 8 flows.
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* tr_lo contains low 32 bits for 8 transition.
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* tr_hi contains high 32 bits for 8 transition.
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*/
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static inline void
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acl_process_matches_avx2x8(const struct rte_acl_ctx *ctx,
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struct parms *parms, struct acl_flow_data *flows, uint32_t slot,
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@ -155,6 +130,11 @@ acl_process_matches_avx2x8(const struct rte_acl_ctx *ctx,
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l0 = _mm256_castsi256_si128(*tr_lo);
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for (i = 0; i != RTE_DIM(tr) / 2; i++) {
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/*
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* Extract low 32bits of each transition.
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* That's enough to process the match.
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*/
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tr[i] = (uint32_t)_mm_cvtsi128_si32(l0);
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tr[i + 4] = (uint32_t)_mm_cvtsi128_si32(l1);
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@ -167,12 +147,14 @@ acl_process_matches_avx2x8(const struct rte_acl_ctx *ctx,
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ctx, parms, flows, resolve_priority_sse);
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}
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/* Collect new transitions into 2 YMM registers. */
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t0 = _mm256_set_epi64x(tr[5], tr[4], tr[1], tr[0]);
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t1 = _mm256_set_epi64x(tr[7], tr[6], tr[3], tr[2]);
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lo = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0x88);
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hi = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0xdd);
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/* For each transition: put low 32 into tr_lo and high 32 into tr_hi */
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ACL_TR_HILO(mm256, __m256, t0, t1, lo, hi);
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/* Keep transitions wth NOMATCH intact. */
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*tr_lo = _mm256_blendv_epi8(*tr_lo, lo, matches);
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*tr_hi = _mm256_blendv_epi8(*tr_hi, hi, matches);
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}
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@ -200,6 +182,9 @@ acl_match_check_avx2x8(const struct rte_acl_ctx *ctx, struct parms *parms,
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}
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}
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/*
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* Execute trie traversal for up to 16 flows in parallel.
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*/
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static inline int
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search_avx2x16(const struct rte_acl_ctx *ctx, const uint8_t **data,
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uint32_t *results, uint32_t total_packets, uint32_t categories)
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@ -225,16 +210,14 @@ search_avx2x16(const struct rte_acl_ctx *ctx, const uint8_t **data,
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t1 = _mm256_set_epi64x(index_array[7], index_array[6],
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index_array[3], index_array[2]);
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tr_lo[0] = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0x88);
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tr_hi[0] = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0xdd);
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ACL_TR_HILO(mm256, __m256, t0, t1, tr_lo[0], tr_hi[0]);
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t0 = _mm256_set_epi64x(index_array[13], index_array[12],
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index_array[9], index_array[8]);
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t1 = _mm256_set_epi64x(index_array[15], index_array[14],
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index_array[11], index_array[10]);
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tr_lo[1] = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0x88);
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tr_hi[1] = (ymm_t)_mm256_shuffle_ps((__m256)t0, (__m256)t1, 0xdd);
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ACL_TR_HILO(mm256, __m256, t0, t1, tr_lo[1], tr_hi[1]);
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/* Check for any matches. */
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acl_match_check_avx2x8(ctx, parms, &flows, 0, &tr_lo[0], &tr_hi[0],
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@ -67,6 +67,12 @@ static const rte_xmm_t xmm_index_mask = {
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},
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};
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static const rte_xmm_t xmm_range_base = {
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.u32 = {
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0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c,
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},
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};
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/*
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* Resolve priority for multiple results (sse version).
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* This consists comparing the priority of the current traversal with the
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@ -90,25 +96,28 @@ resolve_priority_sse(uint64_t transition, int n, const struct rte_acl_ctx *ctx,
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(xmm_t *)(&parms[n].cmplt->priority[x]);
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/* get results and priorities for completed trie */
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results = MM_LOADU((const xmm_t *)&p[transition].results[x]);
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priority = MM_LOADU((const xmm_t *)&p[transition].priority[x]);
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results = _mm_loadu_si128(
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(const xmm_t *)&p[transition].results[x]);
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priority = _mm_loadu_si128(
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(const xmm_t *)&p[transition].priority[x]);
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/* if this is not the first completed trie */
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if (parms[n].cmplt->count != ctx->num_tries) {
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/* get running best results and their priorities */
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results1 = MM_LOADU(saved_results);
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priority1 = MM_LOADU(saved_priority);
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results1 = _mm_loadu_si128(saved_results);
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priority1 = _mm_loadu_si128(saved_priority);
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/* select results that are highest priority */
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selector = MM_CMPGT32(priority1, priority);
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results = MM_BLENDV8(results, results1, selector);
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priority = MM_BLENDV8(priority, priority1, selector);
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selector = _mm_cmpgt_epi32(priority1, priority);
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results = _mm_blendv_epi8(results, results1, selector);
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priority = _mm_blendv_epi8(priority, priority1,
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selector);
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}
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/* save running best results and their priorities */
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MM_STOREU(saved_results, results);
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MM_STOREU(saved_priority, priority);
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_mm_storeu_si128(saved_results, results);
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_mm_storeu_si128(saved_priority, priority);
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}
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}
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@ -122,11 +131,11 @@ acl_process_matches(xmm_t *indices, int slot, const struct rte_acl_ctx *ctx,
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uint64_t transition1, transition2;
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/* extract transition from low 64 bits. */
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transition1 = MM_CVT64(*indices);
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transition1 = _mm_cvtsi128_si64(*indices);
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/* extract transition from high 64 bits. */
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*indices = MM_SHUFFLE32(*indices, SHUFFLE32_SWAP64);
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transition2 = MM_CVT64(*indices);
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*indices = _mm_shuffle_epi32(*indices, SHUFFLE32_SWAP64);
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transition2 = _mm_cvtsi128_si64(*indices);
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transition1 = acl_match_check(transition1, slot, ctx,
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parms, flows, resolve_priority_sse);
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@ -134,7 +143,7 @@ acl_process_matches(xmm_t *indices, int slot, const struct rte_acl_ctx *ctx,
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parms, flows, resolve_priority_sse);
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/* update indices with new transitions. */
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*indices = MM_SET64(transition2, transition1);
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*indices = _mm_set_epi64x(transition2, transition1);
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}
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/*
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@ -148,98 +157,24 @@ acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
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xmm_t temp;
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/* put low 32 bits of each transition into one register */
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temp = (xmm_t)MM_SHUFFLEPS((__m128)*indices1, (__m128)*indices2,
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temp = (xmm_t)_mm_shuffle_ps((__m128)*indices1, (__m128)*indices2,
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0x88);
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/* test for match node */
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temp = MM_AND(match_mask, temp);
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temp = _mm_and_si128(match_mask, temp);
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while (!MM_TESTZ(temp, temp)) {
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while (!_mm_testz_si128(temp, temp)) {
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acl_process_matches(indices1, slot, ctx, parms, flows);
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acl_process_matches(indices2, slot + 2, ctx, parms, flows);
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temp = (xmm_t)MM_SHUFFLEPS((__m128)*indices1,
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temp = (xmm_t)_mm_shuffle_ps((__m128)*indices1,
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(__m128)*indices2,
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0x88);
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temp = MM_AND(match_mask, temp);
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temp = _mm_and_si128(match_mask, temp);
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}
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}
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/*
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* Calculate the address of the next transition for
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* all types of nodes. Note that only DFA nodes and range
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* nodes actually transition to another node. Match
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* nodes don't move.
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*/
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static inline __attribute__((always_inline)) xmm_t
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calc_addr_sse(xmm_t index_mask, xmm_t next_input, xmm_t shuffle_input,
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xmm_t ones_16, xmm_t tr_lo, xmm_t tr_hi)
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{
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xmm_t addr, node_types;
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xmm_t dfa_msk, dfa_ofs, quad_ofs;
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xmm_t in, r, t;
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const xmm_t range_base = _mm_set_epi32(0xffffff0c, 0xffffff08,
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0xffffff04, 0xffffff00);
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/*
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* Note that no transition is done for a match
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* node and therefore a stream freezes when
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* it reaches a match.
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*/
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t = MM_XOR(index_mask, index_mask);
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/* shuffle input byte to all 4 positions of 32 bit value */
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in = MM_SHUFFLE8(next_input, shuffle_input);
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/* Calc node type and node addr */
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node_types = MM_ANDNOT(index_mask, tr_lo);
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addr = MM_AND(index_mask, tr_lo);
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/*
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* Calc addr for DFAs - addr = dfa_index + input_byte
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*/
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/* mask for DFA type (0) nodes */
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dfa_msk = MM_CMPEQ32(node_types, t);
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r = _mm_srli_epi32(in, 30);
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r = _mm_add_epi8(r, range_base);
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t = _mm_srli_epi32(in, 24);
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r = _mm_shuffle_epi8(tr_hi, r);
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dfa_ofs = _mm_sub_epi32(t, r);
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/*
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* Calculate number of range boundaries that are less than the
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* input value. Range boundaries for each node are in signed 8 bit,
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* ordered from -128 to 127 in the indices2 register.
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* This is effectively a popcnt of bytes that are greater than the
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* input byte.
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*/
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/* check ranges */
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t = MM_CMPGT8(in, tr_hi);
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/* convert -1 to 1 (bytes greater than input byte */
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t = MM_SIGN8(t, t);
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/* horizontal add pairs of bytes into words */
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t = MM_MADD8(t, t);
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/* horizontal add pairs of words into dwords */
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quad_ofs = MM_MADD16(t, ones_16);
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/* blend DFA and QUAD/SINGLE. */
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t = _mm_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk);
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/* add index into node position */
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return MM_ADD32(addr, t);
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}
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/*
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* Process 4 transitions (in 2 SIMD registers) in parallel
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* Process 4 transitions (in 2 XMM registers) in parallel
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*/
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static inline __attribute__((always_inline)) xmm_t
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transition4(xmm_t next_input, const uint64_t *trans,
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@ -249,39 +184,36 @@ transition4(xmm_t next_input, const uint64_t *trans,
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uint64_t trans0, trans2;
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/* Shuffle low 32 into tr_lo and high 32 into tr_hi */
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tr_lo = (xmm_t)_mm_shuffle_ps((__m128)*indices1, (__m128)*indices2,
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0x88);
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tr_hi = (xmm_t)_mm_shuffle_ps((__m128)*indices1, (__m128)*indices2,
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0xdd);
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ACL_TR_HILO(mm, __m128, *indices1, *indices2, tr_lo, tr_hi);
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/* Calculate the address (array index) for all 4 transitions. */
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addr = calc_addr_sse(xmm_index_mask.x, next_input, xmm_shuffle_input.x,
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xmm_ones_16.x, tr_lo, tr_hi);
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ACL_TR_CALC_ADDR(mm, 128, addr, xmm_index_mask.x, next_input,
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xmm_shuffle_input.x, xmm_ones_16.x, xmm_range_base.x,
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tr_lo, tr_hi);
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/* Gather 64 bit transitions and pack back into 2 registers. */
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trans0 = trans[MM_CVT32(addr)];
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trans0 = trans[_mm_cvtsi128_si32(addr)];
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/* get slot 2 */
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/* {x0, x1, x2, x3} -> {x2, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT2);
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trans2 = trans[MM_CVT32(addr)];
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addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT2);
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trans2 = trans[_mm_cvtsi128_si32(addr)];
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/* get slot 1 */
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/* {x2, x1, x2, x3} -> {x1, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT1);
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*indices1 = MM_SET64(trans[MM_CVT32(addr)], trans0);
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addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT1);
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*indices1 = _mm_set_epi64x(trans[_mm_cvtsi128_si32(addr)], trans0);
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/* get slot 3 */
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/* {x1, x1, x2, x3} -> {x3, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT3);
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*indices2 = MM_SET64(trans[MM_CVT32(addr)], trans2);
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addr = _mm_shuffle_epi32(addr, SHUFFLE32_SLOT3);
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*indices2 = _mm_set_epi64x(trans[_mm_cvtsi128_si32(addr)], trans2);
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return MM_SRL32(next_input, CHAR_BIT);
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return _mm_srli_epi32(next_input, CHAR_BIT);
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}
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/*
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@ -314,11 +246,11 @@ search_sse_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
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* indices4 contains index_array[6,7]
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*/
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indices1 = MM_LOADU((xmm_t *) &index_array[0]);
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indices2 = MM_LOADU((xmm_t *) &index_array[2]);
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indices1 = _mm_loadu_si128((xmm_t *) &index_array[0]);
|
||||
indices2 = _mm_loadu_si128((xmm_t *) &index_array[2]);
|
||||
|
||||
indices3 = MM_LOADU((xmm_t *) &index_array[4]);
|
||||
indices4 = MM_LOADU((xmm_t *) &index_array[6]);
|
||||
indices3 = _mm_loadu_si128((xmm_t *) &index_array[4]);
|
||||
indices4 = _mm_loadu_si128((xmm_t *) &index_array[6]);
|
||||
|
||||
/* Check for any matches. */
|
||||
acl_match_check_x4(0, ctx, parms, &flows,
|
||||
@ -332,14 +264,14 @@ search_sse_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
|
||||
input0 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
|
||||
input1 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 4));
|
||||
|
||||
input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 1), 1);
|
||||
input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 5), 1);
|
||||
input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 1), 1);
|
||||
input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 5), 1);
|
||||
|
||||
input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 2), 2);
|
||||
input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 6), 2);
|
||||
input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 2), 2);
|
||||
input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 6), 2);
|
||||
|
||||
input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 3), 3);
|
||||
input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 7), 3);
|
||||
input0 = _mm_insert_epi32(input0, GET_NEXT_4BYTES(parms, 3), 3);
|
||||
input1 = _mm_insert_epi32(input1, GET_NEXT_4BYTES(parms, 7), 3);
|
||||
|
||||
/* Process the 4 bytes of input on each stream. */
|
||||
|
||||
@ -395,8 +327,8 @@ search_sse_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
|
||||
index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
|
||||
}
|
||||
|
||||
indices1 = MM_LOADU((xmm_t *) &index_array[0]);
|
||||
indices2 = MM_LOADU((xmm_t *) &index_array[2]);
|
||||
indices1 = _mm_loadu_si128((xmm_t *) &index_array[0]);
|
||||
indices2 = _mm_loadu_si128((xmm_t *) &index_array[2]);
|
||||
|
||||
/* Check for any matches. */
|
||||
acl_match_check_x4(0, ctx, parms, &flows,
|
||||
@ -406,9 +338,9 @@ search_sse_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
|
||||
|
||||
/* Gather 4 bytes of input data for each stream. */
|
||||
input = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
|
||||
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 1), 1);
|
||||
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 2), 2);
|
||||
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 3), 3);
|
||||
input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 1), 1);
|
||||
input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 2), 2);
|
||||
input = _mm_insert_epi32(input, GET_NEXT_4BYTES(parms, 3), 3);
|
||||
|
||||
/* Process the 4 bytes of input on each stream. */
|
||||
input = transition4(input, flows.trans, &indices1, &indices2);
|
||||
|
||||
@ -44,86 +44,70 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define MM_ADD16(a, b) _mm_add_epi16(a, b)
|
||||
#define MM_ADD32(a, b) _mm_add_epi32(a, b)
|
||||
#define MM_ALIGNR8(a, b, c) _mm_alignr_epi8(a, b, c)
|
||||
#define MM_AND(a, b) _mm_and_si128(a, b)
|
||||
#define MM_ANDNOT(a, b) _mm_andnot_si128(a, b)
|
||||
#define MM_BLENDV8(a, b, c) _mm_blendv_epi8(a, b, c)
|
||||
#define MM_CMPEQ16(a, b) _mm_cmpeq_epi16(a, b)
|
||||
#define MM_CMPEQ32(a, b) _mm_cmpeq_epi32(a, b)
|
||||
#define MM_CMPEQ8(a, b) _mm_cmpeq_epi8(a, b)
|
||||
#define MM_CMPGT32(a, b) _mm_cmpgt_epi32(a, b)
|
||||
#define MM_CMPGT8(a, b) _mm_cmpgt_epi8(a, b)
|
||||
#define MM_CVT(a) _mm_cvtsi32_si128(a)
|
||||
#define MM_CVT32(a) _mm_cvtsi128_si32(a)
|
||||
#define MM_CVTU32(a) _mm_cvtsi32_si128(a)
|
||||
#define MM_INSERT16(a, c, b) _mm_insert_epi16(a, c, b)
|
||||
#define MM_INSERT32(a, c, b) _mm_insert_epi32(a, c, b)
|
||||
#define MM_LOAD(a) _mm_load_si128(a)
|
||||
#define MM_LOADH_PI(a, b) _mm_loadh_pi(a, b)
|
||||
#define MM_LOADU(a) _mm_loadu_si128(a)
|
||||
#define MM_MADD16(a, b) _mm_madd_epi16(a, b)
|
||||
#define MM_MADD8(a, b) _mm_maddubs_epi16(a, b)
|
||||
#define MM_MOVEMASK8(a) _mm_movemask_epi8(a)
|
||||
#define MM_OR(a, b) _mm_or_si128(a, b)
|
||||
#define MM_SET1_16(a) _mm_set1_epi16(a)
|
||||
#define MM_SET1_32(a) _mm_set1_epi32(a)
|
||||
#define MM_SET1_64(a) _mm_set1_epi64(a)
|
||||
#define MM_SET1_8(a) _mm_set1_epi8(a)
|
||||
#define MM_SET32(a, b, c, d) _mm_set_epi32(a, b, c, d)
|
||||
#define MM_SHUFFLE32(a, b) _mm_shuffle_epi32(a, b)
|
||||
#define MM_SHUFFLE8(a, b) _mm_shuffle_epi8(a, b)
|
||||
#define MM_SHUFFLEPS(a, b, c) _mm_shuffle_ps(a, b, c)
|
||||
#define MM_SIGN8(a, b) _mm_sign_epi8(a, b)
|
||||
#define MM_SLL64(a, b) _mm_sll_epi64(a, b)
|
||||
#define MM_SRL128(a, b) _mm_srli_si128(a, b)
|
||||
#define MM_SRL16(a, b) _mm_srli_epi16(a, b)
|
||||
#define MM_SRL32(a, b) _mm_srli_epi32(a, b)
|
||||
#define MM_STORE(a, b) _mm_store_si128(a, b)
|
||||
#define MM_STOREU(a, b) _mm_storeu_si128(a, b)
|
||||
#define MM_TESTZ(a, b) _mm_testz_si128(a, b)
|
||||
#define MM_XOR(a, b) _mm_xor_si128(a, b)
|
||||
|
||||
#define MM_SET16(a, b, c, d, e, f, g, h) \
|
||||
_mm_set_epi16(a, b, c, d, e, f, g, h)
|
||||
|
||||
#define MM_SET8(c0, c1, c2, c3, c4, c5, c6, c7, \
|
||||
c8, c9, cA, cB, cC, cD, cE, cF) \
|
||||
_mm_set_epi8(c0, c1, c2, c3, c4, c5, c6, c7, \
|
||||
c8, c9, cA, cB, cC, cD, cE, cF)
|
||||
|
||||
#ifdef RTE_ARCH_X86_64
|
||||
|
||||
#define MM_CVT64(a) _mm_cvtsi128_si64(a)
|
||||
|
||||
#else
|
||||
|
||||
#define MM_CVT64(a) ({ \
|
||||
rte_xmm_t m; \
|
||||
m.m = (a); \
|
||||
(m.u64[0]); \
|
||||
})
|
||||
|
||||
#endif /*RTE_ARCH_X86_64 */
|
||||
|
||||
/*
|
||||
* Prior to version 12.1 icc doesn't support _mm_set_epi64x.
|
||||
* Takes 2 SIMD registers containing N transitions eachi (tr0, tr1).
|
||||
* Shuffles it into different representation:
|
||||
* lo - contains low 32 bits of given N transitions.
|
||||
* hi - contains high 32 bits of given N transitions.
|
||||
*/
|
||||
#if (defined(__ICC) && __ICC < 1210)
|
||||
#define ACL_TR_HILO(P, TC, tr0, tr1, lo, hi) do { \
|
||||
lo = (typeof(lo))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0x88); \
|
||||
hi = (typeof(hi))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0xdd); \
|
||||
} while (0)
|
||||
|
||||
#define MM_SET64(a, b) ({ \
|
||||
rte_xmm_t m; \
|
||||
m.u64[0] = b; \
|
||||
m.u64[1] = a; \
|
||||
(m.m); \
|
||||
})
|
||||
|
||||
#else
|
||||
/*
|
||||
* Calculate the address of the next transition for
|
||||
* all types of nodes. Note that only DFA nodes and range
|
||||
* nodes actually transition to another node. Match
|
||||
* nodes not supposed to be encountered here.
|
||||
* For quad range nodes:
|
||||
* Calculate number of range boundaries that are less than the
|
||||
* input value. Range boundaries for each node are in signed 8 bit,
|
||||
* ordered from -128 to 127.
|
||||
* This is effectively a popcnt of bytes that are greater than the
|
||||
* input byte.
|
||||
* Single nodes are processed in the same ways as quad range nodes.
|
||||
*/
|
||||
#define ACL_TR_CALC_ADDR(P, S, \
|
||||
addr, index_mask, next_input, shuffle_input, \
|
||||
ones_16, range_base, tr_lo, tr_hi) do { \
|
||||
\
|
||||
typeof(addr) in, node_type, r, t; \
|
||||
typeof(addr) dfa_msk, dfa_ofs, quad_ofs; \
|
||||
\
|
||||
t = _##P##_xor_si##S(index_mask, index_mask); \
|
||||
in = _##P##_shuffle_epi8(next_input, shuffle_input); \
|
||||
\
|
||||
/* Calc node type and node addr */ \
|
||||
node_type = _##P##_andnot_si##S(index_mask, tr_lo); \
|
||||
addr = _##P##_and_si##S(index_mask, tr_lo); \
|
||||
\
|
||||
/* mask for DFA type(0) nodes */ \
|
||||
dfa_msk = _##P##_cmpeq_epi32(node_type, t); \
|
||||
\
|
||||
/* DFA calculations. */ \
|
||||
r = _##P##_srli_epi32(in, 30); \
|
||||
r = _##P##_add_epi8(r, range_base); \
|
||||
t = _##P##_srli_epi32(in, 24); \
|
||||
r = _##P##_shuffle_epi8(tr_hi, r); \
|
||||
\
|
||||
dfa_ofs = _##P##_sub_epi32(t, r); \
|
||||
\
|
||||
/* QUAD/SINGLE caluclations. */ \
|
||||
t = _##P##_cmpgt_epi8(in, tr_hi); \
|
||||
t = _##P##_sign_epi8(t, t); \
|
||||
t = _##P##_maddubs_epi16(t, t); \
|
||||
quad_ofs = _##P##_madd_epi16(t, ones_16); \
|
||||
\
|
||||
/* blend DFA and QUAD/SINGLE. */ \
|
||||
t = _##P##_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk); \
|
||||
\
|
||||
/* calculate address for next transitions. */ \
|
||||
addr = _##P##_add_epi32(addr, t); \
|
||||
} while (0)
|
||||
|
||||
#define MM_SET64(a, b) _mm_set_epi64x(a, b)
|
||||
|
||||
#endif /* (defined(__ICC) && __ICC < 1210) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -109,6 +109,18 @@ typedef union rte_ymm {
|
||||
})
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Prior to version 12.1 icc doesn't support _mm_set_epi64x.
|
||||
*/
|
||||
#if (defined(__ICC) && __ICC < 1210)
|
||||
#define _mm_set_epi64x(a, b) ({ \
|
||||
rte_xmm_t m; \
|
||||
m.u64[0] = b; \
|
||||
m.u64[1] = a; \
|
||||
(m.x); \
|
||||
})
|
||||
#endif /* (defined(__ICC) && __ICC < 1210) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user