net/mlx5: use mask for meter register setting
ASO (Advanced Steering Operation) meter feature may require to locate the flow context tag action after the ASO action. When color register is shared by meter_id/flow_id, it's like: Bits[0-7] A meter color value set by the HW. Bits[8-31] A flow id and meter id set by SW. Currently the tag action for meter writes all the bits of the meter register, so it will potentially overwrite meter color when ASO meter action is before the tag action. Set only 24-MSB-bits of meter register in the meter tag action. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
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@ -4258,9 +4258,11 @@ flow_hairpin_split(struct rte_eth_dev *dev,
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rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
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actions_rx++;
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set_tag = (void *)actions_rx;
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set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
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*set_tag = (struct mlx5_rte_flow_action_set_tag) {
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.id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
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.data = flow_id,
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};
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MLX5_ASSERT(set_tag->id > REG_NON);
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set_tag->data = flow_id;
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tag_action->conf = set_tag;
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/* Create Tx item list. */
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rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
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@ -4496,6 +4498,14 @@ flow_meter_split_prep(struct rte_eth_dev *dev,
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set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
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tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
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tag_item_mask = tag_item_spec + 1;
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/* Both flow_id and meter_id share the same register. */
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*set_tag = (struct mlx5_rte_flow_action_set_tag) {
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.id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
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0, error),
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.offset = mtr_id_offset,
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.length = mtr_reg_bits,
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.data = fm->idx,
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};
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/*
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* The color Reg bits used by flow_id are growing from
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* msb to lsb, so must do bit reverse for flow_id val in RegC.
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@ -4503,13 +4513,9 @@ flow_meter_split_prep(struct rte_eth_dev *dev,
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for (shift = 0; shift < flow_id_bits; shift++)
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flow_id_reversed = (flow_id_reversed << 1) |
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((flow_id >> shift) & 0x1);
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/* Both flow_id and meter_id share the same register. */
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set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 0, error);
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set_tag->data =
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(fm->idx | (flow_id_reversed << (mtr_reg_bits - flow_id_bits)))
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<< mtr_id_offset;
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set_tag->data |= flow_id_reversed << (mtr_reg_bits - flow_id_bits);
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tag_item_spec->id = set_tag->id;
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tag_item_spec->data = set_tag->data;
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tag_item_spec->data = set_tag->data << mtr_id_offset;
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tag_item_mask->data = UINT32_MAX << mtr_id_offset;
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tag_action->type = (enum rte_flow_action_type)
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MLX5_RTE_FLOW_ACTION_TYPE_TAG;
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@ -4904,10 +4910,12 @@ flow_sample_split_prep(struct rte_eth_dev *dev,
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ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
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if (ret < 0)
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return ret;
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set_tag->id = ret;
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mlx5_ipool_malloc(priv->sh->ipool
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[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
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set_tag->data = tag_id;
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*set_tag = (struct mlx5_rte_flow_action_set_tag) {
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.id = ret,
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.data = tag_id,
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};
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/* Prepare the suffix subflow items. */
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tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
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tag_spec->data = tag_id;
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@ -54,6 +54,8 @@ struct mlx5_rte_flow_item_tag {
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/* Modify selected register. */
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struct mlx5_rte_flow_action_set_tag {
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enum modify_reg id;
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uint8_t offset;
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uint8_t length;
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uint32_t data;
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};
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@ -965,6 +965,8 @@ flow_dv_convert_action_set_reg
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actions[i] = (struct mlx5_modification_cmd) {
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.action_type = MLX5_MODIFICATION_TYPE_SET,
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.field = reg_to_field[conf->id],
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.offset = conf->offset,
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.length = conf->length,
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};
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actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
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actions[i].data1 = rte_cpu_to_be_32(conf->data);
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