net/i40e/base: support persistent LLDP
This patch adds a function to read NVM module data and uses it to read current LLDP agent configuration from NVM API version 1.8. Signed-off-by: Sylwia Wnuczko <sylwia.wnuczko@intel.com> Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Beilei Xing <beilei.xing@intel.com>
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@ -877,7 +877,25 @@ enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change)
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return I40E_NOT_SUPPORTED;
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/* Read LLDP NVM area */
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if (hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT) {
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u8 offset = 0;
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if (hw->mac.type == I40E_MAC_XL710)
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offset = I40E_LLDP_CURRENT_STATUS_XL710_OFFSET;
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else if (hw->mac.type == I40E_MAC_X722)
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offset = I40E_LLDP_CURRENT_STATUS_X722_OFFSET;
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else
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return I40E_NOT_SUPPORTED;
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ret = i40e_read_nvm_module_data(hw,
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I40E_SR_EMP_SR_SETTINGS_PTR,
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offset,
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I40E_LLDP_CURRENT_STATUS_OFFSET,
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I40E_LLDP_CURRENT_STATUS_SIZE,
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&lldp_cfg.adminstatus);
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} else {
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ret = i40e_read_lldp_cfg(hw, &lldp_cfg);
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}
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if (ret)
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return I40E_ERR_NOT_READY;
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@ -39,6 +39,11 @@
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#define I40E_LLDP_ADMINSTATUS_ENABLED_TX 2
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#define I40E_LLDP_ADMINSTATUS_ENABLED_RXTX 3
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#define I40E_LLDP_CURRENT_STATUS_XL710_OFFSET 0x2B
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#define I40E_LLDP_CURRENT_STATUS_X722_OFFSET 0x31
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#define I40E_LLDP_CURRENT_STATUS_OFFSET 1
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#define I40E_LLDP_CURRENT_STATUS_SIZE 1
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/* Defines for LLDP TLV header */
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#define I40E_LLDP_MIB_HLEN 14
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#define I40E_LLDP_TLV_LEN_SHIFT 0
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@ -337,6 +337,77 @@ enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
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return ret_code;
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}
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/**
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* i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location
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* @hw: Pointer to the HW structure
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* @module_ptr: Pointer to module in words with respect to NVM beginning
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* @module_offset: Offset in words from module start
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* @data_offset: Offset in words from reading data area start
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* @words_data_size: Words to read from NVM
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* @data_ptr: Pointer to memory location where resulting buffer will be stored
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**/
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enum i40e_status_code
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i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset,
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u16 data_offset, u16 words_data_size, u16 *data_ptr)
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{
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enum i40e_status_code status;
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u16 specific_ptr = 0;
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u16 ptr_value = 0;
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u16 offset = 0;
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if (module_ptr != 0) {
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status = i40e_read_nvm_word(hw, module_ptr, &ptr_value);
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if (status != I40E_SUCCESS) {
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i40e_debug(hw, I40E_DEBUG_ALL,
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"Reading nvm word failed.Error code: %d.\n",
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status);
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return I40E_ERR_NVM;
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}
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}
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#define I40E_NVM_INVALID_PTR_VAL 0x7FFF
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#define I40E_NVM_INVALID_VAL 0xFFFF
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/* Pointer not initialized */
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if (ptr_value == I40E_NVM_INVALID_PTR_VAL ||
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ptr_value == I40E_NVM_INVALID_VAL) {
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i40e_debug(hw, I40E_DEBUG_ALL, "Pointer not initialized.\n");
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return I40E_ERR_BAD_PTR;
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}
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/* Check whether the module is in SR mapped area or outside */
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if (ptr_value & I40E_PTR_TYPE) {
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/* Pointer points outside of the Shared RAM mapped area */
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i40e_debug(hw, I40E_DEBUG_ALL,
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"Reading nvm data failed. Pointer points outside of the Shared RAM mapped area.\n");
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return I40E_ERR_PARAM;
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} else {
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/* Read from the Shadow RAM */
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status = i40e_read_nvm_word(hw, ptr_value + module_offset,
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&specific_ptr);
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if (status != I40E_SUCCESS) {
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i40e_debug(hw, I40E_DEBUG_ALL,
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"Reading nvm word failed.Error code: %d.\n",
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status);
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return I40E_ERR_NVM;
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}
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offset = ptr_value + module_offset + specific_ptr +
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data_offset;
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status = i40e_read_nvm_buffer(hw, offset, &words_data_size,
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data_ptr);
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if (status != I40E_SUCCESS) {
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i40e_debug(hw, I40E_DEBUG_ALL,
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"Reading nvm buffer failed.Error code: %d.\n",
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status);
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}
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}
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return status;
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}
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/**
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* i40e_read_nvm_buffer_srctl - Reads Shadow RAM buffer via SRCTL register
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* @hw: pointer to the HW structure
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@ -442,6 +442,9 @@ enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,
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void i40e_release_nvm(struct i40e_hw *hw);
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enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
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u16 *data);
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enum i40e_status_code
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i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset,
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u16 data_offset, u16 words_data_size, u16 *data_ptr);
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enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,
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u16 *words, u16 *data);
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enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module,
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