net/octeontx: use the new offload APIs
Use the new Rx/Tx offload APIs and remove the old style offloads. Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com> Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
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@ -262,6 +262,8 @@ octeontx_dev_configure(struct rte_eth_dev *dev)
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struct rte_eth_rxmode *rxmode = &conf->rxmode;
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struct rte_eth_txmode *txmode = &conf->txmode;
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struct octeontx_nic *nic = octeontx_pmd_priv(dev);
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uint64_t configured_offloads;
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uint64_t unsupported_offloads;
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int ret;
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PMD_INIT_FUNC_TRACE();
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@ -283,34 +285,38 @@ octeontx_dev_configure(struct rte_eth_dev *dev)
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return -EINVAL;
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}
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if (!rxmode->hw_strip_crc) {
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configured_offloads = rxmode->offloads;
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if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
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PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
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rxmode->hw_strip_crc = 1;
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configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
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}
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if (rxmode->hw_ip_checksum) {
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PMD_INIT_LOG(NOTICE, "rxcksum not supported");
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rxmode->hw_ip_checksum = 0;
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unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. "
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
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unsupported_offloads, configured_offloads,
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(uint64_t)OCTEONTX_RX_OFFLOADS);
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return -ENOTSUP;
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}
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if (rxmode->split_hdr_size) {
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octeontx_log_err("rxmode does not support split header");
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return -EINVAL;
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configured_offloads = txmode->offloads;
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if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
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PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
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configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
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}
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if (rxmode->hw_vlan_filter) {
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octeontx_log_err("VLAN filter not supported");
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return -EINVAL;
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}
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unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS;
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if (rxmode->hw_vlan_extend) {
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octeontx_log_err("VLAN extended not supported");
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return -EINVAL;
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}
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if (rxmode->enable_lro) {
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octeontx_log_err("LRO not supported");
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return -EINVAL;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported."
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
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unsupported_offloads, configured_offloads,
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(uint64_t)OCTEONTX_TX_OFFLOADS);
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return -ENOTSUP;
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}
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if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
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@ -616,6 +622,7 @@ octeontx_dev_info(struct rte_eth_dev *dev,
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dev_info->default_rxconf = (struct rte_eth_rxconf) {
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.rx_free_thresh = 0,
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.rx_drop_en = 0,
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.offloads = OCTEONTX_RX_OFFLOADS,
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};
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dev_info->default_txconf = (struct rte_eth_txconf) {
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@ -626,7 +633,8 @@ octeontx_dev_info(struct rte_eth_dev *dev,
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ETH_TXQ_FLAGS_NOXSUMS,
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};
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dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
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dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
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dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
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}
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static void
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@ -736,10 +744,11 @@ octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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struct octeontx_txq *txq = NULL;
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uint16_t dq_num;
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int res = 0;
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uint64_t configured_offloads;
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uint64_t unsupported_offloads;
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RTE_SET_USED(nb_desc);
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RTE_SET_USED(socket_id);
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RTE_SET_USED(tx_conf);
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dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
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@ -757,6 +766,22 @@ octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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dev->data->tx_queues[qidx] = NULL;
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}
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configured_offloads = tx_conf->offloads;
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if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
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PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
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configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
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}
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unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported."
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
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unsupported_offloads, configured_offloads,
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(uint64_t)OCTEONTX_TX_OFFLOADS);
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return -ENOTSUP;
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}
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/* Allocating tx queue data structure */
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txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
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RTE_CACHE_LINE_SIZE, nic->node);
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@ -812,6 +837,8 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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uint8_t gaura;
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unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
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unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
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uint64_t configured_offloads;
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uint64_t unsupported_offloads;
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RTE_SET_USED(nb_desc);
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@ -834,6 +861,22 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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port = nic->port_id;
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configured_offloads = rx_conf->offloads;
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if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
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PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
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configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
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}
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unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. "
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
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unsupported_offloads, configured_offloads,
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(uint64_t)OCTEONTX_RX_OFFLOADS);
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return -ENOTSUP;
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}
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/* Rx deferred start is not supported */
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if (rx_conf->rx_deferred_start) {
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octeontx_log_err("rx deferred start not supported");
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@ -28,6 +28,9 @@
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#define OCTEONTX_MAX_BGX_PORTS 4
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#define OCTEONTX_MAX_LMAC_PER_BGX 4
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#define OCTEONTX_RX_OFFLOADS DEV_RX_OFFLOAD_CRC_STRIP
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#define OCTEONTX_TX_OFFLOADS DEV_TX_OFFLOAD_MT_LOCKFREE
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static inline struct octeontx_nic *
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octeontx_pmd_priv(struct rte_eth_dev *dev)
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{
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