vdpa/mlx5: optimize notification events
When the virtio guest driver doesn't work with poll mode, the driver creates event mechanism in order to schedule completion notifications for each virtq burst traffic. When traffic comes to a virtq, a CQE will be added to the virtq CQ by the FW. The driver requests interrupt for the next CQE index, and when interrupt is triggered, the driver polls the CQ and notifies the guest by virtq callfd writing. According to the described method, the interrupts will be triggered for each burst of traffic. The burst size depends on interrupt latency. Interrupts management takes a lot of CPU cycles and using it for each traffic burst takes big portion of CPU capacity. When traffic is on, using timer for CQ poll scheduling instead of interrupts saves a lot of CPU cycles. Move CQ poll scheduling to be done by timer in case of running traffic. Request interrupts only when traffic is off. The timer scheduling management is done by a new dedicated thread uses a usleep command. Signed-off-by: Matan Azrad <matan@mellanox.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
This commit is contained in:
Matan Azrad
Ferruh Yigit
parent
a28e714618
commit
a9dd7275a1
@ -31,6 +31,7 @@ CFLAGS += $(WERROR_FLAGS)
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CFLAGS += -Wno-strict-prototypes
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LDLIBS += -lrte_common_mlx5
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LDLIBS += -lrte_eal -lrte_vhost -lrte_kvargs -lrte_pci -lrte_bus_pci -lrte_sched
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LDLIBS += -pthread
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# A few warnings cannot be avoided in external headers.
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CFLAGS += -Wno-error=cast-qual
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@ -40,6 +40,7 @@ struct mlx5_vdpa_cq {
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uint16_t log_desc_n;
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uint32_t cq_ci:24;
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uint32_t arm_sn:2;
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uint32_t armed:1;
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int callfd;
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rte_spinlock_t sl;
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struct mlx5_devx_obj *cq;
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@ -104,6 +105,12 @@ struct mlx5_vdpa_priv {
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TAILQ_ENTRY(mlx5_vdpa_priv) next;
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uint8_t configured;
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uint8_t direct_notifier; /* Whether direct notifier is on or off. */
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uint64_t last_traffic_tic;
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pthread_t timer_tid;
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pthread_mutex_t timer_lock;
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pthread_cond_t timer_cond;
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volatile uint8_t timer_on;
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uint32_t timer_delay_us;
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struct rte_vdpa_device *vdev; /* vDPA device. */
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int vid; /* vhost device id. */
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struct ibv_context *ctx; /* Device context. */
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@ -12,6 +12,7 @@
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#include <rte_atomic.h>
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#include <rte_common.h>
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#include <rte_io.h>
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#include <rte_alarm.h>
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#include <mlx5_common.h>
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@ -19,6 +20,9 @@
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#include "mlx5_vdpa.h"
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#define MLX5_VDPA_DEFAULT_TIMER_DELAY_US 500u
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#define MLX5_VDPA_NO_TRAFFIC_TIME_S 2LLU
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void
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mlx5_vdpa_event_qp_global_release(struct mlx5_vdpa_priv *priv)
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{
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@ -26,10 +30,23 @@ mlx5_vdpa_event_qp_global_release(struct mlx5_vdpa_priv *priv)
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mlx5_glue->devx_free_uar(priv->uar);
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priv->uar = NULL;
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}
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#ifdef HAVE_IBV_DEVX_EVENT
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if (priv->eventc) {
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union {
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struct mlx5dv_devx_async_event_hdr event_resp;
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uint8_t buf[sizeof(struct mlx5dv_devx_async_event_hdr)
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+ 128];
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} out;
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/* Clean all pending events. */
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while (mlx5_glue->devx_get_event(priv->eventc, &out.event_resp,
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sizeof(out.buf)) >=
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(ssize_t)sizeof(out.event_resp.cookie))
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;
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mlx5_glue->devx_destroy_event_channel(priv->eventc);
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priv->eventc = NULL;
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}
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#endif
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priv->eqn = 0;
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}
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@ -79,7 +96,7 @@ mlx5_vdpa_cq_destroy(struct mlx5_vdpa_cq *cq)
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memset(cq, 0, sizeof(*cq));
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}
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static inline void
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static inline void __rte_unused
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mlx5_vdpa_cq_arm(struct mlx5_vdpa_priv *priv, struct mlx5_vdpa_cq *cq)
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{
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uint32_t arm_sn = cq->arm_sn << MLX5_CQ_SQN_OFFSET;
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@ -100,6 +117,7 @@ mlx5_vdpa_cq_arm(struct mlx5_vdpa_priv *priv, struct mlx5_vdpa_cq *cq)
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*((uint32_t *)addr + 1) = db_be >> 32;
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#endif
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cq->arm_sn++;
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cq->armed = 1;
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}
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static int
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@ -157,6 +175,16 @@ mlx5_vdpa_cq_create(struct mlx5_vdpa_priv *priv, uint16_t log_desc_n,
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rte_errno = errno;
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goto error;
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}
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if (callfd != -1) {
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ret = mlx5_glue->devx_subscribe_devx_event_fd(priv->eventc,
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callfd,
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cq->cq->obj, 0);
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if (ret) {
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DRV_LOG(ERR, "Failed to subscribe CQE event fd.");
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rte_errno = errno;
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goto error;
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}
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}
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cq->callfd = callfd;
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/* Init CQ to ones to be in HW owner in the start. */
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memset((void *)(uintptr_t)cq->umem_buf, 0xFF, attr.db_umem_offset);
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@ -168,27 +196,27 @@ mlx5_vdpa_cq_create(struct mlx5_vdpa_priv *priv, uint16_t log_desc_n,
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return -1;
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}
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static inline void __rte_unused
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mlx5_vdpa_cq_poll(struct mlx5_vdpa_priv *priv __rte_unused,
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struct mlx5_vdpa_cq *cq)
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static inline uint32_t
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mlx5_vdpa_cq_poll(struct mlx5_vdpa_cq *cq)
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{
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struct mlx5_vdpa_event_qp *eqp =
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container_of(cq, struct mlx5_vdpa_event_qp, cq);
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const unsigned int cq_size = 1 << cq->log_desc_n;
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const unsigned int cq_mask = cq_size - 1;
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uint32_t total = 0;
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int ret;
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do {
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volatile struct mlx5_cqe *cqe = cq->cqes + (cq->cq_ci &
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cq_mask);
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volatile struct mlx5_cqe *cqe = cq->cqes + ((cq->cq_ci + total)
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& cq_mask);
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ret = check_cqe(cqe, cq_size, cq->cq_ci);
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ret = check_cqe(cqe, cq_size, cq->cq_ci + total);
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switch (ret) {
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case MLX5_CQE_STATUS_ERR:
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cq->errors++;
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/*fall-through*/
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case MLX5_CQE_STATUS_SW_OWN:
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cq->cq_ci++;
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total++;
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break;
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case MLX5_CQE_STATUS_HW_OWN:
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default:
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@ -196,21 +224,86 @@ mlx5_vdpa_cq_poll(struct mlx5_vdpa_priv *priv __rte_unused,
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}
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} while (ret != MLX5_CQE_STATUS_HW_OWN);
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rte_io_wmb();
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cq->cq_ci += total;
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/* Ring CQ doorbell record. */
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cq->db_rec[0] = rte_cpu_to_be_32(cq->cq_ci);
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rte_io_wmb();
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/* Ring SW QP doorbell record. */
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eqp->db_rec[0] = rte_cpu_to_be_32(cq->cq_ci + cq_size);
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return total;
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}
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static void
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mlx5_vdpa_arm_all_cqs(struct mlx5_vdpa_priv *priv)
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{
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struct mlx5_vdpa_cq *cq;
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int i;
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for (i = 0; i < priv->nr_virtqs; i++) {
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cq = &priv->virtqs[i].eqp.cq;
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if (cq->cq && !cq->armed)
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mlx5_vdpa_cq_arm(priv, cq);
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}
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}
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static void *
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mlx5_vdpa_poll_handle(void *arg)
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{
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struct mlx5_vdpa_priv *priv = arg;
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int i;
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struct mlx5_vdpa_cq *cq;
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uint32_t total;
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uint64_t current_tic;
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pthread_mutex_lock(&priv->timer_lock);
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while (!priv->timer_on)
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pthread_cond_wait(&priv->timer_cond, &priv->timer_lock);
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pthread_mutex_unlock(&priv->timer_lock);
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while (1) {
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total = 0;
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for (i = 0; i < priv->nr_virtqs; i++) {
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cq = &priv->virtqs[i].eqp.cq;
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if (cq->cq && !cq->armed) {
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uint32_t comp = mlx5_vdpa_cq_poll(cq);
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if (comp) {
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/* Notify guest for descs consuming. */
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if (cq->callfd != -1)
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eventfd_write(cq->callfd,
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(eventfd_t)1);
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total += comp;
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}
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}
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}
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current_tic = rte_rdtsc();
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if (!total) {
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/* No traffic ? stop timer and load interrupts. */
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if (current_tic - priv->last_traffic_tic >=
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rte_get_timer_hz() * MLX5_VDPA_NO_TRAFFIC_TIME_S) {
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DRV_LOG(DEBUG, "Device %s traffic was stopped.",
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priv->vdev->device->name);
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mlx5_vdpa_arm_all_cqs(priv);
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pthread_mutex_lock(&priv->timer_lock);
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priv->timer_on = 0;
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while (!priv->timer_on)
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pthread_cond_wait(&priv->timer_cond,
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&priv->timer_lock);
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pthread_mutex_unlock(&priv->timer_lock);
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continue;
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}
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} else {
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priv->last_traffic_tic = current_tic;
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}
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usleep(priv->timer_delay_us);
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}
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return NULL;
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}
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static void
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mlx5_vdpa_interrupt_handler(void *cb_arg)
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{
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#ifndef HAVE_IBV_DEVX_EVENT
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(void)cb_arg;
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return;
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#else
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struct mlx5_vdpa_priv *priv = cb_arg;
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#ifdef HAVE_IBV_DEVX_EVENT
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union {
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struct mlx5dv_devx_async_event_hdr event_resp;
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uint8_t buf[sizeof(struct mlx5dv_devx_async_event_hdr) + 128];
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@ -221,17 +314,30 @@ mlx5_vdpa_interrupt_handler(void *cb_arg)
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(ssize_t)sizeof(out.event_resp.cookie)) {
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struct mlx5_vdpa_cq *cq = (struct mlx5_vdpa_cq *)
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(uintptr_t)out.event_resp.cookie;
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rte_spinlock_lock(&cq->sl);
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mlx5_vdpa_cq_poll(priv, cq);
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mlx5_vdpa_cq_arm(priv, cq);
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if (cq->callfd != -1)
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/* Notify guest for descriptors consuming. */
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eventfd_write(cq->callfd, (eventfd_t)1);
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rte_spinlock_unlock(&cq->sl);
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DRV_LOG(DEBUG, "CQ %d event: new cq_ci = %u.", cq->cq->id,
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cq->cq_ci);
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struct mlx5_vdpa_event_qp *eqp = container_of(cq,
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struct mlx5_vdpa_event_qp, cq);
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struct mlx5_vdpa_virtq *virtq = container_of(eqp,
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struct mlx5_vdpa_virtq, eqp);
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mlx5_vdpa_cq_poll(cq);
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/* Don't arm again - timer will take control. */
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DRV_LOG(DEBUG, "Device %s virtq %d cq %d event was captured."
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" Timer is %s, cq ci is %u.\n",
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priv->vdev->device->name,
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(int)virtq->index, cq->cq->id,
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priv->timer_on ? "on" : "off", cq->cq_ci);
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cq->armed = 0;
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}
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#endif /* HAVE_IBV_DEVX_ASYNC */
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#endif
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/* Traffic detected: make sure timer is on. */
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priv->last_traffic_tic = rte_rdtsc();
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pthread_mutex_lock(&priv->timer_lock);
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if (!priv->timer_on) {
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priv->timer_on = 1;
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pthread_cond_signal(&priv->timer_cond);
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}
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pthread_mutex_unlock(&priv->timer_lock);
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}
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int
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@ -243,12 +349,21 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
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if (!priv->eventc)
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/* All virtqs are in poll mode. */
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return 0;
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pthread_mutex_init(&priv->timer_lock, NULL);
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pthread_cond_init(&priv->timer_cond, NULL);
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priv->timer_on = 0;
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priv->timer_delay_us = MLX5_VDPA_DEFAULT_TIMER_DELAY_US;
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ret = pthread_create(&priv->timer_tid, NULL, mlx5_vdpa_poll_handle,
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(void *)priv);
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if (ret) {
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DRV_LOG(ERR, "Failed to create timer thread.");
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return -1;
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}
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flags = fcntl(priv->eventc->fd, F_GETFL);
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ret = fcntl(priv->eventc->fd, F_SETFL, flags | O_NONBLOCK);
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if (ret) {
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DRV_LOG(ERR, "Failed to change event channel FD.");
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rte_errno = errno;
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return -rte_errno;
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goto error;
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}
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priv->intr_handle.fd = priv->eventc->fd;
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priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
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@ -256,9 +371,12 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
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mlx5_vdpa_interrupt_handler, priv)) {
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priv->intr_handle.fd = 0;
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DRV_LOG(ERR, "Failed to register CQE interrupt %d.", rte_errno);
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return -rte_errno;
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goto error;
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}
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return 0;
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error:
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mlx5_vdpa_cqe_event_unset(priv);
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return -1;
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}
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void
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@ -266,6 +384,7 @@ mlx5_vdpa_cqe_event_unset(struct mlx5_vdpa_priv *priv)
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{
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int retries = MLX5_VDPA_INTR_RETRIES;
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int ret = -EAGAIN;
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void *status;
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if (priv->intr_handle.fd) {
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while (retries-- && ret == -EAGAIN) {
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@ -276,11 +395,16 @@ mlx5_vdpa_cqe_event_unset(struct mlx5_vdpa_priv *priv)
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DRV_LOG(DEBUG, "Try again to unregister fd %d "
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"of CQ interrupt, retries = %d.",
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priv->intr_handle.fd, retries);
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usleep(MLX5_VDPA_INTR_RETRIES_USEC);
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rte_pause();
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}
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}
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memset(&priv->intr_handle, 0, sizeof(priv->intr_handle));
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}
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if (priv->timer_tid) {
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pthread_cancel(priv->timer_tid);
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pthread_join(priv->timer_tid, &status);
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}
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priv->timer_tid = 0;
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}
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void
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