common/sfc_efx/base: add event queue operation to do polling
Event queue host interface differ on Riverhead and implementation will be different. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
This commit is contained in:
Andrew Rybchenko
Ferruh Yigit
parent
bb01a80e24
commit
ad1e3ed8c5
@ -66,6 +66,17 @@ siena_ev_qstats_update(
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#endif /* EFSYS_OPT_SIENA */
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#if EFX_OPTS_EF10() || EFSYS_OPT_SIENA
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static void
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siena_ef10_ev_qpoll(
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__in efx_evq_t *eep,
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__inout unsigned int *countp,
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__in const efx_ev_callbacks_t *eecp,
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__in_opt void *arg);
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#endif /* EFX_OPTS_EF10() || EFSYS_OPT_SIENA */
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#if EFSYS_OPT_SIENA
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static const efx_ev_ops_t __efx_ev_siena_ops = {
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siena_ev_init, /* eevo_init */
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@ -74,6 +85,7 @@ static const efx_ev_ops_t __efx_ev_siena_ops = {
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siena_ev_qdestroy, /* eevo_qdestroy */
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siena_ev_qprime, /* eevo_qprime */
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siena_ev_qpost, /* eevo_qpost */
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siena_ef10_ev_qpoll, /* eevo_qpoll */
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siena_ev_qmoderate, /* eevo_qmoderate */
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#if EFSYS_OPT_QSTATS
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siena_ev_qstats_update, /* eevo_qstats_update */
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@ -89,6 +101,7 @@ static const efx_ev_ops_t __efx_ev_ef10_ops = {
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ef10_ev_qdestroy, /* eevo_qdestroy */
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ef10_ev_qprime, /* eevo_qprime */
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ef10_ev_qpost, /* eevo_qpost */
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siena_ef10_ev_qpoll, /* eevo_qpoll */
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ef10_ev_qmoderate, /* eevo_qmoderate */
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#if EFSYS_OPT_QSTATS
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ef10_ev_qstats_update, /* eevo_qstats_update */
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@ -374,8 +387,6 @@ efx_ev_qprefetch(
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#endif /* EFSYS_OPT_EV_PREFETCH */
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#define EFX_EV_BATCH 8
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void
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efx_ev_qpoll(
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__in efx_evq_t *eep,
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@ -383,153 +394,15 @@ efx_ev_qpoll(
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__in const efx_ev_callbacks_t *eecp,
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__in_opt void *arg)
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{
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efx_qword_t ev[EFX_EV_BATCH];
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unsigned int batch;
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unsigned int total;
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unsigned int count;
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unsigned int index;
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size_t offset;
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/* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
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EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
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EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
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FSE_AZ_EV_CODE_DRV_GEN_EV);
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#if EFSYS_OPT_MCDI
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
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FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
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#endif
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efx_nic_t *enp = eep->ee_enp;
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const efx_ev_ops_t *eevop = enp->en_eevop;
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EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
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EFSYS_ASSERT(countp != NULL);
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EFSYS_ASSERT(eecp != NULL);
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count = *countp;
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do {
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/* Read up until the end of the batch period */
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batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
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offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
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for (total = 0; total < batch; ++total) {
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EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
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EFSYS_ASSERT(eevop != NULL &&
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eevop->eevo_qpoll != NULL);
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if (!EFX_EV_PRESENT(ev[total]))
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break;
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EFSYS_PROBE3(event, unsigned int, eep->ee_index,
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uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
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uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
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offset += sizeof (efx_qword_t);
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}
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#if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
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/*
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* Prefetch the next batch when we get within PREFETCH_PERIOD
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* of a completed batch. If the batch is smaller, then prefetch
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* immediately.
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*/
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if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
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EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
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#endif /* EFSYS_OPT_EV_PREFETCH */
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/* Process the batch of events */
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for (index = 0; index < total; ++index) {
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boolean_t should_abort;
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uint32_t code;
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#if EFSYS_OPT_EV_PREFETCH
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/* Prefetch if we've now reached the batch period */
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if (total == batch &&
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index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
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offset = (count + batch) & eep->ee_mask;
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offset *= sizeof (efx_qword_t);
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EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
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}
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#endif /* EFSYS_OPT_EV_PREFETCH */
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EFX_EV_QSTAT_INCR(eep, EV_ALL);
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code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
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switch (code) {
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case FSE_AZ_EV_CODE_RX_EV:
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should_abort = eep->ee_rx(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_TX_EV:
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should_abort = eep->ee_tx(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_DRIVER_EV:
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should_abort = eep->ee_driver(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_DRV_GEN_EV:
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should_abort = eep->ee_drv_gen(eep,
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&(ev[index]), eecp, arg);
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break;
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#if EFSYS_OPT_MCDI
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case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
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should_abort = eep->ee_mcdi(eep,
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&(ev[index]), eecp, arg);
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break;
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#endif
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case FSE_AZ_EV_CODE_GLOBAL_EV:
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if (eep->ee_global) {
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should_abort = eep->ee_global(eep,
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&(ev[index]), eecp, arg);
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break;
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}
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/* else fallthrough */
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default:
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EFSYS_PROBE3(bad_event,
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unsigned int, eep->ee_index,
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uint32_t,
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EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
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uint32_t,
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EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
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EFSYS_ASSERT(eecp->eec_exception != NULL);
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(void) eecp->eec_exception(arg,
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EFX_EXCEPTION_EV_ERROR, code);
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should_abort = B_TRUE;
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}
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if (should_abort) {
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/* Ignore subsequent events */
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total = index + 1;
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/*
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* Poison batch to ensure the outer
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* loop is broken out of.
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*/
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EFSYS_ASSERT(batch <= EFX_EV_BATCH);
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batch += (EFX_EV_BATCH << 1);
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EFSYS_ASSERT(total != batch);
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break;
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}
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}
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/*
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* Now that the hardware has most likely moved onto dma'ing
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* into the next cache line, clear the processed events. Take
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* care to only clear out events that we've processed
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*/
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EFX_SET_QWORD(ev[0]);
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offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
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for (index = 0; index < total; ++index) {
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EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
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offset += sizeof (efx_qword_t);
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}
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count += total;
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} while (total == batch);
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*countp = count;
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eevop->eevo_qpoll(eep, countp, eecp, arg);
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}
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void
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@ -1484,3 +1357,165 @@ siena_ev_fini(
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}
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#endif /* EFSYS_OPT_SIENA */
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#if EFX_OPTS_EF10() || EFSYS_OPT_SIENA
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#define EFX_EV_BATCH 8
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static void
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siena_ef10_ev_qpoll(
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__in efx_evq_t *eep,
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__inout unsigned int *countp,
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__in const efx_ev_callbacks_t *eecp,
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__in_opt void *arg)
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{
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efx_qword_t ev[EFX_EV_BATCH];
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unsigned int batch;
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unsigned int total;
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unsigned int count;
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unsigned int index;
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size_t offset;
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/* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
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EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
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EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
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FSE_AZ_EV_CODE_DRV_GEN_EV);
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#if EFSYS_OPT_MCDI
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EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
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FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
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#endif
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EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
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EFSYS_ASSERT(countp != NULL);
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EFSYS_ASSERT(eecp != NULL);
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count = *countp;
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do {
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/* Read up until the end of the batch period */
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batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
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offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
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for (total = 0; total < batch; ++total) {
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EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
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if (!EFX_EV_PRESENT(ev[total]))
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break;
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EFSYS_PROBE3(event, unsigned int, eep->ee_index,
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uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
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uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
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offset += sizeof (efx_qword_t);
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}
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#if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
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/*
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* Prefetch the next batch when we get within PREFETCH_PERIOD
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* of a completed batch. If the batch is smaller, then prefetch
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* immediately.
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*/
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if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
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EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
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#endif /* EFSYS_OPT_EV_PREFETCH */
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/* Process the batch of events */
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for (index = 0; index < total; ++index) {
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boolean_t should_abort;
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uint32_t code;
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#if EFSYS_OPT_EV_PREFETCH
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/* Prefetch if we've now reached the batch period */
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if (total == batch &&
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index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
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offset = (count + batch) & eep->ee_mask;
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offset *= sizeof (efx_qword_t);
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EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
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}
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#endif /* EFSYS_OPT_EV_PREFETCH */
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EFX_EV_QSTAT_INCR(eep, EV_ALL);
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code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
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switch (code) {
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case FSE_AZ_EV_CODE_RX_EV:
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should_abort = eep->ee_rx(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_TX_EV:
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should_abort = eep->ee_tx(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_DRIVER_EV:
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should_abort = eep->ee_driver(eep,
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&(ev[index]), eecp, arg);
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break;
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case FSE_AZ_EV_CODE_DRV_GEN_EV:
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should_abort = eep->ee_drv_gen(eep,
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&(ev[index]), eecp, arg);
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break;
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#if EFSYS_OPT_MCDI
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case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
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should_abort = eep->ee_mcdi(eep,
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&(ev[index]), eecp, arg);
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break;
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#endif
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case FSE_AZ_EV_CODE_GLOBAL_EV:
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if (eep->ee_global) {
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should_abort = eep->ee_global(eep,
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&(ev[index]), eecp, arg);
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break;
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}
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/* else fallthrough */
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default:
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EFSYS_PROBE3(bad_event,
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unsigned int, eep->ee_index,
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uint32_t,
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EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
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uint32_t,
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EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
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EFSYS_ASSERT(eecp->eec_exception != NULL);
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(void) eecp->eec_exception(arg,
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EFX_EXCEPTION_EV_ERROR, code);
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should_abort = B_TRUE;
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}
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if (should_abort) {
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/* Ignore subsequent events */
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total = index + 1;
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/*
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* Poison batch to ensure the outer
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* loop is broken out of.
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*/
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EFSYS_ASSERT(batch <= EFX_EV_BATCH);
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batch += (EFX_EV_BATCH << 1);
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EFSYS_ASSERT(total != batch);
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break;
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}
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}
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/*
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* Now that the hardware has most likely moved onto dma'ing
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* into the next cache line, clear the processed events. Take
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* care to only clear out events that we've processed
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*/
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EFX_SET_QWORD(ev[0]);
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offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
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for (index = 0; index < total; ++index) {
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EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
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offset += sizeof (efx_qword_t);
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}
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count += total;
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} while (total == batch);
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*countp = count;
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}
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#endif /* EFX_OPTS_EF10() || EFSYS_OPT_SIENA */
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@ -85,6 +85,8 @@ typedef struct efx_ev_ops_s {
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void (*eevo_qdestroy)(efx_evq_t *);
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efx_rc_t (*eevo_qprime)(efx_evq_t *, unsigned int);
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void (*eevo_qpost)(efx_evq_t *, uint16_t);
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void (*eevo_qpoll)(efx_evq_t *, unsigned int *,
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const efx_ev_callbacks_t *, void *);
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efx_rc_t (*eevo_qmoderate)(efx_evq_t *, unsigned int);
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#if EFSYS_OPT_QSTATS
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void (*eevo_qstats_update)(efx_evq_t *, efsys_stat_t *);
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