ethdev: move info filling of PCI into drivers
Only the drivers itself can decide if it could fill PCI information fields of dev_info. Signed-off-by: Jan Blunck <jblunck@infradead.org> Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
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@ -431,6 +431,7 @@ static void
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bnx2x_dev_infos_get(struct rte_eth_dev *dev, __rte_unused struct rte_eth_dev_info *dev_info)
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{
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struct bnx2x_softc *sc = dev->data->dev_private;
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dev_info->pci_dev = dev->pci_dev;
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dev_info->max_rx_queues = sc->max_rx_queues;
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dev_info->max_tx_queues = sc->max_tx_queues;
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dev_info->min_rx_bufsize = BNX2X_MIN_RX_BUF_SIZE;
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@ -303,6 +303,8 @@ static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
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struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
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uint16_t max_vnics, i, j, vpool, vrxq;
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dev_info->pci_dev = eth_dev->pci_dev;
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/* MAC Specifics */
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dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
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dev_info->max_hash_mac_addrs = 0;
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@ -147,6 +147,8 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
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.nb_align = 1,
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};
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device_info->pci_dev = eth_dev->pci_dev;
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device_info->min_rx_bufsize = CXGBE_MIN_RX_BUFSIZE;
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device_info->max_rx_pktlen = CXGBE_MAX_RX_PKTLEN;
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device_info->max_rx_queues = max_queues;
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@ -1049,6 +1049,7 @@ eth_em_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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{
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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dev_info->pci_dev = dev->pci_dev;
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dev_info->min_rx_bufsize = 256; /* See BSIZE field of RCTL register. */
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dev_info->max_rx_pktlen = em_get_max_pktlen(hw);
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dev_info->max_mac_addrs = hw->mac.rar_entry_count;
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@ -1985,6 +1985,7 @@ eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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{
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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dev_info->pci_dev = dev->pci_dev;
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dev_info->min_rx_bufsize = 256; /* See BSIZE field of RCTL register. */
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dev_info->max_rx_pktlen = 0x3FFF; /* See RLPML register. */
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dev_info->max_mac_addrs = hw->mac.rar_entry_count;
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@ -2113,6 +2114,7 @@ eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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{
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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dev_info->pci_dev = dev->pci_dev;
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dev_info->min_rx_bufsize = 256; /* See BSIZE field of RCTL register. */
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dev_info->max_rx_pktlen = 0x3FFF; /* See RLPML register. */
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dev_info->max_mac_addrs = hw->mac.rar_entry_count;
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@ -1436,6 +1436,8 @@ static void ena_infos_get(struct rte_eth_dev *dev,
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ena_dev = &adapter->ena_dev;
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ena_assert_msg(ena_dev != NULL, "Uninitialized device");
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dev_info->pci_dev = dev->pci_dev;
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dev_info->speed_capa =
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ETH_LINK_SPEED_1G |
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ETH_LINK_SPEED_2_5G |
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@ -459,6 +459,7 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
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struct enic *enic = pmd_priv(eth_dev);
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ENICPMD_FUNC_TRACE();
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device_info->pci_dev = eth_dev->pci_dev;
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/* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
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device_info->max_rx_queues = enic->conf_rq_count / 2;
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device_info->max_tx_queues = enic->conf_wq_count;
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@ -1393,6 +1393,7 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev,
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PMD_INIT_FUNC_TRACE();
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dev_info->pci_dev = pdev;
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dev_info->min_rx_bufsize = FM10K_MIN_RX_BUF_SIZE;
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dev_info->max_rx_pktlen = FM10K_MAX_PKT_SIZE;
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dev_info->max_rx_queues = hw->mac.max_queues;
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@ -2597,6 +2597,7 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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struct i40e_vsi *vsi = pf->main_vsi;
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struct rte_pci_device *pci_dev = I40E_DEV_TO_PCI(dev);
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dev_info->pci_dev = pci_dev;
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dev_info->max_rx_queues = vsi->nb_qps;
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dev_info->max_tx_queues = vsi->nb_qps;
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dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
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@ -2225,6 +2225,7 @@ i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
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memset(dev_info, 0, sizeof(*dev_info));
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dev_info->pci_dev = dev->pci_dev;
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dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
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dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
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dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
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@ -3035,6 +3035,7 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
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dev_info->pci_dev = pci_dev;
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dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
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dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
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if (RTE_ETH_DEV_SRIOV(dev).active == 0) {
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@ -3167,6 +3168,7 @@ ixgbevf_dev_info_get(struct rte_eth_dev *dev,
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struct rte_pci_device *pci_dev = IXGBE_DEV_TO_PCI(dev);
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struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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dev_info->pci_dev = pci_dev;
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dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
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dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
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dev_info->min_rx_bufsize = 1024; /* cf BSIZEPACKET in SRRCTL reg */
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@ -4421,6 +4421,8 @@ mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
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unsigned int max;
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char ifname[IF_NAMESIZE];
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info->pci_dev = dev->pci_dev;
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if (priv == NULL)
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return;
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priv_lock(priv);
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@ -562,6 +562,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
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unsigned int max;
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char ifname[IF_NAMESIZE];
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info->pci_dev = dev->pci_dev;
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priv_lock(priv);
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/* FIXME: we should ask the device for these values. */
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info->min_rx_bufsize = 32;
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@ -1008,6 +1008,7 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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dev_info->pci_dev = dev->pci_dev;
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dev_info->driver_name = dev->driver->pci_drv.driver.name;
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dev_info->max_rx_queues = (uint16_t)hw->max_rx_queues;
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dev_info->max_tx_queues = (uint16_t)hw->max_tx_queues;
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@ -651,6 +651,7 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
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PMD_INIT_FUNC_TRACE(edev);
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dev_info->pci_dev = eth_dev->pci_dev;
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dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
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QEDE_ETH_OVERHEAD);
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dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
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@ -1031,6 +1031,7 @@ eth_dev_info(struct rte_eth_dev *dev,
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struct rte_eth_dev_info *dev_info)
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{
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struct pmd_internals *internals = dev->data->dev_private;
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dev_info->pci_dev = dev->pci_dev;
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dev_info->if_index = 0;
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dev_info->max_mac_addrs = 1;
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dev_info->max_rx_pktlen = (uint32_t)-1;
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@ -1338,6 +1338,8 @@ nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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PMD_INIT_FUNC_TRACE();
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dev_info->pci_dev = dev->pci_dev;
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dev_info->min_rx_bufsize = ETHER_MIN_MTU;
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dev_info->max_rx_pktlen = NIC_HW_MAX_FRS;
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dev_info->max_rx_queues =
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@ -1626,6 +1626,7 @@ virtio_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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uint64_t tso_mask;
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struct virtio_hw *hw = dev->data->dev_private;
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dev_info->pci_dev = hw->dev;
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dev_info->max_rx_queues =
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RTE_MIN(hw->max_queue_pairs, VIRTIO_MAX_RX_QUEUES);
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dev_info->max_tx_queues =
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@ -706,9 +706,11 @@ vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
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}
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static void
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vmxnet3_dev_info_get(__rte_unused struct rte_eth_dev *dev,
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vmxnet3_dev_info_get(struct rte_eth_dev *dev,
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struct rte_eth_dev_info *dev_info)
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{
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dev_info->pci_dev = dev->pci_dev;
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dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
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dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
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dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
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@ -1604,7 +1604,6 @@ rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
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RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
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(*dev->dev_ops->dev_infos_get)(dev, dev_info);
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dev_info->pci_dev = dev->pci_dev;
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dev_info->driver_name = dev->data->drv_name;
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dev_info->nb_rx_queues = dev->data->nb_rx_queues;
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dev_info->nb_tx_queues = dev->data->nb_tx_queues;
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