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common/cnxk: add cn9k IPsec microcode defines

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Microcode IE opcodes support IPsec operations. Add defines
and structs defined by microcode.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
This commit is contained in:
Archana Muniganti 2021-09-07 19:50:59 +05:30 committed by Akhil Goyal
parent 4cbef1e936
commit b07ee12f3a
2 changed files with 150 additions and 9 deletions
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1
drivers/common/cnxk/roc_cpt.h
View File

@ -47,6 +47,7 @@
#define ROC_CPT_AES_GCM_MAC_LEN 16
#define ROC_CPT_AES_CBC_IV_LEN 16
#define ROC_CPT_SHA1_HMAC_LEN 12
#define ROC_CPT_SHA2_HMAC_LEN 16
#define ROC_CPT_AUTH_KEY_LEN_MAX 64
#define ROC_CPT_DES3_KEY_LEN 24

158
drivers/common/cnxk/roc_ie_on.h
View File

@ -5,18 +5,24 @@
#ifndef __ROC_IE_ON_H__
#define __ROC_IE_ON_H__
/* CN9K IPSEC LA opcodes */
#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_OUTBOUND 0x20
#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_INBOUND 0x21
#define ROC_IE_ONL_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23
#define ROC_IE_ONL_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x24
/* CN9K IPsec LA */
/* CN9K IPSEC FP opcodes */
#define ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x25UL
#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL
/* CN9K IPsec LA opcodes */
#define ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_OUTBOUND 0x20
#define ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND 0x21
#define ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23
#define ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x24
/* Ucode completion codes */
#define ROC_IE_ONF_UCC_SUCCESS 0
enum roc_ie_on_ucc_ipsec {
ROC_IE_ON_UCC_SUCCESS = 0,
ROC_IE_ON_AUTH_UNSUPPORTED = 0xB0,
ROC_IE_ON_ENCRYPT_UNSUPPORTED = 0xB1,
};
/* Helper macros */
#define ROC_IE_ON_PER_PKT_IV BIT(11)
#define ROC_IE_ON_INB_RPTR_HDR 0x8
enum {
ROC_IE_ON_SA_ENC_NULL = 0,
@ -50,6 +56,140 @@ enum {
ROC_IE_ON_SA_ENCAP_UDP = 1,
};
struct roc_ie_on_outb_hdr {
uint32_t ip_id;
uint32_t seq;
uint8_t iv[16];
};
union roc_ie_on_bit_perfect_iv {
uint8_t aes_iv[16];
uint8_t des_iv[8];
struct {
uint8_t nonce[4];
uint8_t iv[8];
uint8_t counter[4];
} gcm;
};
struct roc_ie_on_traffic_selector {
uint16_t src_port[2];
uint16_t dst_port[2];
union {
struct {
uint32_t src_addr[2];
uint32_t dst_addr[2];
} ipv4;
struct {
uint8_t src_addr[32];
uint8_t dst_addr[32];
} ipv6;
};
};
struct roc_ie_on_ip_template {
union {
struct {
uint8_t ipv4_hdr[20];
uint16_t udp_src;
uint16_t udp_dst;
} ip4;
struct {
uint8_t ipv6_hdr[40];
uint16_t udp_src;
uint16_t udp_dst;
} ip6;
};
};
struct roc_ie_on_sa_ctl {
uint64_t spi : 32;
uint64_t exp_proto_inter_frag : 8;
uint64_t copy_df : 1;
uint64_t frag_type : 1;
uint64_t explicit_iv_en : 1;
uint64_t esn_en : 1;
uint64_t rsvd_45_44 : 2;
uint64_t encap_type : 2;
uint64_t enc_type : 3;
uint64_t rsvd_48 : 1;
uint64_t auth_type : 4;
uint64_t valid : 1;
uint64_t direction : 1;
uint64_t outer_ip_ver : 1;
uint64_t inner_ip_ver : 1;
uint64_t ipsec_mode : 1;
uint64_t ipsec_proto : 1;
uint64_t aes_key_len : 2;
};
struct roc_ie_on_common_sa {
/* w0 */
struct roc_ie_on_sa_ctl ctl;
/* w1-w4 */
uint8_t cipher_key[32];
/* w5-w6 */
union roc_ie_on_bit_perfect_iv iv;
/* w7 */
uint32_t esn_hi;
uint32_t esn_low;
};
struct roc_ie_on_outb_sa {
/* w0 - w7 */
struct roc_ie_on_common_sa common_sa;
/* w8-w55 */
union {
struct {
struct roc_ie_on_ip_template template;
} aes_gcm;
struct {
uint8_t hmac_key[24];
uint8_t unused[24];
struct roc_ie_on_ip_template template;
} sha1;
struct {
uint8_t hmac_key[64];
uint8_t hmac_iv[64];
struct roc_ie_on_ip_template template;
} sha2;
};
};
struct roc_ie_on_inb_sa {
/* w0 - w7 */
struct roc_ie_on_common_sa common_sa;
/* w8 */
uint8_t udp_encap[8];
/* w9-w33 */
union {
struct {
uint8_t hmac_key[48];
struct roc_ie_on_traffic_selector selector;
} sha1_or_gcm;
struct {
uint8_t hmac_key[64];
uint8_t hmac_iv[64];
struct roc_ie_on_traffic_selector selector;
} sha2;
};
};
/* CN9K IPsec FP */
/* CN9K IPsec FP opcodes */
#define ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x25UL
#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL
/* Ucode completion codes */
#define ROC_IE_ONF_UCC_SUCCESS 0
struct roc_ie_onf_sa_ctl {
uint32_t spi;
uint64_t exp_proto_inter_frag : 8;