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lpm6: fix buffer overflow

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This patch fixes buffer overflow reported by ASAN,
please reference https://bugs.dpdk.org/show_bug.cgi?id=819

The rte_lpm6 keeps routing information for control plane purpose
inside the rte_hash table which uses rte_jhash() as a hash function.
From the rte_jhash() documentation: If input key is not aligned to
four byte boundaries or a multiple of four bytes in length,
the memory region just after may be read (but not used in the
computation).
rte_lpm6 uses 17 bytes keys consisting of IPv6 address (16 bytes) +
depth (1 byte).

This patch increases the size of the depth field up to uint32_t
and sets the alignment to 4 bytes.

Bugzilla ID: 819
Fixes: 86b3b21952a8 ("lpm6: store rules in hash table")
Cc: stable@dpdk.org

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
This commit is contained in:
Vladimir Medvedkin 2021-10-21 18:15:49 +01:00 committed by Thomas Monjalon
parent 45523f494c
commit b16ac53657
1 changed files with 3 additions and 1 deletions
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4
lib/lpm/rte_lpm6.c
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@ -80,7 +80,7 @@ struct rte_lpm6_rule {
/** Rules tbl entry key. */
struct rte_lpm6_rule_key {
uint8_t ip[RTE_LPM6_IPV6_ADDR_SIZE]; /**< Rule IP address. */
uint8_t depth; /**< Rule depth. */
uint32_t depth; /**< Rule depth. */
};
/* Header of tbl8 */
@ -259,6 +259,8 @@ rte_lpm6_create(const char *name, int socket_id,
lpm_list = RTE_TAILQ_CAST(rte_lpm6_tailq.head, rte_lpm6_list);
RTE_BUILD_BUG_ON(sizeof(struct rte_lpm6_tbl_entry) != sizeof(uint32_t));
RTE_BUILD_BUG_ON(sizeof(struct rte_lpm6_rule_key) %
sizeof(uint32_t) != 0);
/* Check user arguments. */
if ((name == NULL) || (socket_id < -1) || (config == NULL) ||