common/qat: add PF to VF communication
Add communication between physical device and virtual function in Intel QucikAssist Technology PMD. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
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e4beb311d2
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@ -49,6 +49,7 @@ sources += files(
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'qat_qp.c',
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'qat_device.c',
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'qat_logs.c',
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'qat_pf2vf.c',
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)
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includes += include_directories(
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'qat_adf',
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154
drivers/common/qat/qat_adf/adf_pf2vf_msg.h
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154
drivers/common/qat/qat_adf/adf_pf2vf_msg.h
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@ -0,0 +1,154 @@
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/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
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* Copyright(c) 2021 Intel Corporation
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*/
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#ifndef ADF_PF2VF_MSG_H_
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#define ADF_PF2VF_MSG_H_
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/* VF/PF compatibility version. */
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/* ADF_PFVF_COMPATIBILITY_EXT_CAP: Support for extended capabilities */
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#define ADF_PFVF_COMPATIBILITY_CAPABILITIES 2
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/* ADF_PFVF_COMPATIBILITY_FAST_ACK: In-use pattern cleared by receiver */
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#define ADF_PFVF_COMPATIBILITY_FAST_ACK 3
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#define ADF_PFVF_COMPATIBILITY_RING_TO_SVC_MAP 4
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#define ADF_PFVF_COMPATIBILITY_VERSION 4 /* PF<->VF compat */
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#define ADF_PFVF_INT 1
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#define ADF_PFVF_MSGORIGIN_SYSTEM 2
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#define ADF_PFVF_1X_MSGTYPE_SHIFT 2
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#define ADF_PFVF_1X_MSGTYPE_MASK 0xF
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#define ADF_PFVF_1X_MSGDATA_SHIFT 6
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#define ADF_PFVF_1X_MSGDATA_MASK 0x3FF
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#define ADF_PFVF_2X_MSGTYPE_SHIFT 2
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#define ADF_PFVF_2X_MSGTYPE_MASK 0x3F
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#define ADF_PFVF_2X_MSGDATA_SHIFT 8
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#define ADF_PFVF_2X_MSGDATA_MASK 0xFFFFFF
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#define ADF_PFVF_IN_USE 0x6AC2
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#define ADF_PFVF_IN_USE_MASK 0xFFFE
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#define ADF_PFVF_VF_MSG_SHIFT 16
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/* PF->VF messages */
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#define ADF_PF2VF_MSGTYPE_RESTARTING 0x01
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#define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02
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#define ADF_PF2VF_MSGTYPE_BLOCK_RESP 0x03
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#define ADF_PF2VF_MSGTYPE_FATAL_ERROR 0x04
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/* Do not use messages which start from 0x10 to 1.x as 1.x only use
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* 4 bits as message types. Hence they are only applicable to 2.0
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*/
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#define ADF_PF2VF_MSGTYPE_RP_RESET_RESP 0x10
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/* PF->VF Version Response - ADF_PF2VF_MSGTYPE_VERSION_RESP */
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#define ADF_PF2VF_VERSION_RESP_VERS_MASK 0xFF
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#define ADF_PF2VF_VERSION_RESP_VERS_SHIFT 0
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#define ADF_PF2VF_VERSION_RESP_RESULT_MASK 0x03
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#define ADF_PF2VF_VERSION_RESP_RESULT_SHIFT 8
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#define ADF_PF2VF_MINORVERSION_SHIFT 0
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#define ADF_PF2VF_MAJORVERSION_SHIFT 4
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#define ADF_PF2VF_VF_COMPATIBLE 1
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#define ADF_PF2VF_VF_INCOMPATIBLE 2
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#define ADF_PF2VF_VF_COMPAT_UNKNOWN 3
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/* PF->VF Block Response Type - ADF_PF2VF_MSGTYPE_BLOCK_RESP */
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#define ADF_PF2VF_BLOCK_RESP_TYPE_DATA 0x0
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#define ADF_PF2VF_BLOCK_RESP_TYPE_CRC 0x1
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#define ADF_PF2VF_BLOCK_RESP_TYPE_ERROR 0x2
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#define ADF_PF2VF_BLOCK_RESP_TYPE_MASK 0x03
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#define ADF_PF2VF_BLOCK_RESP_TYPE_SHIFT 0
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#define ADF_PF2VF_BLOCK_RESP_DATA_MASK 0xFF
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#define ADF_PF2VF_BLOCK_RESP_DATA_SHIFT 2
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/*
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* PF->VF Block Error Code - Returned in data field when the
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* response type indicates an error
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*/
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#define ADF_PF2VF_INVALID_BLOCK_TYPE 0x0
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#define ADF_PF2VF_INVALID_BYTE_NUM_REQ 0x1
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#define ADF_PF2VF_PAYLOAD_TRUNCATED 0x2
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#define ADF_PF2VF_UNSPECIFIED_ERROR 0x3
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/* VF->PF messages */
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#define ADF_VF2PF_MSGTYPE_INIT 0x3
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#define ADF_VF2PF_MSGTYPE_SHUTDOWN 0x4
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#define ADF_VF2PF_MSGTYPE_VERSION_REQ 0x5
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#define ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ 0x6
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#define ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ 0x7
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#define ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ 0x8
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#define ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ 0x9
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/* Do not use messages which start from 0x10 to 1.x as 1.x only use
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* 4 bits as message types. Hence they are only applicable to 2.0
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*/
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#define ADF_VF2PF_MSGTYPE_RP_RESET 0x10
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/* VF->PF Block Request Type - ADF_VF2PF_MSGTYPE_GET_xxx_BLOCK_REQ */
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#define ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE 0
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#define ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE \
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(ADF_VF2PF_MIN_SMALL_MESSAGE_TYPE + 15)
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#define ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE \
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(ADF_VF2PF_MAX_SMALL_MESSAGE_TYPE + 1)
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#define ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE \
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(ADF_VF2PF_MIN_MEDIUM_MESSAGE_TYPE + 7)
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#define ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE \
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(ADF_VF2PF_MAX_MEDIUM_MESSAGE_TYPE + 1)
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#define ADF_VF2PF_MAX_LARGE_MESSAGE_TYPE \
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(ADF_VF2PF_MIN_LARGE_MESSAGE_TYPE + 3)
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#define ADF_VF2PF_SMALL_PAYLOAD_SIZE 30
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#define ADF_VF2PF_MEDIUM_PAYLOAD_SIZE 62
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#define ADF_VF2PF_LARGE_PAYLOAD_SIZE 126
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#define ADF_VF2PF_BLOCK_REQ_TYPE_SHIFT 0
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#define ADF_VF2PF_LARGE_BLOCK_REQ_TYPE_MASK 0x3
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#define ADF_VF2PF_MEDIUM_BLOCK_REQ_TYPE_MASK 0x7
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#define ADF_VF2PF_SMALL_BLOCK_REQ_TYPE_MASK 0xF
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#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT 2
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#define ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_MASK 0x7F
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#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT 3
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#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_MASK 0x3F
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#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT 4
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#define ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_MASK 0x1F
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#define ADF_VF2PF_BLOCK_REQ_CRC_SHIFT 9
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/* PF-VF block message header bytes */
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#define ADF_VF2PF_BLOCK_VERSION_BYTE 0
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#define ADF_VF2PF_BLOCK_LEN_BYTE 1
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#define ADF_VF2PF_BLOCK_DATA 2
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/* Block message types
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* 0..15 - 32 byte message
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* 16..23 - 64 byte message
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* 24..27 - 128 byte message
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* 2 - Get Capability Request message
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*/
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#define ADF_VF2PF_BLOCK_MSG_CAP_SUMMARY 0x2
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#define ADF_VF2PF_BLOCK_MSG_GET_RING_TO_SVC_REQ 0x3
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/* VF->PF Compatible Version Request - ADF_VF2PF_MSGTYPE_VERSION_REQ */
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#define ADF_VF2PF_COMPAT_VER_SHIFT 0
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#define ADF_VF2PF_COMPAT_VER_MASK 0xFF
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/* How long to wait for far side to acknowledge receipt */
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#define ADF_IOV_MSG_ACK_DELAY_US 5
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#define ADF_IOV_MSG_ACK_MAX_RETRY (100 * 1000 / ADF_IOV_MSG_ACK_DELAY_US)
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/* If CSR is busy, how long to delay before retrying */
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#define ADF_IOV_MSG_RETRY_DELAY 5
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#define ADF_IOV_MSG_MAX_RETRIES 3
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/* How long to wait for a response from the other side */
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#define ADF_IOV_MSG_RESP_TIMEOUT 100
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/* How often to retry when there is no response */
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#define ADF_IOV_MSG_RESP_RETRIES 5
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#define ADF_IOV_RATELIMIT_INTERVAL 8
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#define ADF_IOV_RATELIMIT_BURST 130
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/* PF VF message byte shift */
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#define ADF_PFVF_DATA_SHIFT 8
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#define ADF_PFVF_DATA_MASK 0xFF
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/* CRC Calculation */
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#define ADF_CRC8_INIT_VALUE 0xFF
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/* Per device register offsets */
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/* GEN 4 */
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#define ADF_4XXXIOV_PF2VM_OFFSET 0x1008
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#define ADF_4XXXIOV_VM2PF_OFFSET 0x100C
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#endif /* ADF_IOV_MSG_H */
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@ -10,6 +10,17 @@
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#include "adf_transport_access_macros.h"
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#include "qat_sym_pmd.h"
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#include "qat_comp_pmd.h"
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#include "adf_pf2vf_msg.h"
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/* pv2vf data Gen 4*/
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struct qat_pf2vf_dev qat_pf2vf_gen4 = {
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.pf2vf_offset = ADF_4XXXIOV_PF2VM_OFFSET,
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.vf2pf_offset = ADF_4XXXIOV_VM2PF_OFFSET,
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.pf2vf_type_shift = ADF_PFVF_2X_MSGTYPE_SHIFT,
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.pf2vf_type_mask = ADF_PFVF_2X_MSGTYPE_MASK,
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.pf2vf_data_shift = ADF_PFVF_2X_MSGDATA_SHIFT,
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.pf2vf_data_mask = ADF_PFVF_2X_MSGDATA_MASK,
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};
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/* Hardware device information per generation */
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__extension__
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@ -33,7 +44,8 @@ struct qat_gen_hw_data qat_gen_config[] = {
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[QAT_GEN4] = {
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.dev_gen = QAT_GEN4,
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.qp_hw_data = NULL,
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.comp_num_im_bufs_required = QAT_NUM_INTERM_BUFS_GEN3
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.comp_num_im_bufs_required = QAT_NUM_INTERM_BUFS_GEN3,
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.pf2vf_dev = &qat_pf2vf_gen4
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},
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};
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@ -249,6 +261,14 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,
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return NULL;
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}
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if (qat_dev->qat_dev_gen == QAT_GEN4) {
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qat_dev->misc_bar_io_addr = pci_dev->mem_resource[2].addr;
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if (qat_dev->misc_bar_io_addr == NULL) {
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QAT_LOG(ERR, "QAT cannot get access to VF misc bar");
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return NULL;
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}
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}
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if (devargs && devargs->drv_str)
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qat_dev_parse_cmd(devargs->drv_str, qat_dev_cmd_param);
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@ -108,12 +108,24 @@ struct qat_pci_device {
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struct qat_qp_hw_data qp_gen4_data[QAT_GEN4_BUNDLE_NUM]
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[QAT_GEN4_QPS_PER_BUNDLE_NUM];
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/**< Data of ring configuration on gen4 */
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void *misc_bar_io_addr;
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/**< Address of misc bar */
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};
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struct qat_gen_hw_data {
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enum qat_device_gen dev_gen;
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const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
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enum qat_comp_num_im_buffers comp_num_im_bufs_required;
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struct qat_pf2vf_dev *pf2vf_dev;
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};
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struct qat_pf2vf_dev {
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uint32_t pf2vf_offset;
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uint32_t vf2pf_offset;
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int pf2vf_type_shift;
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uint32_t pf2vf_type_mask;
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int pf2vf_data_shift;
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uint32_t pf2vf_data_mask;
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};
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extern struct qat_gen_hw_data qat_gen_config[];
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drivers/common/qat/qat_pf2vf.c
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80
drivers/common/qat/qat_pf2vf.c
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@ -0,0 +1,80 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Intel Corporation
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*/
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#include "qat_pf2vf.h"
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#include "adf_pf2vf_msg.h"
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#include <rte_cycles.h>
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int qat_pf2vf_exch_msg(struct qat_pci_device *qat_dev,
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struct qat_pf2vf_msg pf2vf_msg,
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int len, uint8_t *ret)
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{
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int i = 0;
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struct qat_pf2vf_dev *qat_pf2vf =
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qat_gen_config[qat_dev->qat_dev_gen].pf2vf_dev;
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void *pmisc_bar_addr = qat_dev->misc_bar_io_addr;
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uint32_t msg = 0, count = 0, val = 0;
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uint32_t vf_csr_off = qat_pf2vf->vf2pf_offset;
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uint32_t pf_csr_off = qat_pf2vf->pf2vf_offset;
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int type_shift = qat_pf2vf->pf2vf_type_shift;
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uint32_t type_mask = qat_pf2vf->pf2vf_type_mask;
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int blck_hdr_shift = qat_pf2vf->pf2vf_data_shift;
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int data_shift = blck_hdr_shift;
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switch (pf2vf_msg.msg_type) {
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case ADF_VF2PF_MSGTYPE_GET_SMALL_BLOCK_REQ:
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data_shift += ADF_VF2PF_SMALL_BLOCK_BYTE_NUM_SHIFT;
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break;
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case ADF_VF2PF_MSGTYPE_GET_MEDIUM_BLOCK_REQ:
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data_shift += ADF_VF2PF_MEDIUM_BLOCK_BYTE_NUM_SHIFT;
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break;
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case ADF_VF2PF_MSGTYPE_GET_LARGE_BLOCK_REQ:
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data_shift += ADF_VF2PF_LARGE_BLOCK_BYTE_NUM_SHIFT;
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break;
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}
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if ((pf2vf_msg.msg_type & type_mask) != pf2vf_msg.msg_type) {
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QAT_LOG(ERR, "PF2VF message type 0x%X out of range\n",
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pf2vf_msg.msg_type);
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return -EINVAL;
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}
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for (; i < len; i++) {
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count = 0;
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if (len == 1) {
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msg = (pf2vf_msg.msg_type << type_shift) |
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(pf2vf_msg.msg_data << (data_shift));
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} else
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msg = (pf2vf_msg.msg_type << type_shift) |
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((pf2vf_msg.msg_data + i) << (data_shift));
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if (pf2vf_msg.block_hdr > 0)
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msg |= pf2vf_msg.block_hdr << blck_hdr_shift;
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msg |= ADF_PFVF_INT | ADF_PFVF_MSGORIGIN_SYSTEM;
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ADF_CSR_WR(pmisc_bar_addr, vf_csr_off, msg);
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int us = 0;
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/*
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* Wait for confirmation from remote that it received
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* the message
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*/
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do {
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rte_delay_us_sleep(5);
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us += 5;
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val = ADF_CSR_RD(pmisc_bar_addr, vf_csr_off);
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} while ((val & ADF_PFVF_INT) &&
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(++count < ADF_IOV_MSG_ACK_MAX_RETRY));
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if (val & ADF_PFVF_INT) {
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QAT_LOG(ERR, "ACK not received from remote\n");
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return -EIO;
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}
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uint32_t pf_val = ADF_CSR_RD(pmisc_bar_addr, pf_csr_off);
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*(ret + i) = (uint8_t)(pf_val >> (pf2vf_msg.block_hdr > 0 ?
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10 : 8) & 0xff);
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}
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return 0;
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}
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19
drivers/common/qat/qat_pf2vf.h
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19
drivers/common/qat/qat_pf2vf.h
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@ -0,0 +1,19 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Intel Corporation
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*/
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#include "qat_device.h"
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#ifndef QAT_PF2VF_H_
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#define QAT_PF2VF_H_
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struct qat_pf2vf_msg {
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uint32_t msg_data;
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int block_hdr;
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uint16_t msg_type;
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};
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int qat_pf2vf_exch_msg(struct qat_pci_device *qat_dev,
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struct qat_pf2vf_msg pf2vf_msg, int len, uint8_t *ret);
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#endif
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