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crypto/qat: use I/O device memory read/write API

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Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

CC: John Griffin <john.griffin@intel.com>
CC: Fiona Trahe <fiona.trahe@intel.com>
CC: Deepak Kumar Jain <deepak.k.jain@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Santosh Shukla 2017-01-18 06:51:28 +05:30 committed by Thomas Monjalon
parent 635acf386a
commit b1cbca1e7f
1 changed files with 6 additions and 5 deletions
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11
drivers/crypto/qat/qat_adf/adf_transport_access_macros.h
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@ -47,14 +47,15 @@
#ifndef ADF_TRANSPORT_ACCESS_MACROS_H
#define ADF_TRANSPORT_ACCESS_MACROS_H
#include <rte_io.h>
/* CSR write macro */
#define ADF_CSR_WR(csrAddr, csrOffset, val) \
(void)((*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)) \
= (val)))
#define ADF_CSR_WR(csrAddr, csrOffset, val) \
rte_write32(val, (((uint8_t *)csrAddr) + csrOffset))
/* CSR read macro */
#define ADF_CSR_RD(csrAddr, csrOffset) \
(*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)))
#define ADF_CSR_RD(csrAddr, csrOffset) \
rte_read32((((uint8_t *)csrAddr) + csrOffset))
#define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL
#define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL