raw/octeontx2_dma: add driver self test
Sample test to verify DMA functionality, this test covers internal transfer mode. Signed-off-by: Satha Rao <skoteshwar@marvell.com> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
This commit is contained in:
Satha Rao
Thomas Monjalon
parent
78ca17f594
commit
b225073dda
@ -88,3 +88,17 @@ Performing Data Transfer
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To perform data transfer using OCTEON TX2 DMA rawdev devices use standard
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``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
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Self test
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---------
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On EAL initialization, dma devices will be probed and populated into the
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raw devices. The rawdev ID of the device can be obtained using
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* Invoke ``rte_rawdev_get_dev_id("DPI:x")`` from the application
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where x is the VF device's bus id specified in "bus:device.func" format. Use this
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index for further rawdev function calls.
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* This PMD supports driver self test, to test DMA internal mode from test
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application one can directly calls
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``rte_rawdev_selftest(rte_rawdev_get_dev_id("DPI:x"))``
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@ -11,7 +11,7 @@ CFLAGS += -O3 $(WERROR_FLAGS)
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CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2/
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CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2/
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CFLAGS += -I$(RTE_SDK)/drivers/raw/octeontx2_dma/
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LDLIBS += -lrte_eal -lrte_rawdev -lrte_bus_pci
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LDLIBS += -lrte_eal -lrte_rawdev -lrte_bus_pci -lrte_mbuf
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LDLIBS += -lrte_common_octeontx2 -lrte_mempool
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ifneq ($(CONFIG_RTE_ARCH_64),y)
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@ -31,5 +31,6 @@ LIBABIVER := 1
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#
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SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c
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SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_msg.c
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SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_test.c
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include $(RTE_SDK)/mk/rte.lib.mk
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@ -3,7 +3,7 @@
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#
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deps += ['bus_pci', 'common_octeontx2', 'rawdev']
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sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c')
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sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c', 'otx2_dpi_test.c')
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extra_flags = []
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# This integrated controller runs only on a arm64 machine, remove 32bit warnings
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@ -338,6 +338,7 @@ static const struct rte_rawdev_ops dpi_rawdev_ops = {
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.dev_reset = otx2_dpi_rawdev_reset,
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.enqueue_bufs = otx2_dpi_rawdev_enqueue_bufs,
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.dequeue_bufs = otx2_dpi_rawdev_dequeue_bufs,
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.dev_selftest = test_otx2_dma_rawdev,
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};
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static int
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@ -191,5 +191,6 @@ union dpi_dma_instr_hdr_u {
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int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);
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int otx2_dpi_queue_close(uint16_t vf_id);
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int test_otx2_dma_rawdev(uint16_t val);
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#endif /* _DPI_RAWDEV_H_ */
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217
drivers/raw/octeontx2_dma/otx2_dpi_test.c
Normal file
217
drivers/raw/octeontx2_dma/otx2_dpi_test.c
Normal file
@ -0,0 +1,217 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <rte_common.h>
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#include <rte_debug.h>
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#include <rte_eal.h>
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#include <rte_log.h>
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#include <rte_malloc.h>
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#include <rte_mbuf.h>
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#include <rte_mbuf_pool_ops.h>
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#include <rte_memcpy.h>
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#include <rte_memory.h>
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#include <rte_mempool.h>
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#include <rte_per_lcore.h>
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#include <rte_rawdev.h>
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#include "otx2_dpi_rawdev.h"
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static struct dpi_cring_data_s cring;
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static uint8_t
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buffer_fill(uint8_t *addr, int len, uint8_t val)
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{
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int j = 0;
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memset(addr, 0, len);
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for (j = 0; j < len; j++)
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*(addr + j) = val++;
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return val;
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}
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static int
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validate_buffer(uint8_t *saddr, uint8_t *daddr, int len)
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{
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int j = 0, ret = 0;
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for (j = 0; j < len; j++) {
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if (*(saddr + j) != *(daddr + j)) {
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otx2_dpi_dbg("FAIL: Data Integrity failed");
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otx2_dpi_dbg("index: %d, Expected: 0x%x, Actual: 0x%x",
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j, *(saddr + j), *(daddr + j));
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ret = -1;
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break;
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}
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}
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return ret;
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}
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static inline int
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dma_test_internal(int dma_port, int buf_size)
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{
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struct dpi_dma_req_compl_s *comp_data;
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struct dpi_dma_queue_ctx_s ctx = {0};
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struct rte_rawdev_buf buf = {0};
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struct rte_rawdev_buf *d_buf[1];
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struct rte_rawdev_buf *bufp[1];
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struct dpi_dma_buf_ptr_s cmd;
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union dpi_dma_ptr_u rptr = { {0} };
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union dpi_dma_ptr_u wptr = { {0} };
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uint8_t *fptr, *lptr;
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int ret;
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fptr = (uint8_t *)rte_malloc("dummy", buf_size, 128);
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lptr = (uint8_t *)rte_malloc("dummy", buf_size, 128);
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comp_data = rte_malloc("dummy", buf_size, 128);
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if (fptr == NULL || lptr == NULL || comp_data == NULL) {
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otx2_dpi_dbg("Unable to allocate internal memory");
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return -ENOMEM;
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}
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buffer_fill(fptr, buf_size, 0);
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memset(&cmd, 0, sizeof(struct dpi_dma_buf_ptr_s));
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memset(lptr, 0, buf_size);
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memset(comp_data, 0, buf_size);
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rptr.s.ptr = (uint64_t)fptr;
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rptr.s.length = buf_size;
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wptr.s.ptr = (uint64_t)lptr;
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wptr.s.length = buf_size;
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cmd.rptr[0] = &rptr;
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cmd.wptr[0] = &wptr;
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cmd.rptr_cnt = 1;
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cmd.wptr_cnt = 1;
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cmd.comp_ptr = comp_data;
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buf.buf_addr = (void *)&cmd;
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bufp[0] = &buf;
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ctx.xtype = DPI_XTYPE_INTERNAL_ONLY;
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ctx.pt = 0;
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ctx.c_ring = &cring;
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ret = rte_rawdev_enqueue_buffers(dma_port,
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(struct rte_rawdev_buf **)bufp, 1,
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&ctx);
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if (ret < 0) {
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otx2_dpi_dbg("Enqueue request failed");
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return 0;
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}
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/* Wait and dequeue completion */
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do {
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sleep(1);
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ret = rte_rawdev_dequeue_buffers(dma_port, &d_buf[0], 1, &ctx);
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if (ret)
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break;
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otx2_dpi_dbg("Dequeue request not completed");
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} while (1);
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if (validate_buffer(fptr, lptr, buf_size)) {
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otx2_dpi_dbg("DMA transfer failed\n");
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return -EAGAIN;
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}
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otx2_dpi_dbg("Internal Only DMA transfer successfully completed");
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if (lptr)
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rte_free(lptr);
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if (fptr)
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rte_free(fptr);
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if (comp_data)
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rte_free(comp_data);
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return 0;
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}
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static void *
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dpi_create_mempool(void)
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{
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void *chunk_pool = NULL;
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char pool_name[25];
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int ret;
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snprintf(pool_name, sizeof(pool_name), "dpi_chunk_pool");
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chunk_pool = (void *)rte_mempool_create_empty(pool_name, 1024, 1024,
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0, 0, rte_socket_id(), 0);
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if (chunk_pool == NULL) {
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otx2_dpi_dbg("Unable to create memory pool.");
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return NULL;
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}
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ret = rte_mempool_set_ops_byname(chunk_pool,
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rte_mbuf_platform_mempool_ops(), NULL);
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if (ret < 0) {
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otx2_dpi_dbg("Unable to set pool ops");
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rte_mempool_free(chunk_pool);
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return NULL;
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}
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ret = rte_mempool_populate_default(chunk_pool);
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if (ret < 0) {
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otx2_dpi_dbg("Unable to populate pool");
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return NULL;
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}
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return chunk_pool;
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}
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int
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test_otx2_dma_rawdev(uint16_t val)
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{
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struct rte_rawdev_info rdev_info = {0};
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struct dpi_rawdev_conf_s conf = {0};
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int ret, i, size = 1024;
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int nb_ports;
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RTE_SET_USED(val);
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nb_ports = rte_rawdev_count();
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if (nb_ports == 0) {
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otx2_dpi_dbg("No Rawdev ports - bye");
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return -ENODEV;
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}
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i = rte_rawdev_get_dev_id("DPI:5:00.1");
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/* Configure rawdev ports */
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conf.chunk_pool = dpi_create_mempool();
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rdev_info.dev_private = &conf;
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ret = rte_rawdev_configure(i, (rte_rawdev_obj_t)&rdev_info);
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if (ret) {
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otx2_dpi_dbg("Unable to configure DPIVF %d", i);
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return -ENODEV;
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}
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otx2_dpi_dbg("rawdev %d configured successfully", i);
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/* Each stream allocate its own completion ring data, store it in
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* application context. Each stream needs to use same application
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* context for enqueue/dequeue.
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*/
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cring.compl_data = rte_malloc("dummy", sizeof(void *) * 1024, 128);
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if (!cring.compl_data) {
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otx2_dpi_dbg("Completion allocation failed");
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return -ENOMEM;
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}
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cring.max_cnt = 1024;
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cring.head = 0;
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cring.tail = 0;
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ret = dma_test_internal(i, size);
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if (ret)
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otx2_dpi_dbg("DMA transfer failed for queue %d", i);
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if (rte_rawdev_close(i))
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otx2_dpi_dbg("Dev close failed for port %d", i);
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if (conf.chunk_pool)
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rte_mempool_free(conf.chunk_pool);
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return ret;
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}
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