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net/ice: support L4 for QinQ switch filter

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Add L4 support for QinQ switch filter as following flow patterns:
eth / vlan / vlan / ipv4 / udp
eth / vlan / vlan / ipv4 / tcp
eth / vlan / vlan / ipv6 / udp
eth / vlan / vlan / ipv6 / tcp

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This commit is contained in:
Steve Yang 2021-09-10 08:54:57 +00:00 committed by Qi Zhang
parent 45570d7e44
commit b43045eede
2 changed files with 24 additions and 0 deletions
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4
drivers/net/ice/ice_generic_flow.c
View File

@ -2134,11 +2134,15 @@ static struct ice_ptype_match ice_ptype_map[] = {
{pattern_eth_arp, ICE_PTYPE_MAC_PAY},
{pattern_eth_vlan_ipv4, ICE_PTYPE_IPV4_PAY},
{pattern_eth_qinq_ipv4, ICE_PTYPE_IPV4_PAY},
{pattern_eth_qinq_ipv4_udp, ICE_PTYPE_IPV4_UDP_PAY},
{pattern_eth_qinq_ipv4_tcp, ICE_PTYPE_IPV4_TCP_PAY},
{pattern_eth_vlan_ipv4_udp, ICE_PTYPE_IPV4_UDP_PAY},
{pattern_eth_vlan_ipv4_tcp, ICE_PTYPE_IPV4_TCP_PAY},
{pattern_eth_vlan_ipv4_sctp, ICE_PTYPE_IPV4_SCTP_PAY},
{pattern_eth_vlan_ipv6, ICE_PTYPE_IPV6_PAY},
{pattern_eth_qinq_ipv6, ICE_PTYPE_IPV6_PAY},
{pattern_eth_qinq_ipv6_udp, ICE_PTYPE_IPV6_UDP_PAY},
{pattern_eth_qinq_ipv6_tcp, ICE_PTYPE_IPV6_TCP_PAY},
{pattern_eth_vlan_ipv6_udp, ICE_PTYPE_IPV6_UDP_PAY},
{pattern_eth_vlan_ipv6_tcp, ICE_PTYPE_IPV6_TCP_PAY},
{pattern_eth_vlan_ipv6_sctp, ICE_PTYPE_IPV6_SCTP_PAY},

20
drivers/net/ice/ice_switch_filter.c
View File

@ -44,6 +44,12 @@
ICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS)
#define ICE_SW_INSET_MAC_QINQ_IPV4 ( \
ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV4)
#define ICE_SW_INSET_MAC_QINQ_IPV4_TCP ( \
ICE_SW_INSET_MAC_QINQ_IPV4 | \
ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT)
#define ICE_SW_INSET_MAC_QINQ_IPV4_UDP ( \
ICE_SW_INSET_MAC_QINQ_IPV4 | \
ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT)
#define ICE_SW_INSET_MAC_IPV4_TCP ( \
ICE_INSET_DMAC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_SRC | \
ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS | \
@ -58,6 +64,12 @@
ICE_INSET_IPV6_NEXT_HDR)
#define ICE_SW_INSET_MAC_QINQ_IPV6 ( \
ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV6)
#define ICE_SW_INSET_MAC_QINQ_IPV6_TCP ( \
ICE_SW_INSET_MAC_QINQ_IPV6 | \
ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT)
#define ICE_SW_INSET_MAC_QINQ_IPV6_UDP ( \
ICE_SW_INSET_MAC_QINQ_IPV6 | \
ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT)
#define ICE_SW_INSET_MAC_IPV6_TCP ( \
ICE_INSET_DMAC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_SRC | \
ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_TC | \
@ -216,7 +228,11 @@ ice_pattern_match_item ice_switch_pattern_dist_list[] = {
{pattern_eth_ipv4_pfcp, ICE_INSET_NONE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_ipv6_pfcp, ICE_INSET_NONE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4, ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4_tcp, ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4_udp, ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6, ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6_tcp, ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6_udp, ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes, ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_proto, ICE_SW_INSET_MAC_PPPOE_PROTO, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_ipv4, ICE_SW_INSET_MAC_PPPOE_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},
@ -295,7 +311,11 @@ ice_pattern_match_item ice_switch_pattern_perm_list[] = {
{pattern_eth_ipv4_pfcp, ICE_INSET_NONE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_ipv6_pfcp, ICE_INSET_NONE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4, ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4_tcp, ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4_udp, ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6, ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6_tcp, ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6_udp, ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes, ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_proto, ICE_SW_INSET_MAC_PPPOE_PROTO, ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_ipv4, ICE_SW_INSET_MAC_PPPOE_IPV4, ICE_INSET_NONE, ICE_INSET_NONE},