baseband/acc100: configure PMON control registers

Enable performance monitor control registers.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
This commit is contained in:
Hernan Vargas 2022-10-20 22:21:02 -07:00 committed by Akhil Goyal
parent 989dec301a
commit b4bd57b74c

View File

@ -115,6 +115,8 @@ struct acc100_registry_addr {
unsigned int depth_log1_offset;
unsigned int qman_group_func;
unsigned int ddr_range;
unsigned int pmon_ctrl_a;
unsigned int pmon_ctrl_b;
};
/* Structure holding registry addresses for PF */
@ -144,6 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
.qman_group_func = HWPfQmgrGrpFunction0,
.ddr_range = HWPfDmaVfDdrBaseRw,
.pmon_ctrl_a = HWVfPmACntrlRegVf,
.pmon_ctrl_b = HWVfPmBCntrlRegVf,
};
/* Structure holding registry addresses for VF */