baseband/acc100: configure PMON control registers
Enable performance monitor control registers. Signed-off-by: Hernan Vargas <hernan.vargas@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
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@ -115,6 +115,8 @@ struct acc100_registry_addr {
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unsigned int depth_log1_offset;
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unsigned int qman_group_func;
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unsigned int ddr_range;
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unsigned int pmon_ctrl_a;
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unsigned int pmon_ctrl_b;
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};
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/* Structure holding registry addresses for PF */
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@ -144,6 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
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.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
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.qman_group_func = HWPfQmgrGrpFunction0,
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.ddr_range = HWPfDmaVfDdrBaseRw,
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.pmon_ctrl_a = HWVfPmACntrlRegVf,
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.pmon_ctrl_b = HWVfPmBCntrlRegVf,
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};
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/* Structure holding registry addresses for VF */
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