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net/octeontx2: change default RSS hash calculation

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Before C0 HW revision, The RSS adder was computed based the following
static formula.

rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^
flow_tag<23:16> ^ flow_tag<31:24>

The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.

C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.

This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
This commit is contained in:
Jerin Jacob 2020-01-29 22:54:12 +05:30 committed by Ferruh Yigit
parent 6645b283eb
commit b4bf22d173
5 changed files with 31 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
doc/guides/nics/octeontx2.rst
View File

@ -165,7 +165,7 @@ Runtime Config Options
With the above configuration, each send queue's decscriptor buffer count is
limited to a maximum of 64 buffers.
- ``switch header enable`` (default ``none``)
- ``Switch header enable`` (default ``none``)
A port can be configured to a specific switch header type by using
``switch_header`` ``devargs`` parameter.
@ -178,6 +178,23 @@ Runtime Config Options
traffic on this port should be higig2 traffic only. Supported switch header
types are "higig2" and "dsa".
- ``RSS tag as XOR`` (default ``0``)
C0 HW revision onward, The HW gives an option to configure the RSS adder as
* ``rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^ flow_tag<23:16> ^ flow_tag<31:24>``
* ``rss_adder<7:0> = flow_tag<7:0>``
Latter one aligns with standard NIC behavior vs former one is a legacy
RSS adder scheme used in OCTEON TX2 products.
By default, the driver runs in the latter mode from C0 HW revision onward.
Setting this flag to 1 to select the legacy mode.
For example to select the legacy mode(RSS tag adder as XOR)::
-w 0002:02:00.0,tag_as_xor=1
.. note::
Above devarg parameters are configurable per device, user needs to pass the

4
drivers/common/octeontx2/otx2_mbox.h
View File

@ -89,7 +89,7 @@ struct mbox_msghdr {
#define OTX2_MBOX_RSP_SIG (0xbeef)
/* Signature, for validating corrupted msgs */
uint16_t __otx2_io sig;
#define OTX2_MBOX_VERSION (0x0003)
#define OTX2_MBOX_VERSION (0x0004)
/* Version of msg's structure for this ID */
uint16_t __otx2_io ver;
/* Offset of next msg within mailbox region */
@ -707,6 +707,8 @@ struct nix_lf_alloc_req {
uint16_t __otx2_io sso_func;
uint64_t __otx2_io rx_cfg; /* See NIX_AF_LF(0..127)_RX_CFG */
uint64_t __otx2_io way_mask;
#define NIX_LF_RSS_TAG_LSB_AS_ADDER BIT_ULL(0)
uint64_t flags;
};
struct nix_lf_alloc_rsp {

2
drivers/net/octeontx2/otx2_ethdev.c
View File

@ -70,6 +70,8 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, uint32_t nb_txq)
req->rx_cfg |= BIT_ULL(36 /* CSUM_IL4 */);
}
req->rx_cfg |= BIT_ULL(32 /* DROP_RE */);
if (dev->rss_tag_as_xor == 0)
req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER;
rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
if (rc)

1
drivers/net/octeontx2/otx2_ethdev.h
View File

@ -285,6 +285,7 @@ struct otx2_eth_dev {
uintptr_t base;
uintptr_t lmt_addr;
uint16_t scalar_ena;
uint16_t rss_tag_as_xor;
uint16_t max_sqb_count;
uint16_t rx_offload_flags; /* Selected Rx offload flags(NIX_RX_*_F) */
uint64_t rx_offloads;

8
drivers/net/octeontx2/otx2_ethdev_devargs.c
View File

@ -109,6 +109,7 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
#define OTX2_FLOW_PREALLOC_SIZE "flow_prealloc_size"
#define OTX2_FLOW_MAX_PRIORITY "flow_max_priority"
#define OTX2_SWITCH_HEADER_TYPE "switch_header"
#define OTX2_RSS_TAG_AS_XOR "tag_as_xor"
int
otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
@ -119,6 +120,7 @@ otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
uint16_t switch_header_type = 0;
uint16_t flow_max_priority = 3;
uint16_t scalar_enable = 0;
uint16_t rss_tag_as_xor = 0;
struct rte_kvargs *kvlist;
if (devargs == NULL)
@ -140,10 +142,13 @@ otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
&parse_flow_max_priority, &flow_max_priority);
rte_kvargs_process(kvlist, OTX2_SWITCH_HEADER_TYPE,
&parse_switch_header_type, &switch_header_type);
rte_kvargs_process(kvlist, OTX2_RSS_TAG_AS_XOR,
&parse_flag, &rss_tag_as_xor);
rte_kvargs_free(kvlist);
null_devargs:
dev->scalar_ena = scalar_enable;
dev->rss_tag_as_xor = rss_tag_as_xor;
dev->max_sqb_count = sqb_count;
dev->rss_info.rss_size = rss_size;
dev->npc_flow.flow_prealloc_size = flow_prealloc_size;
@ -161,4 +166,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_octeontx2,
OTX2_MAX_SQB_COUNT "=<8-512>"
OTX2_FLOW_PREALLOC_SIZE "=<1-32>"
OTX2_FLOW_MAX_PRIORITY "=<1-32>"
OTX2_SWITCH_HEADER_TYPE "=<higig2|dsa>");
OTX2_SWITCH_HEADER_TYPE "=<higig2|dsa>"
OTX2_RSS_TAG_AS_XOR "=1");