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add missing static keyword to globals

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Some global variables can indeed be static, add static keyword to them.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
This commit is contained in:
Ferruh Yigit 2018-10-28 23:57:38 +00:00 committed by Thomas Monjalon
parent 3f2ef27972
commit b74fd6b842
42 changed files with 55 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
app/pdump/main.c
View File

@ -81,7 +81,7 @@ enum pdump_by {
DEVICE_ID = 2
};
const char *valid_pdump_arguments[] = {
static const char * const valid_pdump_arguments[] = {
PDUMP_PORT_ARG,
PDUMP_PCI_ARG,
PDUMP_QUEUE_ARG,
@ -136,9 +136,9 @@ struct parse_val {
uint64_t val;
};
int num_tuples;
static int num_tuples;
static struct rte_eth_conf port_conf_default;
volatile uint8_t quit_signal;
static volatile uint8_t quit_signal;
/**< display usage */
static void

2
drivers/bus/dpaa/base/fman/netcfg_layer.c
View File

@ -21,7 +21,7 @@
/* This data structure contaings all configurations information
* related to usages of DPA devices.
*/
struct netcfg_info *netcfg;
static struct netcfg_info *netcfg;
/* fd to open a socket for making ioctl request to disable/enable shared
* interfaces.
*/

4
drivers/bus/dpaa/dpaa_bus.c
View File

@ -47,7 +47,7 @@ int dpaa_logtype_mempool;
int dpaa_logtype_pmd;
int dpaa_logtype_eventdev;
struct rte_dpaa_bus rte_dpaa_bus;
static struct rte_dpaa_bus rte_dpaa_bus;
struct netcfg_info *dpaa_netcfg;
/* define a variable to hold the portal_key, once created.*/
@ -624,7 +624,7 @@ rte_dpaa_get_iommu_class(void)
return RTE_IOVA_PA;
}
struct rte_dpaa_bus rte_dpaa_bus = {
static struct rte_dpaa_bus rte_dpaa_bus = {
.bus = {
.scan = rte_dpaa_bus_scan,
.probe = rte_dpaa_bus_probe,

2
drivers/bus/vdev/vdev.c
View File

@ -41,7 +41,7 @@ static struct vdev_device_list vdev_device_list =
static rte_spinlock_recursive_t vdev_device_list_lock =
RTE_SPINLOCK_RECURSIVE_INITIALIZER;
struct vdev_driver_list vdev_driver_list =
static struct vdev_driver_list vdev_driver_list =
TAILQ_HEAD_INITIALIZER(vdev_driver_list);
struct vdev_custom_scan {

2
drivers/compress/octeontx/otx_zip_pmd.c
View File

@ -533,7 +533,7 @@ zip_pmd_dequeue_burst_sync(void *queue_pair,
return nb_dequeued;
}
struct rte_compressdev_ops octtx_zip_pmd_ops = {
static struct rte_compressdev_ops octtx_zip_pmd_ops = {
.dev_configure = zip_pmd_config,
.dev_start = zip_pmd_start,
.dev_stop = zip_pmd_stop,

2
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
View File

@ -3267,7 +3267,7 @@ dpaa2_sec_capabilities_get(void *device __rte_unused)
return dpaa2_sec_security_cap;
}
struct rte_security_ops dpaa2_sec_security_ops = {
static const struct rte_security_ops dpaa2_sec_security_ops = {
.session_create = dpaa2_sec_security_session_create,
.session_update = NULL,
.session_stats_get = NULL,

2
drivers/crypto/dpaa_sec/dpaa_sec.c
View File

@ -2270,7 +2270,7 @@ dpaa_sec_capabilities_get(void *device __rte_unused)
return dpaa_sec_security_cap;
}
struct rte_security_ops dpaa_sec_security_ops = {
static const struct rte_security_ops dpaa_sec_security_ops = {
.session_create = dpaa_sec_security_session_create,
.session_update = NULL,
.session_stats_get = NULL,

2
drivers/crypto/null/null_crypto_pmd_ops.c
View File

@ -308,7 +308,7 @@ null_crypto_pmd_sym_session_clear(struct rte_cryptodev *dev,
}
}
struct rte_cryptodev_ops pmd_ops = {
static struct rte_cryptodev_ops pmd_ops = {
.dev_configure = null_crypto_pmd_config,
.dev_start = null_crypto_pmd_start,
.dev_stop = null_crypto_pmd_stop,

4
drivers/crypto/scheduler/scheduler_failover.c
View File

@ -197,7 +197,7 @@ scheduler_create_private_ctx(__rte_unused struct rte_cryptodev *dev)
return 0;
}
struct rte_cryptodev_scheduler_ops scheduler_fo_ops = {
static struct rte_cryptodev_scheduler_ops scheduler_fo_ops = {
slave_attach,
slave_detach,
scheduler_start,
@ -208,7 +208,7 @@ struct rte_cryptodev_scheduler_ops scheduler_fo_ops = {
NULL /*option_get */
};
struct rte_cryptodev_scheduler fo_scheduler = {
static struct rte_cryptodev_scheduler fo_scheduler = {
.name = "failover-scheduler",
.description = "scheduler which enqueues to the primary slave, "
"and only then enqueues to the secondary slave "

4
drivers/crypto/scheduler/scheduler_multicore.c
View File

@ -392,7 +392,7 @@ scheduler_create_private_ctx(struct rte_cryptodev *dev)
return -1;
}
struct rte_cryptodev_scheduler_ops scheduler_mc_ops = {
static struct rte_cryptodev_scheduler_ops scheduler_mc_ops = {
slave_attach,
slave_detach,
scheduler_start,
@ -403,7 +403,7 @@ struct rte_cryptodev_scheduler_ops scheduler_mc_ops = {
NULL /* option_get */
};
struct rte_cryptodev_scheduler mc_scheduler = {
static struct rte_cryptodev_scheduler mc_scheduler = {
.name = "multicore-scheduler",
.description = "scheduler which will run burst across multiple cpu cores",
.mode = CDEV_SCHED_MODE_MULTICORE,

4
drivers/crypto/scheduler/scheduler_pkt_size_distr.c
View File

@ -398,7 +398,7 @@ scheduler_option_get(struct rte_cryptodev *dev, uint32_t option_type,
return 0;
}
struct rte_cryptodev_scheduler_ops scheduler_ps_ops = {
static struct rte_cryptodev_scheduler_ops scheduler_ps_ops = {
slave_attach,
slave_detach,
scheduler_start,
@ -409,7 +409,7 @@ struct rte_cryptodev_scheduler_ops scheduler_ps_ops = {
scheduler_option_get
};
struct rte_cryptodev_scheduler psd_scheduler = {
static struct rte_cryptodev_scheduler psd_scheduler = {
.name = "packet-size-based-scheduler",
.description = "scheduler which will distribute crypto op "
"burst based on the packet size",

2
drivers/crypto/scheduler/scheduler_pmd.c
View File

@ -38,7 +38,7 @@ struct scheduler_init_params {
#define RTE_CRYPTODEV_VDEV_COREMASK ("coremask")
#define RTE_CRYPTODEV_VDEV_CORELIST ("corelist")
const char *scheduler_valid_params[] = {
static const char * const scheduler_valid_params[] = {
RTE_CRYPTODEV_VDEV_NAME,
RTE_CRYPTODEV_VDEV_SLAVE,
RTE_CRYPTODEV_VDEV_MODE,

2
drivers/crypto/scheduler/scheduler_pmd_ops.c
View File

@ -522,7 +522,7 @@ scheduler_pmd_sym_session_clear(struct rte_cryptodev *dev,
}
}
struct rte_cryptodev_ops scheduler_pmd_ops = {
static struct rte_cryptodev_ops scheduler_pmd_ops = {
.dev_configure = scheduler_pmd_config,
.dev_start = scheduler_pmd_start,
.dev_stop = scheduler_pmd_stop,

4
drivers/crypto/scheduler/scheduler_roundrobin.c
View File

@ -190,7 +190,7 @@ scheduler_create_private_ctx(__rte_unused struct rte_cryptodev *dev)
return 0;
}
struct rte_cryptodev_scheduler_ops scheduler_rr_ops = {
static struct rte_cryptodev_scheduler_ops scheduler_rr_ops = {
slave_attach,
slave_detach,
scheduler_start,
@ -201,7 +201,7 @@ struct rte_cryptodev_scheduler_ops scheduler_rr_ops = {
NULL /* option_get */
};
struct rte_cryptodev_scheduler scheduler = {
static struct rte_cryptodev_scheduler scheduler = {
.name = "roundrobin-scheduler",
.description = "scheduler which will round robin burst across "
"slave crypto devices",

2
drivers/mempool/dpaa/dpaa_mempool.c
View File

@ -328,7 +328,7 @@ dpaa_populate(struct rte_mempool *mp, unsigned int max_objs,
obj_cb, obj_cb_arg);
}
struct rte_mempool_ops dpaa_mpool_ops = {
static const struct rte_mempool_ops dpaa_mpool_ops = {
.name = DPAA_MEMPOOL_OPS_NAME,
.alloc = dpaa_mbuf_create_pool,
.free = dpaa_mbuf_free_pool,

2
drivers/mempool/dpaa2/dpaa2_hw_mempool.c
View File

@ -402,7 +402,7 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
obj_cb, obj_cb_arg);
}
struct rte_mempool_ops dpaa2_mpool_ops = {
static const struct rte_mempool_ops dpaa2_mpool_ops = {
.name = DPAA2_MEMPOOL_OPS_NAME,
.alloc = rte_hw_mbuf_create_pool,
.free = rte_hw_mbuf_free_pool,

2
drivers/net/cxgbe/cxgbe_flow.c
View File

@ -667,7 +667,7 @@ cxgbe_rtef_parse_actions(struct rte_flow *flow,
return 0;
}
struct chrte_fparse parseitem[] = {
static struct chrte_fparse parseitem[] = {
[RTE_FLOW_ITEM_TYPE_ETH] = {
.fptr = ch_rte_parsetype_eth,
.dmask = &(const struct rte_flow_item_eth){

2
drivers/net/failsafe/failsafe_args.c
View File

@ -25,7 +25,7 @@ typedef int (parse_cb)(struct rte_eth_dev *dev, const char *params,
uint64_t hotplug_poll = FAILSAFE_HOTPLUG_DEFAULT_TIMEOUT_MS;
int mac_from_arg = 0;
const char *pmd_failsafe_init_parameters[] = {
static const char * const pmd_failsafe_init_parameters[] = {
PMD_FAILSAFE_HOTPLUG_POLL_KVARG,
PMD_FAILSAFE_MAC_KVARG,
NULL,

6
drivers/net/fm10k/fm10k_ethdev.c
View File

@ -72,7 +72,7 @@ struct fm10k_xstats_name_off {
unsigned offset;
};
struct fm10k_xstats_name_off fm10k_hw_stats_strings[] = {
static const struct fm10k_xstats_name_off fm10k_hw_stats_strings[] = {
{"completion_timeout_count", offsetof(struct fm10k_hw_stats, timeout)},
{"unsupported_requests_count", offsetof(struct fm10k_hw_stats, ur)},
{"completer_abort_count", offsetof(struct fm10k_hw_stats, ca)},
@ -87,7 +87,7 @@ struct fm10k_xstats_name_off fm10k_hw_stats_strings[] = {
#define FM10K_NB_HW_XSTATS (sizeof(fm10k_hw_stats_strings) / \
sizeof(fm10k_hw_stats_strings[0]))
struct fm10k_xstats_name_off fm10k_hw_stats_rx_q_strings[] = {
static const struct fm10k_xstats_name_off fm10k_hw_stats_rx_q_strings[] = {
{"packets", offsetof(struct fm10k_hw_stats_q, rx_packets)},
{"bytes", offsetof(struct fm10k_hw_stats_q, rx_bytes)},
{"dropped", offsetof(struct fm10k_hw_stats_q, rx_drops)},
@ -96,7 +96,7 @@ struct fm10k_xstats_name_off fm10k_hw_stats_rx_q_strings[] = {
#define FM10K_NB_RX_Q_XSTATS (sizeof(fm10k_hw_stats_rx_q_strings) / \
sizeof(fm10k_hw_stats_rx_q_strings[0]))
struct fm10k_xstats_name_off fm10k_hw_stats_tx_q_strings[] = {
static const struct fm10k_xstats_name_off fm10k_hw_stats_tx_q_strings[] = {
{"packets", offsetof(struct fm10k_hw_stats_q, tx_packets)},
{"bytes", offsetof(struct fm10k_hw_stats_q, tx_bytes)},
};

2
drivers/net/i40e/base/i40e_diag.c
View File

@ -55,7 +55,7 @@ static enum i40e_status_code i40e_diag_reg_pattern_test(struct i40e_hw *hw,
return I40E_SUCCESS;
}
struct i40e_diag_reg_test_info i40e_reg_list[] = {
static struct i40e_diag_reg_test_info i40e_reg_list[] = {
/* offset mask elements stride */
{I40E_QTX_CTL(0), 0x0000FFBF, 1, I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
{I40E_PFINT_ITR0(0), 0x00000FFF, 3, I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},

2
drivers/net/i40e/base/i40e_diag.h
View File

@ -21,8 +21,6 @@ struct i40e_diag_reg_test_info {
u32 stride; /* bytes between each element */
};
extern struct i40e_diag_reg_test_info i40e_reg_list[];
enum i40e_status_code i40e_diag_set_loopback(struct i40e_hw *hw,
enum i40e_lb_mode mode);
enum i40e_status_code i40e_diag_fw_alive_test(struct i40e_hw *hw);

4
drivers/net/i40e/i40e_flow.c
View File

@ -133,8 +133,8 @@ const struct rte_flow_ops i40e_flow_ops = {
.flush = i40e_flow_flush,
};
union i40e_filter_t cons_filter;
enum rte_filter_type cons_filter_type = RTE_ETH_FILTER_NONE;
static union i40e_filter_t cons_filter;
static enum rte_filter_type cons_filter_type = RTE_ETH_FILTER_NONE;
/* Pattern matched ethertype filter */
static enum rte_flow_item_type pattern_ethertype[] = {

2
drivers/net/i40e/i40e_vf_representor.c
View File

@ -420,7 +420,7 @@ i40e_vf_representor_vlan_pvid_set(struct rte_eth_dev *ethdev, uint16_t vlan_id,
representor->vf_id, vlan_id);
}
struct eth_dev_ops i40e_representor_dev_ops = {
static const struct eth_dev_ops i40e_representor_dev_ops = {
.dev_infos_get = i40e_vf_representor_dev_infos_get,
.dev_start = i40e_vf_representor_dev_start,

2
drivers/net/ifc/ifcvf_vdpa.c
View File

@ -718,7 +718,7 @@ ifcvf_get_protocol_features(int did __rte_unused, uint64_t *features)
return 0;
}
struct rte_vdpa_dev_ops ifcvf_ops = {
static struct rte_vdpa_dev_ops ifcvf_ops = {
.get_queue_num = ifcvf_get_queue_num,
.get_features = ifcvf_get_vdpa_features,
.get_protocol_features = ifcvf_get_protocol_features,

2
drivers/net/ixgbe/ixgbe_vf_representor.c
View File

@ -135,7 +135,7 @@ ixgbe_vf_representor_vlan_strip_queue_set(struct rte_eth_dev *ethdev,
representor->vf_id, on);
}
struct eth_dev_ops ixgbe_vf_representor_dev_ops = {
static const struct eth_dev_ops ixgbe_vf_representor_dev_ops = {
.dev_infos_get = ixgbe_vf_representor_dev_infos_get,
.dev_start = ixgbe_vf_representor_dev_start,

2
drivers/net/qede/base/bcm_osal.c
View File

@ -17,7 +17,7 @@
/* Array of memzone pointers */
static const struct rte_memzone *ecore_mz_mapping[RTE_MAX_MEMZONE];
/* Counter to track current memzone allocated */
uint16_t ecore_mz_count;
static uint16_t ecore_mz_count;
unsigned long qede_log2_align(unsigned long n)
{

2
drivers/net/qede/qede_ethdev.c
View File

@ -1089,7 +1089,7 @@ static void qede_dev_stop(struct rte_eth_dev *eth_dev)
DP_INFO(edev, "Device is stopped\n");
}
const char *valid_args[] = {
static const char * const valid_args[] = {
QEDE_NPAR_TX_SWITCHING,
QEDE_VF_TX_SWITCHING,
NULL,

2
drivers/net/qede/qede_main.c
View File

@ -17,7 +17,7 @@
/* Global variable to hold absolute path of fw file */
char fw_file[PATH_MAX];
const char *QEDE_DEFAULT_FIRMWARE =
static const char * const QEDE_DEFAULT_FIRMWARE =
"/lib/firmware/qed/qed_init_values-8.37.7.0.bin";
static void

2
drivers/net/sfc/sfc_rx.c
View File

@ -1126,7 +1126,7 @@ sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
/*
* Mapping between RTE RSS hash functions and their EFX counterparts.
*/
struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
static const struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
{ ETH_RSS_NONFRAG_IPV4_TCP,
EFX_RX_HASH(IPV4_TCP, 4TUPLE) },
{ ETH_RSS_NONFRAG_IPV4_UDP,

4
drivers/net/softnic/rte_eth_softnic.c
View File

@ -28,7 +28,7 @@
#define PMD_PARAM_TM_QSIZE2 "tm_qsize2"
#define PMD_PARAM_TM_QSIZE3 "tm_qsize3"
static const char *pmd_valid_args[] = {
static const char * const pmd_valid_args[] = {
PMD_PARAM_FIRMWARE,
PMD_PARAM_CONN_PORT,
PMD_PARAM_CPU_ID,
@ -47,7 +47,7 @@ static const char welcome[] =
static const char prompt[] = "softnic> ";
struct softnic_conn_params conn_params_default = {
static const struct softnic_conn_params conn_params_default = {
.welcome = welcome,
.prompt = prompt,
.addr = "0.0.0.0",

4
drivers/net/tap/tap_bpf_insns.h
View File

@ -5,7 +5,7 @@
#include <tap_bpf.h>
/* bpf_insn array matching cls_q section. See tap_bpf_program.c file */
struct bpf_insn cls_q_insns[] = {
static struct bpf_insn cls_q_insns[] = {
{0x61, 2, 1, 52, 0x00000000},
{0x18, 3, 0, 0, 0xdeadbeef},
{0x00, 0, 0, 0, 0x00000000},
@ -24,7 +24,7 @@ struct bpf_insn cls_q_insns[] = {
};
/* bpf_insn array matching l3_l4 section. see tap_bpf_program.c file */
struct bpf_insn l3_l4_hash_insns[] = {
static struct bpf_insn l3_l4_hash_insns[] = {
{0xbf, 7, 1, 0, 0x00000000},
{0x61, 8, 7, 16, 0x00000000},
{0x61, 6, 7, 76, 0x00000000},

2
drivers/net/tap/tap_flow.c
View File

@ -1811,7 +1811,7 @@ tap_flow_implicit_flush(struct pmd_internals *pmd, struct rte_flow_error *error)
#define KEY_IDX_OFFSET (3 * MAX_RSS_KEYS)
#define SEC_NAME_CLS_Q "cls_q"
const char *sec_name[SEC_MAX] = {
static const char *sec_name[SEC_MAX] = {
[SEC_L3_L4] = "l3_l4",
};

4
drivers/raw/dpaa2_qdma/dpaa2_qdma.c
View File

@ -34,10 +34,10 @@ static struct qdma_hw_queue_list qdma_queue_list
= TAILQ_HEAD_INITIALIZER(qdma_queue_list);
/* QDMA Virtual Queues */
struct qdma_virt_queue *qdma_vqs;
static struct qdma_virt_queue *qdma_vqs;
/* QDMA per core data */
struct qdma_per_core_info qdma_core_info[RTE_MAX_LCORE];
static struct qdma_per_core_info qdma_core_info[RTE_MAX_LCORE];
static struct qdma_hw_queue *
alloc_hw_queue(uint32_t lcore_id)

2
drivers/raw/skeleton_rawdev/skeleton_rawdev.c
View File

@ -32,7 +32,7 @@
int skeleton_pmd_logtype;
/* Count of instances */
uint16_t skeldev_init_once;
static uint16_t skeldev_init_once;
/**< Rawdev Skeleton dummy driver name */
#define SKELETON_PMD_RAWDEV_NAME rawdev_skeleton

2
lib/librte_eal/common/eal_common_bus.c
View File

@ -41,7 +41,7 @@
#include "eal_private.h"
struct rte_bus_list rte_bus_list =
static struct rte_bus_list rte_bus_list =
TAILQ_HEAD_INITIALIZER(rte_bus_list);
void

2
lib/librte_eal/common/eal_common_class.c
View File

@ -9,7 +9,7 @@
#include <rte_class.h>
#include <rte_debug.h>
struct rte_class_list rte_class_list =
static struct rte_class_list rte_class_list =
TAILQ_HEAD_INITIALIZER(rte_class_list);
__rte_experimental void

2
lib/librte_eal/common/eal_common_devargs.c
View File

@ -25,7 +25,7 @@
TAILQ_HEAD(rte_devargs_list, rte_devargs);
/** Global list of user devices */
struct rte_devargs_list devargs_list =
static struct rte_devargs_list devargs_list =
TAILQ_HEAD_INITIALIZER(devargs_list);
static size_t

2
lib/librte_eal/linuxapp/eal/eal_memalloc.c
View File

@ -61,7 +61,7 @@ const int anonymous_hugepages_supported =
* and/or memfd with hugetlbfs, so we need to be able to adjust this flag at
* runtime, and fall back to anonymous memory.
*/
int memfd_create_supported =
static int memfd_create_supported =
#ifdef MFD_HUGETLB
#define MEMFD_SUPPORTED
1;

2
lib/librte_ethdev/rte_class_eth.c
View File

@ -166,7 +166,7 @@ eth_dev_iterate(const void *start,
return edev;
}
struct rte_class rte_class_eth = {
static struct rte_class rte_class_eth = {
.dev_iterate = eth_dev_iterate,
};

2
lib/librte_ethdev/rte_ethdev.c
View File

@ -4311,7 +4311,7 @@ enum rte_eth_switch_domain_state {
* RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
* ethdev ports in a single process.
*/
struct rte_eth_dev_switch {
static struct rte_eth_dev_switch {
enum rte_eth_switch_domain_state state;
} rte_eth_switch_domains[RTE_MAX_ETHPORTS];

2
lib/librte_eventdev/rte_eventdev.c
View File

@ -35,7 +35,7 @@
#include "rte_eventdev.h"
#include "rte_eventdev_pmd.h"
struct rte_eventdev rte_event_devices[RTE_EVENT_MAX_DEVS];
static struct rte_eventdev rte_event_devices[RTE_EVENT_MAX_DEVS];
struct rte_eventdev *rte_eventdevs = &rte_event_devices[0];

4
lib/librte_net/net_crc_sse.h
View File

@ -21,8 +21,8 @@ struct crc_pclmulqdq_ctx {
__m128i rk7_rk8;
};
struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
/**
* @brief Performs one folding round
*