d/numam-dpdk
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

net/mlx5: create global default miss action

Browse Source 
This commit creates the global default miss action instead of maintain
it in flow insertion time. This makes the action to be thread safe.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
This commit is contained in:
Suanming Mou 2020-10-28 17:33:29 +08:00 committed by Ferruh Yigit
parent 145b04d8dc
commit b80726dc51
3 changed files with 13 additions and 93 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/net/mlx5/linux/mlx5_os.c
View File

@ -305,6 +305,10 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
}
sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
#endif /* HAVE_MLX5DV_DR */
sh->default_miss_action =
mlx5_glue->dr_create_flow_action_default_miss();
if (!sh->default_miss_action)
DRV_LOG(WARNING, "Default miss action is not supported.");
return 0;
error:
/* Rollback the created objects. */
@ -388,6 +392,9 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)
}
pthread_mutex_destroy(&sh->dv_mutex);
#endif /* HAVE_MLX5DV_DR */
if (sh->default_miss_action)
mlx5_glue->destroy_flow_action
(sh->default_miss_action);
if (sh->encaps_decaps) {
mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
sh->encaps_decaps = NULL;

9
drivers/net/mlx5/mlx5.h
View File

@ -461,12 +461,6 @@ struct mlx5_flow_counter_mng {
LIST_HEAD(stat_raws, mlx5_counter_stats_raw) free_stat_raws;
};
/* Default miss action resource structure. */
struct mlx5_flow_default_miss_resource {
void *action; /* Pointer to the rdma-core action. */
uint32_t refcnt; /* Default miss action reference counter. */
};
#define MLX5_AGE_EVENT_NEW 1
#define MLX5_AGE_TRIGGER 2
#define MLX5_AGE_SET(age_info, BIT) \
@ -660,8 +654,7 @@ struct mlx5_dev_ctx_shared {
uint32_t sample_action_list; /* List of sample actions. */
uint32_t dest_array_list; /* List of destination array actions. */
struct mlx5_flow_counter_mng cmng; /* Counters management structure. */
struct mlx5_flow_default_miss_resource default_miss;
/* Default miss action resource structure. */
void *default_miss_action; /* Default miss action. */
struct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX];
/* Memory Pool for mlx5 flow resources. */
struct mlx5_l3t_tbl *cnt_id_tbl; /* Shared counter lookup table. */

90
drivers/net/mlx5/mlx5_flow_dv.c
View File

@ -74,9 +74,6 @@ static int
flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
struct mlx5_flow_tbl_resource *tbl);
static int
flow_dv_default_miss_resource_release(struct rte_eth_dev *dev);
static int
flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
uint32_t encap_decap_idx);
@ -2951,42 +2948,6 @@ flow_dv_jump_tbl_resource_register
return 0;
}
/**
* Find existing default miss resource or create and register a new one.
*
* @param[in, out] dev
* Pointer to rte_eth_dev structure.
* @param[out] error
* pointer to error structure.
*
* @return
* 0 on success otherwise -errno and errno is set.
*/
static int
flow_dv_default_miss_resource_register(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_dev_ctx_shared *sh = priv->sh;
struct mlx5_flow_default_miss_resource *cache_resource =
&sh->default_miss;
int cnt = __atomic_load_n(&cache_resource->refcnt, __ATOMIC_ACQUIRE);
if (!cnt) {
MLX5_ASSERT(cache_resource->action);
cache_resource->action =
mlx5_glue->dr_create_flow_action_default_miss();
if (!cache_resource->action)
return rte_flow_error_set(error, ENOMEM,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"cannot create default miss action");
DRV_LOG(DEBUG, "new default miss resource %p: refcnt %d++",
(void *)cache_resource->action, cnt);
}
__atomic_fetch_add(&cache_resource->refcnt, 1, __ATOMIC_RELEASE);
return 0;
}
/**
* Find existing table port ID resource or create and register a new one.
*
@ -10393,16 +10354,14 @@ __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
dh->rix_hrxq = hrxq_idx;
dv->actions[n++] = hrxq->action;
} else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
if (flow_dv_default_miss_resource_register
(dev, error)) {
if (!priv->sh->default_miss_action) {
rte_flow_error_set
(error, rte_errno,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"cannot create default miss resource");
goto error_default_miss;
"default miss action not be created.");
goto error;
}
dh->rix_default_fate = MLX5_FLOW_FATE_DEFAULT_MISS;
dv->actions[n++] = priv->sh->default_miss.action;
dv->actions[n++] = priv->sh->default_miss_action;
}
err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
(void *)&dv->value, n,
@ -10427,9 +10386,6 @@ __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
}
return 0;
error:
if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS)
flow_dv_default_miss_resource_release(dev);
error_default_miss:
err = rte_errno; /* Save rte_errno before cleanup. */
SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
handle_idx, dh, next) {
@ -10551,38 +10507,6 @@ flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
return flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
}
/**
* Release a default miss resource.
*
* @param dev
* Pointer to Ethernet device.
* @return
* 1 while a reference on it exists, 0 when freed.
*/
static int
flow_dv_default_miss_resource_release(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_dev_ctx_shared *sh = priv->sh;
struct mlx5_flow_default_miss_resource *cache_resource =
&sh->default_miss;
MLX5_ASSERT(cache_resource->action);
DRV_LOG(DEBUG, "default miss resource %p: refcnt %d--",
(void *)cache_resource->action,
__atomic_load_n(&cache_resource->refcnt,
__ATOMIC_RELAXED));
if (__atomic_sub_fetch(&cache_resource->refcnt, 1,
__ATOMIC_RELAXED) == 0) {
claim_zero(mlx5_glue->destroy_flow_action
(cache_resource->action));
DRV_LOG(DEBUG, "default miss resource %p: removed",
(void *)cache_resource->action);
return 0;
}
return 1;
}
/**
* Release a modify-header resource.
*
@ -10732,9 +10656,6 @@ flow_dv_fate_resource_release(struct rte_eth_dev *dev,
flow_dv_port_id_action_resource_release(dev,
handle->rix_port_id_action);
break;
case MLX5_FLOW_FATE_DEFAULT_MISS:
flow_dv_default_miss_resource_release(dev);
break;
default:
DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
break;
@ -10905,8 +10826,7 @@ __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
dh->drv_flow = NULL;
}
if (dh->fate_action == MLX5_FLOW_FATE_DROP ||
dh->fate_action == MLX5_FLOW_FATE_QUEUE ||
dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS)
dh->fate_action == MLX5_FLOW_FATE_QUEUE)
flow_dv_fate_resource_release(dev, dh);
if (dh->vf_vlan.tag && dh->vf_vlan.created)
mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);