net/ngbe: support link update
Register to handle device interrupt. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
This commit is contained in:
Jiawen Wu
Andrew Rybchenko
parent
539d55dab6
commit
b9246b8fa2
@ -4,6 +4,9 @@
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; Refer to default.ini for the full list of available PMD features.
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;
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[Features]
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Speed capabilities = Y
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Link status = Y
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Link status event = Y
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Multiprocess aware = Y
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Linux = Y
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ARMv8 = Y
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@ -8,6 +8,12 @@ The NGBE PMD (librte_pmd_ngbe) provides poll mode driver support
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for Wangxun 1 Gigabit Ethernet NICs.
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Features
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--------
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- Link state information
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Prerequisites
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-------------
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@ -64,6 +64,11 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,
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u32 TUP1)
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{
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}
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static inline s32 ngbe_mac_check_link_dummy(struct ngbe_hw *TUP0, u32 *TUP1,
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bool *TUP3, bool TUP4)
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{
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return NGBE_ERR_OPS_DUMMY;
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}
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static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1,
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u8 *TUP2, u32 TUP3, u32 TUP4)
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{
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@ -135,6 +140,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
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hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
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hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
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hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
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hw->mac.check_link = ngbe_mac_check_link_dummy;
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hw->mac.set_rar = ngbe_mac_set_rar_dummy;
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hw->mac.clear_rar = ngbe_mac_clear_rar_dummy;
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hw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy;
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@ -97,6 +97,8 @@ struct ngbe_mac_info {
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s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
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void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
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s32 (*check_link)(struct ngbe_hw *hw, u32 *speed,
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bool *link_up, bool link_up_wait_to_complete);
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/* RAR */
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s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
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u32 enable_addr);
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@ -117,6 +119,7 @@ struct ngbe_mac_info {
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u32 num_rar_entries;
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u32 max_tx_queues;
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u32 max_rx_queues;
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bool get_link_status;
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struct ngbe_thermal_sensor_data thermal_sensor_data;
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bool set_lben;
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};
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@ -142,6 +145,14 @@ struct ngbe_phy_info {
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bool reset_disable;
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};
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enum ngbe_isb_idx {
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NGBE_ISB_HEADER,
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NGBE_ISB_MISC,
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NGBE_ISB_VEC0,
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NGBE_ISB_VEC1,
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NGBE_ISB_MAX
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};
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struct ngbe_hw {
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void IOMEM *hw_addr;
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void *back;
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@ -7,12 +7,17 @@
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#include <rte_common.h>
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#include <ethdev_pci.h>
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#include <rte_alarm.h>
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#include "ngbe_logs.h"
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#include "ngbe.h"
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#include "ngbe_ethdev.h"
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static int ngbe_dev_close(struct rte_eth_dev *dev);
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static void ngbe_dev_interrupt_handler(void *param);
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static void ngbe_dev_interrupt_delayed_handler(void *param);
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/*
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* The set of PCI devices this driver supports
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*/
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@ -32,6 +37,28 @@ static const struct rte_pci_id pci_id_ngbe_map[] = {
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{ .vendor_id = 0, /* sentinel */ },
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};
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static const struct eth_dev_ops ngbe_eth_dev_ops;
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static inline void
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ngbe_enable_intr(struct rte_eth_dev *dev)
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{
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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struct ngbe_hw *hw = ngbe_dev_hw(dev);
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wr32(hw, NGBE_IENMISC, intr->mask_misc);
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wr32(hw, NGBE_IMC(0), intr->mask & BIT_MASK32);
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ngbe_flush(hw);
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}
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static void
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ngbe_disable_intr(struct ngbe_hw *hw)
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{
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PMD_INIT_FUNC_TRACE();
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wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
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ngbe_flush(hw);
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}
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/*
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* Ensure that all locks are released before first NVM or PHY access
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*/
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@ -60,11 +87,15 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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{
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
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struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
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struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
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const struct rte_memzone *mz;
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uint32_t ctrl_ext;
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int err;
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PMD_INIT_FUNC_TRACE();
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eth_dev->dev_ops = &ngbe_eth_dev_ops;
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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@ -115,6 +146,9 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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return -EIO;
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}
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/* disable interrupt */
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ngbe_disable_intr(hw);
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/* Allocate memory for storing MAC addresses */
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eth_dev->data->mac_addrs = rte_zmalloc("ngbe", RTE_ETHER_ADDR_LEN *
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hw->mac.num_rar_entries, 0);
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@ -141,6 +175,23 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
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return -ENOMEM;
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}
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ctrl_ext = rd32(hw, NGBE_PORTCTL);
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/* let hardware know driver is loaded */
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ctrl_ext |= NGBE_PORTCTL_DRVLOAD;
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/* Set PF Reset Done bit so PF/VF Mail Ops can work */
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ctrl_ext |= NGBE_PORTCTL_RSTDONE;
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wr32(hw, NGBE_PORTCTL, ctrl_ext);
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ngbe_flush(hw);
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rte_intr_callback_register(intr_handle,
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ngbe_dev_interrupt_handler, eth_dev);
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/* enable uio/vfio intr/eventfd mapping */
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rte_intr_enable(intr_handle);
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/* enable support intr */
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ngbe_enable_intr(eth_dev);
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return 0;
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}
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@ -180,11 +231,25 @@ static int eth_ngbe_pci_remove(struct rte_pci_device *pci_dev)
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static struct rte_pci_driver rte_ngbe_pmd = {
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.id_table = pci_id_ngbe_map,
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.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
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.drv_flags = RTE_PCI_DRV_NEED_MAPPING |
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RTE_PCI_DRV_INTR_LSC,
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.probe = eth_ngbe_pci_probe,
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.remove = eth_ngbe_pci_remove,
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};
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static int
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ngbe_dev_configure(struct rte_eth_dev *dev)
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{
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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PMD_INIT_FUNC_TRACE();
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/* set flag to update link status after init */
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intr->flags |= NGBE_FLAG_NEED_LINK_UPDATE;
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return 0;
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}
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/*
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* Reset and stop device.
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*/
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@ -198,6 +263,304 @@ ngbe_dev_close(struct rte_eth_dev *dev)
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return -EINVAL;
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}
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static int
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ngbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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{
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RTE_SET_USED(dev);
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dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_100M |
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ETH_LINK_SPEED_10M;
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return 0;
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}
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/* return 0 means link status changed, -1 means not changed */
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int
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ngbe_dev_link_update_share(struct rte_eth_dev *dev,
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int wait_to_complete)
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{
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struct ngbe_hw *hw = ngbe_dev_hw(dev);
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struct rte_eth_link link;
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u32 link_speed = NGBE_LINK_SPEED_UNKNOWN;
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u32 lan_speed = 0;
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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bool link_up;
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int err;
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int wait = 1;
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memset(&link, 0, sizeof(link));
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link.link_status = ETH_LINK_DOWN;
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link.link_speed = ETH_SPEED_NUM_NONE;
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link.link_duplex = ETH_LINK_HALF_DUPLEX;
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link.link_autoneg = !(dev->data->dev_conf.link_speeds &
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~ETH_LINK_SPEED_AUTONEG);
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hw->mac.get_link_status = true;
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if (intr->flags & NGBE_FLAG_NEED_LINK_CONFIG)
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return rte_eth_linkstatus_set(dev, &link);
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/* check if it needs to wait to complete, if lsc interrupt is enabled */
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if (wait_to_complete == 0 || dev->data->dev_conf.intr_conf.lsc != 0)
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wait = 0;
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err = hw->mac.check_link(hw, &link_speed, &link_up, wait);
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if (err != 0) {
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link.link_speed = ETH_SPEED_NUM_NONE;
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link.link_duplex = ETH_LINK_FULL_DUPLEX;
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return rte_eth_linkstatus_set(dev, &link);
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}
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if (!link_up)
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return rte_eth_linkstatus_set(dev, &link);
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intr->flags &= ~NGBE_FLAG_NEED_LINK_CONFIG;
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link.link_status = ETH_LINK_UP;
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link.link_duplex = ETH_LINK_FULL_DUPLEX;
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switch (link_speed) {
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default:
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case NGBE_LINK_SPEED_UNKNOWN:
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link.link_speed = ETH_SPEED_NUM_NONE;
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break;
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case NGBE_LINK_SPEED_10M_FULL:
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link.link_speed = ETH_SPEED_NUM_10M;
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lan_speed = 0;
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break;
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case NGBE_LINK_SPEED_100M_FULL:
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link.link_speed = ETH_SPEED_NUM_100M;
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lan_speed = 1;
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break;
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case NGBE_LINK_SPEED_1GB_FULL:
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link.link_speed = ETH_SPEED_NUM_1G;
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lan_speed = 2;
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break;
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}
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if (hw->is_pf) {
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wr32m(hw, NGBE_LAN_SPEED, NGBE_LAN_SPEED_MASK, lan_speed);
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if (link_speed & (NGBE_LINK_SPEED_1GB_FULL |
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NGBE_LINK_SPEED_100M_FULL |
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NGBE_LINK_SPEED_10M_FULL)) {
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wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK,
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NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE);
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}
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}
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return rte_eth_linkstatus_set(dev, &link);
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}
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static int
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ngbe_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
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{
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return ngbe_dev_link_update_share(dev, wait_to_complete);
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}
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/*
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* It reads ICR and sets flag for the link_update.
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*
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* @param dev
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* Pointer to struct rte_eth_dev.
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*
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* @return
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* - On success, zero.
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* - On failure, a negative value.
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*/
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static int
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ngbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
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{
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uint32_t eicr;
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struct ngbe_hw *hw = ngbe_dev_hw(dev);
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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/* clear all cause mask */
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ngbe_disable_intr(hw);
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/* read-on-clear nic registers here */
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eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC];
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PMD_DRV_LOG(DEBUG, "eicr %x", eicr);
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intr->flags = 0;
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/* set flag for async link update */
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if (eicr & NGBE_ICRMISC_PHY)
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intr->flags |= NGBE_FLAG_NEED_LINK_UPDATE;
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if (eicr & NGBE_ICRMISC_VFMBX)
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intr->flags |= NGBE_FLAG_MAILBOX;
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if (eicr & NGBE_ICRMISC_LNKSEC)
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intr->flags |= NGBE_FLAG_MACSEC;
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if (eicr & NGBE_ICRMISC_GPIO)
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intr->flags |= NGBE_FLAG_NEED_LINK_UPDATE;
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return 0;
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}
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/**
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* It gets and then prints the link status.
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*
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* @param dev
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* Pointer to struct rte_eth_dev.
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*
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* @return
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* - On success, zero.
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* - On failure, a negative value.
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*/
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static void
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ngbe_dev_link_status_print(struct rte_eth_dev *dev)
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{
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
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struct rte_eth_link link;
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rte_eth_linkstatus_get(dev, &link);
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if (link.link_status == ETH_LINK_UP) {
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PMD_INIT_LOG(INFO, "Port %d: Link Up - speed %u Mbps - %s",
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(int)(dev->data->port_id),
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(unsigned int)link.link_speed,
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link.link_duplex == ETH_LINK_FULL_DUPLEX ?
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"full-duplex" : "half-duplex");
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} else {
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PMD_INIT_LOG(INFO, " Port %d: Link Down",
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(int)(dev->data->port_id));
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}
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PMD_INIT_LOG(DEBUG, "PCI Address: " PCI_PRI_FMT,
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pci_dev->addr.domain,
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pci_dev->addr.bus,
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pci_dev->addr.devid,
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pci_dev->addr.function);
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}
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/*
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* It executes link_update after knowing an interrupt occurred.
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*
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* @param dev
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* Pointer to struct rte_eth_dev.
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*
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* @return
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* - On success, zero.
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* - On failure, a negative value.
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*/
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static int
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ngbe_dev_interrupt_action(struct rte_eth_dev *dev)
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{
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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int64_t timeout;
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PMD_DRV_LOG(DEBUG, "intr action type %d", intr->flags);
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if (intr->flags & NGBE_FLAG_NEED_LINK_UPDATE) {
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struct rte_eth_link link;
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/*get the link status before link update, for predicting later*/
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rte_eth_linkstatus_get(dev, &link);
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ngbe_dev_link_update(dev, 0);
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/* likely to up */
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if (link.link_status != ETH_LINK_UP)
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/* handle it 1 sec later, wait it being stable */
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timeout = NGBE_LINK_UP_CHECK_TIMEOUT;
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/* likely to down */
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else
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/* handle it 4 sec later, wait it being stable */
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timeout = NGBE_LINK_DOWN_CHECK_TIMEOUT;
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ngbe_dev_link_status_print(dev);
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if (rte_eal_alarm_set(timeout * 1000,
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ngbe_dev_interrupt_delayed_handler,
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(void *)dev) < 0) {
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PMD_DRV_LOG(ERR, "Error setting alarm");
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} else {
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/* remember original mask */
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intr->mask_misc_orig = intr->mask_misc;
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/* only disable lsc interrupt */
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intr->mask_misc &= ~NGBE_ICRMISC_PHY;
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intr->mask_orig = intr->mask;
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/* only disable all misc interrupts */
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intr->mask &= ~(1ULL << NGBE_MISC_VEC_ID);
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}
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}
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PMD_DRV_LOG(DEBUG, "enable intr immediately");
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ngbe_enable_intr(dev);
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return 0;
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}
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/**
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* Interrupt handler which shall be registered for alarm callback for delayed
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* handling specific interrupt to wait for the stable nic state. As the
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* NIC interrupt state is not stable for ngbe after link is just down,
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* it needs to wait 4 seconds to get the stable status.
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*
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* @param param
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* The address of parameter (struct rte_eth_dev *) registered before.
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*/
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static void
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ngbe_dev_interrupt_delayed_handler(void *param)
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{
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struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
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struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
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struct ngbe_hw *hw = ngbe_dev_hw(dev);
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uint32_t eicr;
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ngbe_disable_intr(hw);
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eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC];
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if (intr->flags & NGBE_FLAG_NEED_LINK_UPDATE) {
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||||
ngbe_dev_link_update(dev, 0);
|
||||
intr->flags &= ~NGBE_FLAG_NEED_LINK_UPDATE;
|
||||
ngbe_dev_link_status_print(dev);
|
||||
rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
|
||||
NULL);
|
||||
}
|
||||
|
||||
if (intr->flags & NGBE_FLAG_MACSEC) {
|
||||
rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_MACSEC,
|
||||
NULL);
|
||||
intr->flags &= ~NGBE_FLAG_MACSEC;
|
||||
}
|
||||
|
||||
/* restore original mask */
|
||||
intr->mask_misc = intr->mask_misc_orig;
|
||||
intr->mask_misc_orig = 0;
|
||||
intr->mask = intr->mask_orig;
|
||||
intr->mask_orig = 0;
|
||||
|
||||
PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
|
||||
ngbe_enable_intr(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* Interrupt handler triggered by NIC for handling
|
||||
* specific interrupt.
|
||||
*
|
||||
* @param param
|
||||
* The address of parameter (struct rte_eth_dev *) registered before.
|
||||
*/
|
||||
static void
|
||||
ngbe_dev_interrupt_handler(void *param)
|
||||
{
|
||||
struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
|
||||
|
||||
ngbe_dev_interrupt_get_status(dev);
|
||||
ngbe_dev_interrupt_action(dev);
|
||||
}
|
||||
|
||||
static const struct eth_dev_ops ngbe_eth_dev_ops = {
|
||||
.dev_configure = ngbe_dev_configure,
|
||||
.dev_infos_get = ngbe_dev_info_get,
|
||||
.link_update = ngbe_dev_link_update,
|
||||
};
|
||||
|
||||
RTE_PMD_REGISTER_PCI(net_ngbe, rte_ngbe_pmd);
|
||||
RTE_PMD_REGISTER_PCI_TABLE(net_ngbe, pci_id_ngbe_map);
|
||||
RTE_PMD_REGISTER_KMOD_DEP(net_ngbe, "* igb_uio | uio_pci_generic | vfio-pci");
|
||||
|
||||
@ -6,11 +6,30 @@
|
||||
#ifndef _NGBE_ETHDEV_H_
|
||||
#define _NGBE_ETHDEV_H_
|
||||
|
||||
/* need update link, bit flag */
|
||||
#define NGBE_FLAG_NEED_LINK_UPDATE ((uint32_t)(1 << 0))
|
||||
#define NGBE_FLAG_MAILBOX ((uint32_t)(1 << 1))
|
||||
#define NGBE_FLAG_PHY_INTERRUPT ((uint32_t)(1 << 2))
|
||||
#define NGBE_FLAG_MACSEC ((uint32_t)(1 << 3))
|
||||
#define NGBE_FLAG_NEED_LINK_CONFIG ((uint32_t)(1 << 4))
|
||||
|
||||
#define NGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
|
||||
|
||||
/* structure for interrupt relative data */
|
||||
struct ngbe_interrupt {
|
||||
uint32_t flags;
|
||||
uint32_t mask_misc;
|
||||
uint32_t mask_misc_orig; /* save mask during delayed handler */
|
||||
uint64_t mask;
|
||||
uint64_t mask_orig; /* save mask during delayed handler */
|
||||
};
|
||||
|
||||
/*
|
||||
* Structure to store private data for each driver instance (for each port).
|
||||
*/
|
||||
struct ngbe_adapter {
|
||||
struct ngbe_hw hw;
|
||||
struct ngbe_interrupt intr;
|
||||
};
|
||||
|
||||
static inline struct ngbe_adapter *
|
||||
@ -30,6 +49,21 @@ ngbe_dev_hw(struct rte_eth_dev *dev)
|
||||
return hw;
|
||||
}
|
||||
|
||||
static inline struct ngbe_interrupt *
|
||||
ngbe_dev_intr(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct ngbe_adapter *ad = ngbe_dev_adapter(dev);
|
||||
struct ngbe_interrupt *intr = &ad->intr;
|
||||
|
||||
return intr;
|
||||
}
|
||||
|
||||
int
|
||||
ngbe_dev_link_update_share(struct rte_eth_dev *dev,
|
||||
int wait_to_complete);
|
||||
|
||||
#define NGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
|
||||
#define NGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */
|
||||
#define NGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
|
||||
|
||||
#endif /* _NGBE_ETHDEV_H_ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user