eal/arm: add CPU flags for ARMv7
This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
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@ -115,6 +115,11 @@ test_cpuflags(void)
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CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
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#endif
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#if defined(RTE_ARCH_ARM)
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printf("Check for NEON:\t\t");
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CHECK_FOR_FLAG(RTE_CPUFLAG_NEON);
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#endif
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#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
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printf("Check for SSE:\t\t");
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CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
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38
lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
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38
lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
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@ -0,0 +1,38 @@
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2015 RehiveTech. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of RehiveTech nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_CPUFLAGS_ARM_H_
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#define _RTE_CPUFLAGS_ARM_H_
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#include <rte_cpuflags_32.h>
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#endif /* _RTE_CPUFLAGS_ARM_H_ */
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177
lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h
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177
lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h
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@ -0,0 +1,177 @@
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2015 RehiveTech. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of RehiveTech nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_CPUFLAGS_ARM32_H_
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#define _RTE_CPUFLAGS_ARM32_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <elf.h>
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#include <fcntl.h>
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#include <assert.h>
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#include <unistd.h>
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#include "generic/rte_cpuflags.h"
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#ifndef AT_HWCAP
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#define AT_HWCAP 16
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#endif
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#ifndef AT_HWCAP2
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#define AT_HWCAP2 26
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#endif
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/* software based registers */
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enum cpu_register_t {
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REG_HWCAP = 0,
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REG_HWCAP2,
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};
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/**
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* Enumeration of all CPU features supported
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*/
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enum rte_cpu_flag_t {
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RTE_CPUFLAG_SWP = 0,
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RTE_CPUFLAG_HALF,
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RTE_CPUFLAG_THUMB,
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RTE_CPUFLAG_A26BIT,
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RTE_CPUFLAG_FAST_MULT,
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RTE_CPUFLAG_FPA,
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RTE_CPUFLAG_VFP,
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RTE_CPUFLAG_EDSP,
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RTE_CPUFLAG_JAVA,
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RTE_CPUFLAG_IWMMXT,
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RTE_CPUFLAG_CRUNCH,
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RTE_CPUFLAG_THUMBEE,
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RTE_CPUFLAG_NEON,
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RTE_CPUFLAG_VFPv3,
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RTE_CPUFLAG_VFPv3D16,
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RTE_CPUFLAG_TLS,
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RTE_CPUFLAG_VFPv4,
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RTE_CPUFLAG_IDIVA,
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RTE_CPUFLAG_IDIVT,
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RTE_CPUFLAG_VFPD32,
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RTE_CPUFLAG_LPAE,
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RTE_CPUFLAG_EVTSTRM,
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RTE_CPUFLAG_AES,
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RTE_CPUFLAG_PMULL,
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RTE_CPUFLAG_SHA1,
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RTE_CPUFLAG_SHA2,
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RTE_CPUFLAG_CRC32,
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/* The last item */
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RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
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};
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static const struct feature_entry cpu_feature_table[] = {
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FEAT_DEF(SWP, 0x00000001, 0, REG_HWCAP, 0)
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FEAT_DEF(HALF, 0x00000001, 0, REG_HWCAP, 1)
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FEAT_DEF(THUMB, 0x00000001, 0, REG_HWCAP, 2)
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FEAT_DEF(A26BIT, 0x00000001, 0, REG_HWCAP, 3)
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FEAT_DEF(FAST_MULT, 0x00000001, 0, REG_HWCAP, 4)
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FEAT_DEF(FPA, 0x00000001, 0, REG_HWCAP, 5)
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FEAT_DEF(VFP, 0x00000001, 0, REG_HWCAP, 6)
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FEAT_DEF(EDSP, 0x00000001, 0, REG_HWCAP, 7)
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FEAT_DEF(JAVA, 0x00000001, 0, REG_HWCAP, 8)
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FEAT_DEF(IWMMXT, 0x00000001, 0, REG_HWCAP, 9)
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FEAT_DEF(CRUNCH, 0x00000001, 0, REG_HWCAP, 10)
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FEAT_DEF(THUMBEE, 0x00000001, 0, REG_HWCAP, 11)
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FEAT_DEF(NEON, 0x00000001, 0, REG_HWCAP, 12)
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FEAT_DEF(VFPv3, 0x00000001, 0, REG_HWCAP, 13)
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FEAT_DEF(VFPv3D16, 0x00000001, 0, REG_HWCAP, 14)
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FEAT_DEF(TLS, 0x00000001, 0, REG_HWCAP, 15)
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FEAT_DEF(VFPv4, 0x00000001, 0, REG_HWCAP, 16)
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FEAT_DEF(IDIVA, 0x00000001, 0, REG_HWCAP, 17)
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FEAT_DEF(IDIVT, 0x00000001, 0, REG_HWCAP, 18)
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FEAT_DEF(VFPD32, 0x00000001, 0, REG_HWCAP, 19)
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FEAT_DEF(LPAE, 0x00000001, 0, REG_HWCAP, 20)
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FEAT_DEF(EVTSTRM, 0x00000001, 0, REG_HWCAP, 21)
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FEAT_DEF(AES, 0x00000001, 0, REG_HWCAP2, 0)
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FEAT_DEF(PMULL, 0x00000001, 0, REG_HWCAP2, 1)
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FEAT_DEF(SHA1, 0x00000001, 0, REG_HWCAP2, 2)
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FEAT_DEF(SHA2, 0x00000001, 0, REG_HWCAP2, 3)
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FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP2, 4)
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};
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/*
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* Read AUXV software register and get cpu features for ARM
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*/
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static inline void
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rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,
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__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)
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{
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int auxv_fd;
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Elf32_auxv_t auxv;
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auxv_fd = open("/proc/self/auxv", O_RDONLY);
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assert(auxv_fd);
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while (read(auxv_fd, &auxv,
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sizeof(Elf32_auxv_t)) == sizeof(Elf32_auxv_t)) {
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if (auxv.a_type == AT_HWCAP)
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out[REG_HWCAP] = auxv.a_un.a_val;
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else if (auxv.a_type == AT_HWCAP2)
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out[REG_HWCAP2] = auxv.a_un.a_val;
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}
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}
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/*
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* Checks if a particular flag is available on current machine.
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*/
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static inline int
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rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
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{
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const struct feature_entry *feat;
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cpuid_registers_t regs = {0};
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if (feature >= RTE_CPUFLAG_NUMFLAGS)
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/* Flag does not match anything in the feature tables */
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return -ENOENT;
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feat = &cpu_feature_table[feature];
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if (!feat->leaf)
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/* This entry in the table wasn't filled out! */
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return -EFAULT;
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/* get the cpuid leaf containing the desired feature */
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rte_cpu_get_features(feat->leaf, feat->subleaf, regs);
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/* check if the feature is enabled */
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return (regs[feat->reg] >> feat->bit) & 1;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_CPUFLAGS_ARM32_H_ */
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@ -106,6 +106,12 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__builtin_vsx_xvnmaddadp),)
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CPUFLAGS += VSX
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endif
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# ARM flags
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ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_NEON_FP),)
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CPUFLAGS += NEON
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endif
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MACHINE_CFLAGS += $(addprefix -DRTE_MACHINE_CPUFLAG_,$(CPUFLAGS))
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# To strip whitespace
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