doc: convert prog guide glossary to definition list
Converted the Glossary table in the Programmer's Guide to a definition list to improve rendering. Signed-off-by: John McNamara <john.mcnamara@intel.com>
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John McNamara
Thomas Monjalon
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bc925f8378
@ -31,169 +31,244 @@
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Glossary
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========
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=============== =========================================================================================================
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Term Definition
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=============== =========================================================================================================
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ACL Access Control List
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API Application Programming Interface
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ACL
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Access Control List
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ASLR Linux* kernel Address-Space Layout Randomization
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API
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Application Programming Interface
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BSD Berkeley Software Distribution
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ASLR
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Linux* kernel Address-Space Layout Randomization
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Clr Clear
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BSD
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Berkeley Software Distribution
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CIDR Classless Inter-Domain Routing
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Clr
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Clear
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Control Plane The control plane is concerned with the routing of packets and with providing a start or end point.
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CIDR
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Classless Inter-Domain Routing
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Core A core may include several lcores or threads if the processor supports hyperthreading.
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Control Plane
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The control plane is concerned with the routing of packets and with
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providing a start or end point.
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Core Components A set of libraries provided by the DPDK, including eal, ring, mempool, mbuf, timers, and so on.
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Core
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A core may include several lcores or threads if the processor supports
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hyperthreading.
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CPU Central Processing Unit
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Core Components
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A set of libraries provided by the DPDK, including eal, ring, mempool,
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mbuf, timers, and so on.
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CRC Cyclic Redundancy Check
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CPU
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Central Processing Unit
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ctrlmbuf An *mbuf* carrying control data.
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CRC
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Cyclic Redundancy Check
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Data Plane In contrast to the control plane,
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the data plane in a network architecture are the layers involved when forwarding packets.
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These layers must be highly optimized to achieve good performance.
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ctrlmbuf
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An *mbuf* carrying control data.
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DIMM Dual In-line Memory Module
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Data Plane
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In contrast to the control plane, the data plane in a network architecture
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are the layers involved when forwarding packets. These layers must be
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highly optimized to achieve good performance.
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Doxygen A documentation generator used in the DPDK to generate the API reference.
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DIMM
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Dual In-line Memory Module
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DPDK Data Plane Development Kit
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Doxygen
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A documentation generator used in the DPDK to generate the API reference.
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DRAM Dynamic Random Access Memory
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DPDK
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Data Plane Development Kit
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EAL The Environment Abstraction Layer (EAL) provides a generic interface that hides the environment specifics
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from the applications and libraries.
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The services expected from the EAL are:
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development kit loading and launching, core affinity/ assignment procedures,
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system memory allocation/description, PCI bus access, inter-partition communication.
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DRAM
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Dynamic Random Access Memory
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FIFO First In First Out
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EAL
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The Environment Abstraction Layer (EAL) provides a generic interface that
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hides the environment specifics from the applications and libraries. The
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services expected from the EAL are: development kit loading and launching,
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core affinity/ assignment procedures, system memory allocation/description,
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PCI bus access, inter-partition communication.
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FPGA Field Programmable Gate Array
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FIFO
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First In First Out
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GbE Gigabit Ethernet
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FPGA
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Field Programmable Gate Array
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HW Hardware
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GbE
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Gigabit Ethernet
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HPET High Precision Event Timer;
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a hardware timer that provides a precise time reference on x86 platforms.
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HW
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Hardware
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ID Identifier
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HPET
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High Precision Event Timer; a hardware timer that provides a precise time
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reference on x86 platforms.
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IOCTL Input/Output Control
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ID
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Identifier
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I/O Input/Output
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IOCTL
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Input/Output Control
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IP Internet Protocol
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I/O
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Input/Output
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IPv4 Internet Protocol version 4
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IP
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Internet Protocol
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IPv6 Internet Protocol version 6
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IPv4
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Internet Protocol version 4
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lcore A logical execution unit of the processor, sometimes called a *hardware thread*.
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IPv6
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Internet Protocol version 6
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KNI Kernel Network Interface
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lcore
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A logical execution unit of the processor, sometimes called a *hardware
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thread*.
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L1 Layer 1
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KNI
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Kernel Network Interface
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L2 Layer 2
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L1
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Layer 1
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L3 Layer 3
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L2
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Layer 2
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L4 Layer 4
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L3
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Layer 3
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LAN Local Area Network
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L4
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Layer 4
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LPM Longest Prefix Match
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LAN
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Local Area Network
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master lcore The execution unit that executes the main() function and that launches other lcores.
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LPM
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Longest Prefix Match
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mbuf An mbuf is a data structure used internally to carry messages (mainly network packets).
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The name is derived from BSD stacks.
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To understand the concepts of packet buffers or mbuf,
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refer to *TCP/IP Illustrated, Volume 2: The Implementation*.
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master lcore
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The execution unit that executes the main() function and that launches
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other lcores.
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MESI Modified Exclusive Shared Invalid (CPU cache coherency protocol)
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mbuf
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An mbuf is a data structure used internally to carry messages (mainly
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network packets). The name is derived from BSD stacks. To understand the
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concepts of packet buffers or mbuf, refer to *TCP/IP Illustrated, Volume 2:
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The Implementation*.
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MTU Maximum Transfer Unit
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MESI
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Modified Exclusive Shared Invalid (CPU cache coherency protocol)
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NIC Network Interface Card
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MTU
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Maximum Transfer Unit
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OOO Out Of Order (execution of instructions within the CPU pipeline)
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NIC
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Network Interface Card
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NUMA Non-uniform Memory Access
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OOO
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Out Of Order (execution of instructions within the CPU pipeline)
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PCI Peripheral Connect Interface
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NUMA
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Non-uniform Memory Access
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PHY An abbreviation for the physical layer of the OSI model.
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PCI
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Peripheral Connect Interface
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pktmbuf An *mbuf* carrying a network packet.
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PHY
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An abbreviation for the physical layer of the OSI model.
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PMD Poll Mode Driver
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pktmbuf
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An *mbuf* carrying a network packet.
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QoS Quality of Service
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PMD
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Poll Mode Driver
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RCU Read-Copy-Update algorithm, an alternative to simple rwlocks.
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QoS
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Quality of Service
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Rd Read
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RCU
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Read-Copy-Update algorithm, an alternative to simple rwlocks.
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RED Random Early Detection
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Rd
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Read
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RSS Receive Side Scaling
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RED
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Random Early Detection
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RTE Run Time Environment.
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Provides a fast and simple framework for fast packet processing,
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in a lightweight environment as a Linux* application and
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using Poll Mode Drivers (PMDs) to increase speed.
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RSS
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Receive Side Scaling
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Rx Reception
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RTE
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Run Time Environment. Provides a fast and simple framework for fast packet
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processing, in a lightweight environment as a Linux* application and using
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Poll Mode Drivers (PMDs) to increase speed.
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Slave lcore Any *lcore* that is not the *master lcore*.
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Rx
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Reception
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Socket A physical CPU, that includes several *cores*.
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Slave lcore
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Any *lcore* that is not the *master lcore*.
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SLA Service Level Agreement
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Socket
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A physical CPU, that includes several *cores*.
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srTCM Single Rate Three Color Marking
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SLA
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Service Level Agreement
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SRTD Scheduler Round Trip Delay
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srTCM
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Single Rate Three Color Marking
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SW Software
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SRTD
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Scheduler Round Trip Delay
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Target In the DPDK, the target is a combination of architecture,
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machine, executive environment and toolchain.
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For example: i686-native-linuxapp-gcc.
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SW
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Software
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TCP Transmission Control Protocol
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Target
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In the DPDK, the target is a combination of architecture, machine,
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executive environment and toolchain. For example:
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i686-native-linuxapp-gcc.
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TC Traffic Class
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TCP
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Transmission Control Protocol
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TLB Translation Lookaside Buffer
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TC
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Traffic Class
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TLS Thread Local Storage
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TLB
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Translation Lookaside Buffer
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trTCM Two Rate Three Color Marking
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TLS
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Thread Local Storage
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TSC Time Stamp Counter
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trTCM
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Two Rate Three Color Marking
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Tx Transmission
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TSC
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Time Stamp Counter
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TUN/TAP TUN and TAP are virtual network kernel devices.
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Tx
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Transmission
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VLAN Virtual Local Area Network
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TUN/TAP
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TUN and TAP are virtual network kernel devices.
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Wr Write
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VLAN
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Virtual Local Area Network
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WRED Weighted Random Early Detection
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Wr
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Write
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WRR Weighted Round Robin
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=============== =========================================================================================================
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WRED
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Weighted Random Early Detection
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WRR
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Weighted Round Robin
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