doc: add NXP DPAA SEC
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: John McNamara <john.mcnamara@intel.com>
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@ -580,6 +580,8 @@ NXP DPAA_SEC
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M: Akhil Goyal <akhil.goyal@nxp.com>
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M: Hemant Agrawal <hemant.agrawal@nxp.com>
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F: drivers/crypto/dpaa_sec/
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F: doc/guides/cryptodevs/dpaa_sec.rst
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F: doc/guides/cryptodevs/features/dpaa_sec.ini
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NXP DPAA2_SEC
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M: Akhil Goyal <akhil.goyal@nxp.com>
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182
doc/guides/cryptodevs/dpaa_sec.rst
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182
doc/guides/cryptodevs/dpaa_sec.rst
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@ -0,0 +1,182 @@
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.. BSD LICENSE
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Copyright 2017 NXP.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of NXP nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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NXP DPAA CAAM (DPAA_SEC)
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========================
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The DPAA_SEC PMD provides poll mode crypto driver support for NXP DPAA CAAM
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hardware accelerator.
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Architecture
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------------
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SEC is the SOC's security engine, which serves as NXP's latest cryptographic
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acceleration and offloading hardware. It combines functions previously
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implemented in separate modules to create a modular and scalable acceleration
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and assurance engine. It also implements block encryption algorithms, stream
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cipher algorithms, hashing algorithms, public key algorithms, run-time
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integrity checking, and a hardware random number generator. SEC performs
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higher-level cryptographic operations than previous NXP cryptographic
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accelerators. This provides significant improvement to system level performance.
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DPAA_SEC is one of the hardware resource in DPAA Architecture. More information
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on DPAA Architecture is described in :ref:`dpaa_overview`.
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DPAA_SEC PMD is one of DPAA drivers which interacts with QBMAN to create,
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configure and destroy the device instance using queue pair with CAAM portal.
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DPAA_SEC PMD also uses some of the other hardware resources like buffer pools,
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queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
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Implementation
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--------------
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SEC provides platform assurance by working with SecMon, which is a companion
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logic block that tracks the security state of the SOC. SEC is programmed by
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means of descriptors (not to be confused with frame descriptors (FDs)) that
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indicate the operations to be performed and link to the message and
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associated data. SEC incorporates two DMA engines to fetch the descriptors,
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read the message data, and write the results of the operations. The DMA
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engine provides a scatter/gather capability so that SEC can read and write
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data scattered in memory. SEC may be configured by means of software for
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dynamic changes in byte ordering. The default configuration for this version
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of SEC is little-endian mode.
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Features
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--------
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The DPAA PMD has support for:
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Cipher algorithms:
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* ``RTE_CRYPTO_CIPHER_3DES_CBC``
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* ``RTE_CRYPTO_CIPHER_AES128_CBC``
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* ``RTE_CRYPTO_CIPHER_AES192_CBC``
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* ``RTE_CRYPTO_CIPHER_AES256_CBC``
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* ``RTE_CRYPTO_CIPHER_AES128_CTR``
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* ``RTE_CRYPTO_CIPHER_AES192_CTR``
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* ``RTE_CRYPTO_CIPHER_AES256_CTR``
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Hash algorithms:
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* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
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* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
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* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
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* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
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* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
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* ``RTE_CRYPTO_AUTH_MD5_HMAC``
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AEAD algorithms:
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* ``RTE_CRYPTO_AEAD_AES_GCM``
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Supported DPAA SoCs
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--------------------
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* LS1046A/LS1026A
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* LS1043A/LS1023A
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Limitations
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-----------
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* Chained mbufs are not supported.
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* Hash followed by Cipher mode is not supported
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* Only supports the session-oriented API implementation (session-less APIs are not supported).
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Prerequisites
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-------------
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DPAA_SEC driver has similar pre-requisites as described in :ref:`dpaa_overview`.
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The following dependencies are not part of DPDK and must be installed separately:
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* **NXP Linux SDK**
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NXP Linux software development kit (SDK) includes support for the family
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of QorIQ® ARM-Architecture-based system on chip (SoC) processors
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and corresponding boards.
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It includes the Linux board support packages (BSPs) for NXP SoCs,
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a fully operational tool chain, kernel and board specific modules.
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SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.
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* **DPDK Extras Scripts**
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DPAA based resources can be configured easily with the help of ready scripts
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as provided in the DPDK Extras repository.
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`DPDK Extras Scripts <https://github.com/qoriq-open-source/dpdk-extras>`_.
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Currently supported by DPDK:
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* NXP SDK **2.0+**.
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* Supported architectures: **arm64 LE**.
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* Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
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Pre-Installation Configuration
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------------------------------
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Config File Options
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~~~~~~~~~~~~~~~~~~~
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Basic DPAA config file options are described in :ref:`dpaa_overview`.
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In addition to those, the following options can be modified in the ``config`` file
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to enable DPAA_SEC PMD.
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Please note that enabling debugging options may affect system performance.
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* ``CONFIG_RTE_LIBRTE_PMD_DPAA_SEC`` (default ``n``)
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By default it is only enabled in defconfig_arm64-dpaa-* config.
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Toggle compilation of the ``librte_pmd_dpaa_sec`` driver.
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* ``CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT`` (default ``n``)
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Toggle display of initialization related driver messages
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* ``CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER`` (default ``n``)
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Toggle display of driver runtime messages
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* ``CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX`` (default ``n``)
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Toggle display of receive fast path run-time message
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* ``CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS``
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By default it is set as 2048 in defconfig_arm64-dpaa-* config.
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It indicates Number of sessions to create in the session memory pool
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on a single DPAA SEC device.
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Installations
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-------------
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To compile the DPAA_SEC PMD for Linux arm64 gcc target, run the
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following ``make`` command:
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.. code-block:: console
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cd <DPDK-source-directory>
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make config T=arm64-dpaa-linuxapp-gcc install
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40
doc/guides/cryptodevs/features/dpaa_sec.ini
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40
doc/guides/cryptodevs/features/dpaa_sec.ini
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;
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; Supported features of the 'dpaa_sec' crypto driver.
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;
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; Refer to default.ini for the full list of available PMD features.
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;
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[Features]
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Symmetric crypto = Y
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Sym operation chaining = Y
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HW Accelerated = Y
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;
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; Supported crypto algorithms of the 'dpaa_sec' crypto driver.
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;
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[Cipher]
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AES CBC (128) = Y
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AES CBC (192) = Y
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AES CBC (256) = Y
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AES CTR (128) = Y
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AES CTR (192) = Y
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AES CTR (256) = Y
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3DES CBC = Y
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;
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; Supported authentication algorithms of the 'dpaa_sec' crypto driver.
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;
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[Auth]
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MD5 HMAC = Y
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SHA1 HMAC = Y
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SHA224 HMAC = Y
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SHA256 HMAC = Y
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SHA384 HMAC = Y
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SHA512 HMAC = Y
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;
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; Supported AEAD algorithms of the 'dpaa_sec' crypto driver.
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;
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[AEAD]
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AES GCM (128) = Y
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AES GCM (192) = Y
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AES GCM (256) = Y
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aesni_gcm
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armv8
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dpaa2_sec
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dpaa_sec
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kasumi
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openssl
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null
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* DES CBC algorithm.
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* AES CCM algorithm.
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* **Added NXP DPAA SEC crypto PMD.**
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A new "dpaa_sec" hardware based crypto PMD for NXP DPAA devices has been
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added. See the "Crypto Device Drivers" document for more details on this
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driver.
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* **Add new benchmarking mode to dpdk-test-crypto-perf application.**
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Added new "PMD cyclecount" benchmark mode to dpdk-test-crypto-perf application
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crypto_snow3g
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crypto_kasumi
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crypto_zuc
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crypto_dpaa_sec
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crypto_dpaa2_sec
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crypto_armv8
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crypto_scheduler
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