i40e: get flow director information
implement operation to get flow director information in i40e pmd driver, includes - mode - supported flow types - table space - flexible payload size and granularity - configured flexible payload and mask information Signed-off-by: Jingjing Wu <jingjing.wu@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
This commit is contained in:
Jingjing Wu
Thomas Monjalon
parent
bdfb5d4d35
commit
bf78123f30
@ -90,6 +90,7 @@ enum i40e_flxpld_layer_idx {
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#define I40E_MAX_FLXPLD_FIED 3 /* max number of flex payload fields */
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#define I40E_FDIR_BITMASK_NUM_WORD 2 /* max number of bitmask words */
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#define I40E_FDIR_MAX_FLEXWORD_NUM 8 /* max number of flexpayload words */
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#define I40E_FDIR_MAX_FLEX_LEN 16 /* len in bytes of flex payload */
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/* i40e flags */
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#define I40E_FLAG_RSS (1ULL << 0)
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@ -80,8 +80,34 @@
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#define I40E_COUNTER_PF 2
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/* Statistic counter index for one pf */
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#define I40E_COUNTER_INDEX_FDIR(pf_id) (0 + (pf_id) * I40E_COUNTER_PF)
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#define I40E_MAX_FLX_SOURCE_OFF 480
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#define I40E_FLX_OFFSET_IN_FIELD_VECTOR 50
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#define NONUSE_FLX_PIT_DEST_OFF 63
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#define NONUSE_FLX_PIT_FSIZE 1
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#define MK_FLX_PIT(src_offset, fsize, dst_offset) ( \
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(((src_offset) << I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \
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I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) | \
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(((fsize) << I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
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I40E_PRTQF_FLX_PIT_FSIZE_MASK) | \
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((((dst_offset) + I40E_FLX_OFFSET_IN_FIELD_VECTOR) << \
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I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \
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I40E_PRTQF_FLX_PIT_DEST_OFF_MASK))
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#define I40E_FDIR_FLOW_TYPES ( \
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(1 << RTE_ETH_FLOW_TYPE_UDPV4) | \
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(1 << RTE_ETH_FLOW_TYPE_TCPV4) | \
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(1 << RTE_ETH_FLOW_TYPE_SCTPV4) | \
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(1 << RTE_ETH_FLOW_TYPE_IPV4_OTHER) | \
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(1 << RTE_ETH_FLOW_TYPE_FRAG_IPV4) | \
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(1 << RTE_ETH_FLOW_TYPE_UDPV6) | \
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(1 << RTE_ETH_FLOW_TYPE_TCPV6) | \
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(1 << RTE_ETH_FLOW_TYPE_SCTPV6) | \
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(1 << RTE_ETH_FLOW_TYPE_IPV6_OTHER) | \
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(1 << RTE_ETH_FLOW_TYPE_FRAG_IPV6))
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#define I40E_FLEX_WORD_MASK(off) (0x80 >> (off))
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static int i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq);
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static int i40e_fdir_construct_pkt(struct i40e_pf *pf,
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const struct rte_eth_fdir_input *fdir_input,
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@ -94,6 +120,8 @@ static int i40e_fdir_filter_programming(struct i40e_pf *pf,
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const struct rte_eth_fdir_filter *filter,
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bool add);
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static int i40e_fdir_flush(struct rte_eth_dev *dev);
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static void i40e_fdir_info_get(struct rte_eth_dev *dev,
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struct rte_eth_fdir_info *fdir);
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static int
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i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)
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@ -861,6 +889,120 @@ i40e_fdir_flush(struct rte_eth_dev *dev)
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return 0;
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}
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static inline void
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i40e_fdir_info_get_flex_set(struct i40e_pf *pf,
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struct rte_eth_flex_payload_cfg *flex_set,
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uint16_t *num)
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{
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struct i40e_fdir_flex_pit *flex_pit;
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struct rte_eth_flex_payload_cfg *ptr = flex_set;
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uint16_t src, dst, size, j, k;
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uint8_t i, layer_idx;
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for (layer_idx = I40E_FLXPLD_L2_IDX;
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layer_idx <= I40E_FLXPLD_L4_IDX;
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layer_idx++) {
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if (layer_idx == I40E_FLXPLD_L2_IDX)
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ptr->type = RTE_ETH_L2_PAYLOAD;
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else if (layer_idx == I40E_FLXPLD_L3_IDX)
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ptr->type = RTE_ETH_L3_PAYLOAD;
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else if (layer_idx == I40E_FLXPLD_L4_IDX)
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ptr->type = RTE_ETH_L4_PAYLOAD;
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for (i = 0; i < I40E_MAX_FLXPLD_FIED; i++) {
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flex_pit = &pf->fdir.flex_set[layer_idx *
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I40E_MAX_FLXPLD_FIED + i];
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if (flex_pit->size == 0)
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continue;
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src = flex_pit->src_offset * sizeof(uint16_t);
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dst = flex_pit->dst_offset * sizeof(uint16_t);
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size = flex_pit->size * sizeof(uint16_t);
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for (j = src, k = dst; j < src + size; j++, k++)
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ptr->src_offset[k] = j;
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}
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(*num)++;
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ptr++;
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}
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}
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static inline void
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i40e_fdir_info_get_flex_mask(struct i40e_pf *pf,
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struct rte_eth_fdir_flex_mask *flex_mask,
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uint16_t *num)
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{
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struct i40e_fdir_flex_mask *mask;
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struct rte_eth_fdir_flex_mask *ptr = flex_mask;
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enum rte_eth_flow_type flow_type;
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uint8_t i, j;
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uint16_t off_bytes, mask_tmp;
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for (i = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
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i <= I40E_FILTER_PCTYPE_FRAG_IPV6;
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i++) {
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mask = &pf->fdir.flex_mask[i];
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if (!I40E_VALID_PCTYPE((enum i40e_filter_pctype)i))
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continue;
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flow_type = i40e_pctype_to_flowtype((enum i40e_filter_pctype)i);
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for (j = 0; j < I40E_FDIR_MAX_FLEXWORD_NUM; j++) {
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if (mask->word_mask & I40E_FLEX_WORD_MASK(j)) {
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ptr->mask[j * sizeof(uint16_t)] = UINT8_MAX;
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ptr->mask[j * sizeof(uint16_t) + 1] = UINT8_MAX;
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} else {
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ptr->mask[j * sizeof(uint16_t)] = 0x0;
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ptr->mask[j * sizeof(uint16_t) + 1] = 0x0;
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}
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}
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for (j = 0; j < I40E_FDIR_BITMASK_NUM_WORD; j++) {
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off_bytes = mask->bitmask[j].offset * sizeof(uint16_t);
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mask_tmp = ~mask->bitmask[j].mask;
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ptr->mask[off_bytes] &= I40E_HI_BYTE(mask_tmp);
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ptr->mask[off_bytes + 1] &= I40E_LO_BYTE(mask_tmp);
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}
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ptr->flow_type = flow_type;
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ptr++;
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(*num)++;
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}
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}
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/*
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* i40e_fdir_info_get - get information of Flow Director
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* @pf: ethernet device to get info from
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* @fdir: a pointer to a structure of type *rte_eth_fdir_info* to be filled with
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* the flow director information.
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*/
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static void
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i40e_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir)
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{
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struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
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struct i40e_hw *hw = I40E_PF_TO_HW(pf);
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uint16_t num_flex_set = 0;
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uint16_t num_flex_mask = 0;
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fdir->mode = (pf->flags & I40E_FLAG_FDIR) ?
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RTE_FDIR_MODE_PERFECT : RTE_FDIR_MODE_NONE;
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fdir->guarant_spc =
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(uint32_t)hw->func_caps.fd_filters_guaranteed;
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fdir->best_spc =
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(uint32_t)hw->func_caps.fd_filters_best_effort;
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fdir->max_flexpayload = I40E_FDIR_MAX_FLEX_LEN;
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fdir->flow_types_mask[0] = I40E_FDIR_FLOW_TYPES;
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fdir->flex_payload_unit = sizeof(uint16_t);
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fdir->flex_bitmask_unit = sizeof(uint16_t);
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fdir->max_flex_payload_segment_num = I40E_MAX_FLXPLD_FIED;
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fdir->flex_payload_limit = I40E_MAX_FLX_SOURCE_OFF;
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fdir->max_flex_bitmask_num = I40E_FDIR_BITMASK_NUM_WORD;
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i40e_fdir_info_get_flex_set(pf,
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fdir->flex_conf.flex_set,
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&num_flex_set);
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i40e_fdir_info_get_flex_mask(pf,
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fdir->flex_conf.flex_mask,
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&num_flex_mask);
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fdir->flex_conf.nb_payloads = num_flex_set;
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fdir->flex_conf.nb_flexmasks = num_flex_mask;
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}
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/*
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* i40e_fdir_ctrl_func - deal with all operations on flow director.
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* @pf: board private structure
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@ -898,6 +1040,9 @@ i40e_fdir_ctrl_func(struct rte_eth_dev *dev,
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case RTE_ETH_FILTER_FLUSH:
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ret = i40e_fdir_flush(dev);
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break;
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case RTE_ETH_FILTER_INFO:
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i40e_fdir_info_get(dev, (struct rte_eth_fdir_info *)arg);
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break;
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default:
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PMD_DRV_LOG(ERR, "unknown operation %u.", filter_op);
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ret = -EINVAL;
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