net/mlx5: add transfer attribute to matcher

In current implementation the DV steering supported only NIC steering.
This commit adds the transfer attribute in order to create a matcher
on the FDB tables.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
This commit is contained in:
Ori Kam 2019-04-18 13:16:04 +00:00 committed by Ferruh Yigit
parent 822fb31953
commit c14995c557
3 changed files with 21 additions and 4 deletions

View File

@ -2094,6 +2094,7 @@ flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
flow = rte_calloc(__func__, 1, flow_size, 0); flow = rte_calloc(__func__, 1, flow_size, 0);
flow->drv_type = flow_get_drv_type(dev, attr); flow->drv_type = flow_get_drv_type(dev, attr);
flow->ingress = attr->ingress; flow->ingress = attr->ingress;
flow->transfer = attr->transfer;
assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
flow->drv_type < MLX5_FLOW_TYPE_MAX); flow->drv_type < MLX5_FLOW_TYPE_MAX);
flow->queue = (void *)(flow + 1); flow->queue = (void *)(flow + 1);

View File

@ -210,6 +210,7 @@ struct mlx5_flow_dv_matcher {
uint16_t crc; /**< CRC of key. */ uint16_t crc; /**< CRC of key. */
uint16_t priority; /**< Priority of matcher. */ uint16_t priority; /**< Priority of matcher. */
uint8_t egress; /**< Egress matcher. */ uint8_t egress; /**< Egress matcher. */
uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
uint32_t group; /**< The matcher group. */ uint32_t group; /**< The matcher group. */
struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */ struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
}; };
@ -382,6 +383,7 @@ struct rte_flow {
struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */ struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */
uint8_t ingress; /**< 1 if the flow is ingress. */ uint8_t ingress; /**< 1 if the flow is ingress. */
uint32_t group; /**< The group index. */ uint32_t group; /**< The group index. */
uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
}; };
typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,

View File

@ -3191,6 +3191,8 @@ flow_dv_matcher_enable(uint32_t *match_criteria)
* Table id to use. * Table id to use.
* @param[in] egress * @param[in] egress
* Direction of the table. * Direction of the table.
* @param[in] transfer
* E-Switch or NIC flow.
* @param[out] error * @param[out] error
* pointer to error structure. * pointer to error structure.
* *
@ -3200,6 +3202,7 @@ flow_dv_matcher_enable(uint32_t *match_criteria)
static struct mlx5_flow_tbl_resource * static struct mlx5_flow_tbl_resource *
flow_dv_tbl_resource_get(struct rte_eth_dev *dev, flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
uint32_t table_id, uint8_t egress, uint32_t table_id, uint8_t egress,
uint8_t transfer,
struct rte_flow_error *error) struct rte_flow_error *error)
{ {
struct mlx5_priv *priv = dev->data->dev_private; struct mlx5_priv *priv = dev->data->dev_private;
@ -3207,7 +3210,12 @@ flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
struct mlx5_flow_tbl_resource *tbl; struct mlx5_flow_tbl_resource *tbl;
#ifdef HAVE_MLX5DV_DR #ifdef HAVE_MLX5DV_DR
if (egress) { if (transfer) {
tbl = &sh->fdb_tbl[table_id];
if (!tbl->obj)
tbl->obj = mlx5_glue->dr_create_flow_tbl
(sh->fdb_ns, table_id);
} else if (egress) {
tbl = &sh->tx_tbl[table_id]; tbl = &sh->tx_tbl[table_id];
if (!tbl->obj) if (!tbl->obj)
tbl->obj = mlx5_glue->dr_create_flow_tbl tbl->obj = mlx5_glue->dr_create_flow_tbl
@ -3229,7 +3237,9 @@ flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
#else #else
(void)error; (void)error;
(void)tbl; (void)tbl;
if (egress) if (transfer)
return &sh->fdb_tbl[table_id];
else if (egress)
return &sh->tx_tbl[table_id]; return &sh->tx_tbl[table_id];
else else
return &sh->rx_tbl[table_id]; return &sh->rx_tbl[table_id];
@ -3294,6 +3304,7 @@ flow_dv_matcher_register(struct rte_eth_dev *dev,
matcher->priority == cache_matcher->priority && matcher->priority == cache_matcher->priority &&
matcher->egress == cache_matcher->egress && matcher->egress == cache_matcher->egress &&
matcher->group == cache_matcher->group && matcher->group == cache_matcher->group &&
matcher->transfer == cache_matcher->transfer &&
!memcmp((const void *)matcher->mask.buf, !memcmp((const void *)matcher->mask.buf,
(const void *)cache_matcher->mask.buf, (const void *)cache_matcher->mask.buf,
cache_matcher->mask.size)) { cache_matcher->mask.size)) {
@ -3315,7 +3326,8 @@ flow_dv_matcher_register(struct rte_eth_dev *dev,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"cannot allocate matcher memory"); "cannot allocate matcher memory");
tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR, tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
matcher->egress, error); matcher->egress, matcher->transfer,
error);
if (!tbl) { if (!tbl) {
rte_free(cache_matcher); rte_free(cache_matcher);
return rte_flow_error_set(error, ENOMEM, return rte_flow_error_set(error, ENOMEM,
@ -3643,7 +3655,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
jump_data = action->conf; jump_data = action->conf;
tbl = flow_dv_tbl_resource_get(dev, jump_data->group * tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
MLX5_GROUP_FACTOR, MLX5_GROUP_FACTOR,
attr->egress, error); attr->egress,
attr->transfer, error);
if (!tbl) if (!tbl)
return rte_flow_error_set return rte_flow_error_set
(error, errno, (error, errno,
@ -3874,6 +3887,7 @@ flow_dv_translate(struct rte_eth_dev *dev,
matcher.priority); matcher.priority);
matcher.egress = attr->egress; matcher.egress = attr->egress;
matcher.group = attr->group; matcher.group = attr->group;
matcher.transfer = attr->transfer;
if (flow_dv_matcher_register(dev, &matcher, dev_flow, error)) if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
return -rte_errno; return -rte_errno;
return 0; return 0;