net/ice: support RSS hash configuration in DCF mode

RSS HASH should be updated and queried by application,
Add related ops ('.rss_hash_update', '.rss_hash_conf_get') for DCF.

Because DCF doesn't support configure RSS HASH, only HASH key can be
updated within ops '.rss_hash_update'.

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This commit is contained in:
Steve Yang 2022-04-29 09:19:48 +00:00 committed by Qi Zhang
parent 79b1f7ab46
commit c223cadc9e
5 changed files with 55 additions and 1 deletions

View File

@ -16,6 +16,7 @@ L4 checksum offload = P
Inner L3 checksum = P
Inner L4 checksum = P
RSS reta update = Y
RSS key update = Y
Basic stats = Y
Linux = Y
x86-32 = Y

View File

@ -69,6 +69,7 @@ New Features
* **Updated Intel ice driver.**
* Added support for RSS RETA configure in DCF mode.
* Added support for RSS HASH configure in DCF mode.
* **Updated Mellanox mlx5 driver.**

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@ -758,7 +758,7 @@ ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
hw->ets_config = NULL;
}
static int
int
ice_dcf_configure_rss_key(struct ice_dcf_hw *hw)
{
struct virtchnl_rss_key *rss_key;

View File

@ -122,6 +122,7 @@ int ice_dcf_send_aq_cmd(void *dcf_hw, struct ice_aq_desc *desc,
int ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw);
int ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw);
void ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw);
int ice_dcf_configure_rss_key(struct ice_dcf_hw *hw);
int ice_dcf_configure_rss_lut(struct ice_dcf_hw *hw);
int ice_dcf_init_rss(struct ice_dcf_hw *hw);
int ice_dcf_configure_queues(struct ice_dcf_hw *hw);

View File

@ -836,6 +836,55 @@ ice_dcf_dev_rss_reta_query(struct rte_eth_dev *dev,
return 0;
}
static int
ice_dcf_dev_rss_hash_update(struct rte_eth_dev *dev,
struct rte_eth_rss_conf *rss_conf)
{
struct ice_dcf_adapter *adapter = dev->data->dev_private;
struct ice_dcf_hw *hw = &adapter->real_hw;
if (!(hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF))
return -ENOTSUP;
/* HENA setting, it is enabled by default, no change */
if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) {
PMD_DRV_LOG(DEBUG, "No key to be configured");
return 0;
} else if (rss_conf->rss_key_len != hw->vf_res->rss_key_size) {
PMD_DRV_LOG(ERR, "The size of hash key configured "
"(%d) doesn't match the size of hardware can "
"support (%d)", rss_conf->rss_key_len,
hw->vf_res->rss_key_size);
return -EINVAL;
}
rte_memcpy(hw->rss_key, rss_conf->rss_key, rss_conf->rss_key_len);
return ice_dcf_configure_rss_key(hw);
}
static int
ice_dcf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
struct rte_eth_rss_conf *rss_conf)
{
struct ice_dcf_adapter *adapter = dev->data->dev_private;
struct ice_dcf_hw *hw = &adapter->real_hw;
if (!(hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF))
return -ENOTSUP;
/* Just set it to default value now. */
rss_conf->rss_hf = ICE_RSS_OFFLOAD_ALL;
if (!rss_conf->rss_key)
return 0;
rss_conf->rss_key_len = hw->vf_res->rss_key_size;
rte_memcpy(rss_conf->rss_key, hw->rss_key, rss_conf->rss_key_len);
return 0;
}
#define ICE_DCF_32_BIT_WIDTH (CHAR_BIT * 4)
#define ICE_DCF_48_BIT_WIDTH (CHAR_BIT * 6)
#define ICE_DCF_48_BIT_MASK RTE_LEN2MASK(ICE_DCF_48_BIT_WIDTH, uint64_t)
@ -1184,6 +1233,8 @@ static const struct eth_dev_ops ice_dcf_eth_dev_ops = {
.tm_ops_get = ice_dcf_tm_ops_get,
.reta_update = ice_dcf_dev_rss_reta_update,
.reta_query = ice_dcf_dev_rss_reta_query,
.rss_hash_update = ice_dcf_dev_rss_hash_update,
.rss_hash_conf_get = ice_dcf_dev_rss_hash_conf_get,
};
static int