net/softnic: remove traffic manager support

Remove the Ethernet device traffic manager API support.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
This commit is contained in:
Cristian Dumitrescu 2022-09-01 14:20:21 +00:00 committed by Thomas Monjalon
parent 1c9a7fba5c
commit c5e2f2a45c
7 changed files with 1 additions and 5362 deletions

View File

@ -21,6 +21,5 @@ sources = files(
'rte_eth_softnic_swq.c',
'rte_eth_softnic_tap.c',
'rte_eth_softnic_thread.c',
'rte_eth_softnic_tm.c',
)
deps += ['pipeline', 'port', 'table', 'sched', 'cryptodev']
deps += ['pipeline', 'port', 'table', 'cryptodev']

View File

@ -13,7 +13,6 @@
#include <rte_kvargs.h>
#include <rte_errno.h>
#include <rte_ring.h>
#include <rte_tm_driver.h>
#include <rte_mtr_driver.h>
#include "rte_eth_softnic.h"
@ -23,20 +22,6 @@
#define PMD_PARAM_CONN_PORT "conn_port"
#define PMD_PARAM_CPU_ID "cpu_id"
#define PMD_PARAM_SC "sc"
#define PMD_PARAM_TM_N_QUEUES "tm_n_queues"
#define PMD_PARAM_TM_QSIZE0 "tm_qsize0"
#define PMD_PARAM_TM_QSIZE1 "tm_qsize1"
#define PMD_PARAM_TM_QSIZE2 "tm_qsize2"
#define PMD_PARAM_TM_QSIZE3 "tm_qsize3"
#define PMD_PARAM_TM_QSIZE4 "tm_qsize4"
#define PMD_PARAM_TM_QSIZE5 "tm_qsize5"
#define PMD_PARAM_TM_QSIZE6 "tm_qsize6"
#define PMD_PARAM_TM_QSIZE7 "tm_qsize7"
#define PMD_PARAM_TM_QSIZE8 "tm_qsize8"
#define PMD_PARAM_TM_QSIZE9 "tm_qsize9"
#define PMD_PARAM_TM_QSIZE10 "tm_qsize10"
#define PMD_PARAM_TM_QSIZE11 "tm_qsize11"
#define PMD_PARAM_TM_QSIZE12 "tm_qsize12"
static const char * const pmd_valid_args[] = {
@ -44,20 +29,6 @@ static const char * const pmd_valid_args[] = {
PMD_PARAM_CONN_PORT,
PMD_PARAM_CPU_ID,
PMD_PARAM_SC,
PMD_PARAM_TM_N_QUEUES,
PMD_PARAM_TM_QSIZE0,
PMD_PARAM_TM_QSIZE1,
PMD_PARAM_TM_QSIZE2,
PMD_PARAM_TM_QSIZE3,
PMD_PARAM_TM_QSIZE4,
PMD_PARAM_TM_QSIZE5,
PMD_PARAM_TM_QSIZE6,
PMD_PARAM_TM_QSIZE7,
PMD_PARAM_TM_QSIZE8,
PMD_PARAM_TM_QSIZE9,
PMD_PARAM_TM_QSIZE10,
PMD_PARAM_TM_QSIZE11,
PMD_PARAM_TM_QSIZE12,
NULL
};
@ -193,12 +164,10 @@ pmd_dev_stop(struct rte_eth_dev *dev)
softnic_table_action_profile_free(p);
softnic_port_in_action_profile_free(p);
softnic_tap_free(p);
softnic_tmgr_free(p);
softnic_link_free(p);
softnic_softnic_swq_free_keep_rxq_txq(p);
softnic_mempool_free(p);
tm_hierarchy_free(p);
softnic_mtr_free(p);
return 0;
@ -218,12 +187,10 @@ pmd_free(struct pmd_internals *p)
softnic_table_action_profile_free(p);
softnic_port_in_action_profile_free(p);
softnic_tap_free(p);
softnic_tmgr_free(p);
softnic_link_free(p);
softnic_swq_free(p);
softnic_mempool_free(p);
tm_hierarchy_free(p);
softnic_mtr_free(p);
rte_free(p);
@ -256,14 +223,6 @@ pmd_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
return 0;
}
static int
pmd_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg)
{
*(const struct rte_tm_ops **)arg = &pmd_tm_ops;
return 0;
}
static int
pmd_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg)
{
@ -282,7 +241,6 @@ static const struct eth_dev_ops pmd_ops = {
.rx_queue_setup = pmd_rx_queue_setup,
.tx_queue_setup = pmd_tx_queue_setup,
.flow_ops_get = pmd_flow_ops_get,
.tm_ops_get = pmd_tm_ops_get,
.mtr_ops_get = pmd_mtr_ops_get,
};
@ -325,13 +283,11 @@ pmd_init(struct pmd_params *params)
memcpy(&p->params, params, sizeof(p->params));
/* Resources */
tm_hierarchy_init(p);
softnic_mtr_init(p);
softnic_mempool_init(p);
softnic_swq_init(p);
softnic_link_init(p);
softnic_tmgr_init(p);
softnic_tap_init(p);
softnic_cryptodev_init(p);
softnic_port_in_action_profile_init(p);
@ -459,20 +415,6 @@ pmd_parse_args(struct pmd_params *p, const char *params)
}
p->cpu_id = SOFTNIC_CPU_ID;
p->sc = SOFTNIC_SC;
p->tm.n_queues = SOFTNIC_TM_N_QUEUES;
p->tm.qsize[0] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[1] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[2] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[3] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[4] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[5] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[6] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[7] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[8] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[9] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[10] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[11] = SOFTNIC_TM_QUEUE_SIZE;
p->tm.qsize[12] = SOFTNIC_TM_QUEUE_SIZE;
/* Firmware script (optional) */
if (rte_kvargs_count(kvlist, PMD_PARAM_FIRMWARE) == 1) {
@ -517,104 +459,6 @@ pmd_parse_args(struct pmd_params *p, const char *params)
goto out_free;
}
/* TM number of queues (optional) */
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_N_QUEUES) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_N_QUEUES,
&get_uint32, &p->tm.n_queues);
if (ret < 0)
goto out_free;
}
/* TM queue size 0 .. 3 (optional) */
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE0) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE0,
&get_uint32, &p->tm.qsize[0]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE1) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE1,
&get_uint32, &p->tm.qsize[1]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE2) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE2,
&get_uint32, &p->tm.qsize[2]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE3) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE3,
&get_uint32, &p->tm.qsize[3]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE4) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE4,
&get_uint32, &p->tm.qsize[4]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE5) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE5,
&get_uint32, &p->tm.qsize[5]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE6) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE6,
&get_uint32, &p->tm.qsize[6]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE7) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE7,
&get_uint32, &p->tm.qsize[7]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE8) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE8,
&get_uint32, &p->tm.qsize[8]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE9) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE9,
&get_uint32, &p->tm.qsize[9]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE10) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE10,
&get_uint32, &p->tm.qsize[10]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE11) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE11,
&get_uint32, &p->tm.qsize[11]);
if (ret < 0)
goto out_free;
}
if (rte_kvargs_count(kvlist, PMD_PARAM_TM_QSIZE12) == 1) {
ret = rte_kvargs_process(kvlist, PMD_PARAM_TM_QSIZE12,
&get_uint32, &p->tm.qsize[12]);
if (ret < 0)
goto out_free;
}
out_free:
rte_kvargs_free(kvlist);
return ret;
@ -696,20 +540,6 @@ RTE_PMD_REGISTER_PARAM_STRING(net_softnic,
PMD_PARAM_FIRMWARE "=<string> "
PMD_PARAM_CONN_PORT "=<uint16> "
PMD_PARAM_CPU_ID "=<uint32> "
PMD_PARAM_TM_N_QUEUES "=<uint32> "
PMD_PARAM_TM_QSIZE0 "=<uint32> "
PMD_PARAM_TM_QSIZE1 "=<uint32> "
PMD_PARAM_TM_QSIZE2 "=<uint32> "
PMD_PARAM_TM_QSIZE3 "=<uint32>"
PMD_PARAM_TM_QSIZE4 "=<uint32> "
PMD_PARAM_TM_QSIZE5 "=<uint32> "
PMD_PARAM_TM_QSIZE6 "=<uint32> "
PMD_PARAM_TM_QSIZE7 "=<uint32> "
PMD_PARAM_TM_QSIZE8 "=<uint32> "
PMD_PARAM_TM_QSIZE9 "=<uint32> "
PMD_PARAM_TM_QSIZE10 "=<uint32> "
PMD_PARAM_TM_QSIZE11 "=<uint32>"
PMD_PARAM_TM_QSIZE12 "=<uint32>"
);
int

View File

@ -46,16 +46,6 @@ extern "C" {
#define SOFTNIC_SC 1
#endif
/** Traffic Manager: Number of scheduler queues. */
#ifndef SOFTNIC_TM_N_QUEUES
#define SOFTNIC_TM_N_QUEUES (64 * 1024)
#endif
/** Traffic Manager: Scheduler queue size (per traffic class). */
#ifndef SOFTNIC_TM_QUEUE_SIZE
#define SOFTNIC_TM_QUEUE_SIZE 64
#endif
/**
* Soft NIC run.
*

File diff suppressed because it is too large Load Diff

View File

@ -13,14 +13,12 @@
#include <rte_mbuf.h>
#include <rte_ring.h>
#include <rte_ethdev.h>
#include <rte_sched.h>
#include <rte_port_in_action.h>
#include <rte_table_action.h>
#include <rte_pipeline.h>
#include <rte_ethdev_core.h>
#include <ethdev_driver.h>
#include <rte_tm_driver.h>
#include <rte_flow_driver.h>
#include <rte_mtr_driver.h>
@ -40,12 +38,6 @@ struct pmd_params {
uint16_t conn_port;
uint32_t cpu_id;
int sc; /**< Service cores. */
/** Traffic Management (TM) */
struct {
uint32_t n_queues; /**< Number of queues */
uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
} tm;
};
/**
@ -161,134 +153,6 @@ struct softnic_link {
TAILQ_HEAD(softnic_link_list, softnic_link);
/**
* TMGR
*/
#ifndef TM_MAX_SUBPORTS
#define TM_MAX_SUBPORTS 8
#endif
#ifndef TM_MAX_PIPES_PER_SUBPORT
#define TM_MAX_PIPES_PER_SUBPORT 4096
#endif
#ifndef TM_MAX_PIPE_PROFILE
#define TM_MAX_PIPE_PROFILE 256
#endif
#ifndef TM_MAX_SUBPORT_PROFILE
#define TM_MAX_SUBPORT_PROFILE 256
#endif
struct tm_params {
struct rte_sched_port_params port_params;
struct rte_sched_subport_params subport_params[TM_MAX_SUBPORTS];
struct rte_sched_subport_profile_params
subport_profile[TM_MAX_SUBPORT_PROFILE];
uint32_t n_subport_profiles;
uint32_t subport_to_profile[TM_MAX_SUBPORT_PROFILE];
struct rte_sched_pipe_params pipe_profiles[TM_MAX_PIPE_PROFILE];
uint32_t n_pipe_profiles;
uint32_t pipe_to_profile[TM_MAX_SUBPORTS * TM_MAX_PIPES_PER_SUBPORT];
};
/* TM Levels */
enum tm_node_level {
TM_NODE_LEVEL_PORT = 0,
TM_NODE_LEVEL_SUBPORT,
TM_NODE_LEVEL_PIPE,
TM_NODE_LEVEL_TC,
TM_NODE_LEVEL_QUEUE,
TM_NODE_LEVEL_MAX,
};
/* TM Shaper Profile */
struct tm_shaper_profile {
TAILQ_ENTRY(tm_shaper_profile) node;
uint32_t shaper_profile_id;
uint32_t n_users;
struct rte_tm_shaper_params params;
};
TAILQ_HEAD(tm_shaper_profile_list, tm_shaper_profile);
/* TM Shared Shaper */
struct tm_shared_shaper {
TAILQ_ENTRY(tm_shared_shaper) node;
uint32_t shared_shaper_id;
uint32_t n_users;
uint32_t shaper_profile_id;
};
TAILQ_HEAD(tm_shared_shaper_list, tm_shared_shaper);
/* TM WRED Profile */
struct tm_wred_profile {
TAILQ_ENTRY(tm_wred_profile) node;
uint32_t wred_profile_id;
uint32_t n_users;
struct rte_tm_wred_params params;
};
TAILQ_HEAD(tm_wred_profile_list, tm_wred_profile);
/* TM Node */
struct tm_node {
TAILQ_ENTRY(tm_node) node;
uint32_t node_id;
uint32_t parent_node_id;
uint32_t priority;
uint32_t weight;
uint32_t level;
struct tm_node *parent_node;
struct tm_shaper_profile *shaper_profile;
struct tm_wred_profile *wred_profile;
struct rte_tm_node_params params;
struct rte_tm_node_stats stats;
uint32_t n_children;
};
TAILQ_HEAD(tm_node_list, tm_node);
/* TM Hierarchy Specification */
struct tm_hierarchy {
struct tm_shaper_profile_list shaper_profiles;
struct tm_shared_shaper_list shared_shapers;
struct tm_wred_profile_list wred_profiles;
struct tm_node_list nodes;
uint32_t n_shaper_profiles;
uint32_t n_shared_shapers;
uint32_t n_wred_profiles;
uint32_t n_nodes;
uint32_t n_tm_nodes[TM_NODE_LEVEL_MAX];
};
struct tm_internals {
/** Hierarchy specification
*
* -Hierarchy is unfrozen at init and when port is stopped.
* -Hierarchy is frozen on successful hierarchy commit.
* -Run-time hierarchy changes are not allowed, therefore it makes
* sense to keep the hierarchy frozen after the port is started.
*/
struct tm_hierarchy h;
int hierarchy_frozen;
/** Blueprints */
struct tm_params params;
};
struct softnic_tmgr_port {
TAILQ_ENTRY(softnic_tmgr_port) node;
char name[NAME_SIZE];
struct rte_sched_port *s;
};
TAILQ_HEAD(softnic_tmgr_port_list, softnic_tmgr_port);
/**
* TAP
*/
@ -385,7 +249,6 @@ struct pipeline_params {
enum softnic_port_in_type {
PORT_IN_RXQ,
PORT_IN_SWQ,
PORT_IN_TMGR,
PORT_IN_TAP,
PORT_IN_SOURCE,
PORT_IN_CRYPTODEV,
@ -426,7 +289,6 @@ struct softnic_port_in_params {
enum softnic_port_out_type {
PORT_OUT_TXQ,
PORT_OUT_SWQ,
PORT_OUT_TMGR,
PORT_OUT_TAP,
PORT_OUT_SINK,
PORT_OUT_CRYPTODEV,
@ -619,10 +481,6 @@ struct pmd_internals {
/** Params */
struct pmd_params params;
struct {
struct tm_internals tm; /**< Traffic Management */
} soft;
struct flow_internals flow;
struct mtr_internals mtr;
@ -630,7 +488,6 @@ struct pmd_internals {
struct softnic_mempool_list mempool_list;
struct softnic_swq_list swq_list;
struct softnic_link_list link_list;
struct softnic_tmgr_port_list tmgr_port_list;
struct softnic_tap_list tap_list;
struct softnic_cryptodev_list cryptodev_list;
struct softnic_port_in_action_profile_list port_in_action_profile_list;
@ -753,39 +610,6 @@ softnic_link_create(struct pmd_internals *p,
const char *name,
struct softnic_link_params *params);
/**
* TMGR
*/
int
softnic_tmgr_init(struct pmd_internals *p);
void
softnic_tmgr_free(struct pmd_internals *p);
struct softnic_tmgr_port *
softnic_tmgr_port_find(struct pmd_internals *p,
const char *name);
struct softnic_tmgr_port *
softnic_tmgr_port_create(struct pmd_internals *p,
const char *name);
void
tm_hierarchy_init(struct pmd_internals *p);
void
tm_hierarchy_free(struct pmd_internals *p);
static inline int
tm_used(struct rte_eth_dev *dev)
{
struct pmd_internals *p = dev->data->dev_private;
return p->soft.tm.h.n_tm_nodes[TM_NODE_LEVEL_PORT];
}
extern const struct rte_tm_ops pmd_tm_ops;
/**
* TAP
*/

View File

@ -305,21 +305,6 @@ softnic_pipeline_port_in_create(struct pmd_internals *softnic,
break;
}
case PORT_IN_TMGR:
{
struct softnic_tmgr_port *tmgr_port;
tmgr_port = softnic_tmgr_port_find(softnic, params->dev_name);
if (tmgr_port == NULL)
return -1;
pp.sched.sched = tmgr_port->s;
p.ops = &rte_port_sched_reader_ops;
p.arg_create = &pp.sched;
break;
}
case PORT_IN_TAP:
{
struct softnic_tap *tap;
@ -545,22 +530,6 @@ softnic_pipeline_port_out_create(struct pmd_internals *softnic,
break;
}
case PORT_OUT_TMGR:
{
struct softnic_tmgr_port *tmgr_port;
tmgr_port = softnic_tmgr_port_find(softnic, params->dev_name);
if (tmgr_port == NULL)
return -1;
pp.sched.sched = tmgr_port->s;
pp.sched.tx_burst_sz = params->burst_size;
p.ops = &rte_port_sched_writer_ops;
p.arg_create = &pp.sched;
break;
}
case PORT_OUT_TAP:
{
struct softnic_tap *tap;

File diff suppressed because it is too large Load Diff