net/ark: update MPU functions for firmware update
- New firmware version for MPU (Mbuf Prefetch Unit) - Remove device-level global operations - Remove ark_mpu_reset_stats function Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
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@ -300,6 +300,25 @@ ARK PMD supports the following Arkville RTL PCIe instances including:
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* ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile]
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* ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
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DPDK and Arkville Firmware Versioning
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-------------------------------------
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Arkville's firmware releases and its PMD have version dependencies which
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must be stepped together at certain releases. PMD code ensures the
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versions are compatible. The following lists shows where version
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compatible steps have occurred between DPDK releases and the corresponding
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Arkville releases. Intermediate releases not listed below remain
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compatible, e.g., DPDK releases 21.05, 21.08, and 21.11 are all compatible
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with Arkville releases 21.05, 21.08 and 21.11. LTS versions of DPDK remain
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compatible with the corresponding Arkville version. If other combinations
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are required, please contact Atomic Rules support.
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* DPDK 22.07 requires Arkville 22.07.
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* DPDK 22.03 requires Arkville 22.03.
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* DPDK 21.05 requires Arkville 21.05.
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* DPDK 18.11 requires Arkville 18.11.
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* DPDK 17.05 requires Arkville 17.05 -- initial version.
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Supported Operating Systems
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---------------------------
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@ -110,6 +110,10 @@ New Features
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* Added ``enable_llq`` device argument for controlling the PMD LLQ
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(Low Latency Queue) mode.
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* **Updated Atomic Rules' Arkville PMD.**
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* A firmware version update to Arkville 22.07 is required.
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* **Updated Intel iavf driver.**
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* Added Tx QoS queue rate limitation support.
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@ -524,7 +524,6 @@ ark_config_device(struct rte_eth_dev *dev)
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num_q = ark_api_num_queues(mpu);
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ark->rx_queues = num_q;
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for (i = 0; i < num_q; i++) {
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ark_mpu_reset(mpu);
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mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET);
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}
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@ -536,7 +535,6 @@ ark_config_device(struct rte_eth_dev *dev)
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num_q = ark_api_num_queues(mpu);
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ark->tx_queues = num_q;
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for (i = 0; i < num_q; i++) {
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ark_mpu_reset(mpu);
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mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET);
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}
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@ -91,9 +91,6 @@ eth_ark_rx_hw_setup(struct rte_eth_dev *dev,
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ark_udm_write_addr(queue->udm, phys_addr_prod_index);
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/* advance the valid pointer, but don't start until the queue starts */
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ark_mpu_reset_stats(queue->mpu);
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/* The seed is the producer index for the HW */
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ark_mpu_set_producer(queue->mpu, queue->seed_index);
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dev->data->rx_queue_state[rx_queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
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@ -589,7 +586,6 @@ eth_rx_queue_stats_reset(void *vqueue)
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if (queue == 0)
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return;
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ark_mpu_reset_stats(queue->mpu);
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ark_udm_queue_stats_reset(queue->udm);
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}
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@ -24,10 +24,10 @@ ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size)
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{
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uint32_t version;
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version = mpu->id.vernum & 0x0000fF00;
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if ((mpu->id.idnum != 0x2055504d) ||
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(mpu->hw.obj_size != obj_size) ||
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(version != 0x00003100)) {
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version = mpu->id.vernum;
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if (mpu->id.idnum != ARK_MPU_MODID ||
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version != ARK_MPU_MODVER ||
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mpu->hw.obj_size != obj_size) {
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ARK_PMD_LOG(ERR,
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" MPU module not found as expected %08x"
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" \"%c%c%c%c %c%c%c%c\"\n",
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@ -79,16 +79,9 @@ ark_mpu_reset(struct ark_mpu_t *mpu)
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mpu->cfg.command = MPU_CMD_FORCE_RESET;
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usleep(10);
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}
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ark_mpu_reset_stats(mpu);
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return mpu->cfg.command != MPU_CMD_IDLE;
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}
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void
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ark_mpu_reset_stats(struct ark_mpu_t *mpu)
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{
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mpu->stats.pci_request = 1; /* reset stats */
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}
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int
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ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring, uint32_t ring_size,
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int is_tx)
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@ -118,12 +111,6 @@ ark_mpu_dump(struct ark_mpu_t *mpu, const char *code, uint16_t qid)
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ARK_PMD_LOG(DEBUG, "MPU: %s Q: %3u sw_prod %u, hw_cons: %u\n",
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code, qid,
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mpu->cfg.sw_prod_index, mpu->cfg.hw_cons_index);
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ARK_PMD_LOG(DEBUG, "MPU: %s state: %d count %d, reserved %d"
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"\n",
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code,
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mpu->debug.state, mpu->debug.count,
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mpu->debug.reserved
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);
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}
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void
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@ -15,6 +15,8 @@
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* there is minimal documentation.
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*/
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#define ARK_MPU_MODID 0x2055504d
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#define ARK_MPU_MODVER 0x37313232
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/*
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* MPU hardware structures
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* These are overlay structures to a memory mapped FPGA device. These
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@ -64,26 +66,6 @@ enum ARK_MPU_COMMAND {
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MPU_COMMAND_LIMIT = 0xfFFFFFFF
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};
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#define ARK_MPU_STATS 0x080
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struct ark_mpu_stats_t {
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volatile uint64_t pci_request;
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volatile uint64_t q_empty;
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volatile uint64_t q_q1;
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volatile uint64_t q_q2;
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volatile uint64_t q_q3;
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volatile uint64_t q_q4;
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volatile uint64_t q_full;
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};
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#define ARK_MPU_DEBUG 0x0C0
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struct ark_mpu_debug_t {
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volatile uint32_t state;
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uint32_t reserved;
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volatile uint32_t count;
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volatile uint32_t take;
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volatile uint32_t peek[4];
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};
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/* Consolidated structure */
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struct ark_mpu_t {
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struct ark_mpu_id_t id;
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@ -93,12 +75,6 @@ struct ark_mpu_t {
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uint8_t reserved1[(ARK_MPU_CFG - ARK_MPU_HW) -
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sizeof(struct ark_mpu_hw_t)];
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struct ark_mpu_cfg_t cfg;
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uint8_t reserved2[(ARK_MPU_STATS - ARK_MPU_CFG) -
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sizeof(struct ark_mpu_cfg_t)];
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struct ark_mpu_stats_t stats;
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uint8_t reserved3[(ARK_MPU_DEBUG - ARK_MPU_STATS) -
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sizeof(struct ark_mpu_stats_t)];
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struct ark_mpu_debug_t debug;
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};
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uint16_t ark_api_num_queues(struct ark_mpu_t *mpu);
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@ -113,7 +89,6 @@ int ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring,
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void ark_mpu_dump(struct ark_mpu_t *mpu, const char *msg, uint16_t idx);
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void ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t qid);
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void ark_mpu_reset_stats(struct ark_mpu_t *mpu);
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/* this action is in a performance critical path */
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static inline void
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