net/thunderx: convert to new offload API
This patch removes all references to old-style offload API replacing them with new offload flags. Signed-off-by: Maciej Czekaj <maciej.czekaj@caviumnetworks.com>
This commit is contained in:
Maciej Czekaj
Ferruh Yigit
parent
9f7d41e6a7
commit
c97da2cbc2
@ -172,6 +172,7 @@ nicvf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
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struct nicvf *nic = nicvf_pmd_priv(dev);
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uint32_t buffsz, frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
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size_t i;
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struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
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PMD_INIT_FUNC_TRACE();
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@ -197,15 +198,15 @@ nicvf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
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return -EINVAL;
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if (frame_size > ETHER_MAX_LEN)
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dev->data->dev_conf.rxmode.jumbo_frame = 1;
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rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
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else
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dev->data->dev_conf.rxmode.jumbo_frame = 0;
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rxmode->offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
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if (nicvf_mbox_update_hw_max_frs(nic, frame_size))
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return -EINVAL;
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/* Update max frame size */
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dev->data->dev_conf.rxmode.max_rx_pkt_len = (uint32_t)frame_size;
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rxmode->max_rx_pkt_len = (uint32_t)frame_size;
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nic->mtu = mtu;
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for (i = 0; i < nic->sqs_count; i++)
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@ -896,7 +897,7 @@ nicvf_set_tx_function(struct rte_eth_dev *dev)
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for (i = 0; i < dev->data->nb_tx_queues; i++) {
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txq = dev->data->tx_queues[i];
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if ((txq->txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS) == 0) {
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if (txq->offloads & DEV_TX_OFFLOAD_MULTI_SEGS) {
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multiseg = true;
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break;
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}
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@ -935,9 +936,10 @@ nicvf_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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const struct rte_eth_txconf *tx_conf)
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{
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uint16_t tx_free_thresh;
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uint8_t is_single_pool;
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bool is_single_pool;
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struct nicvf_txq *txq;
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struct nicvf *nic = nicvf_pmd_priv(dev);
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uint64_t conf_offloads, offload_capa, unsupported_offloads;
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PMD_INIT_FUNC_TRACE();
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@ -951,6 +953,17 @@ nicvf_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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PMD_DRV_LOG(WARNING, "socket_id expected %d, configured %d",
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socket_id, nic->node);
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conf_offloads = tx_conf->offloads;
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offload_capa = NICVF_TX_OFFLOAD_CAPA;
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unsupported_offloads = conf_offloads & ~offload_capa;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported."
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
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unsupported_offloads, conf_offloads, offload_capa);
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return -ENOTSUP;
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}
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/* Tx deferred start is not supported */
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if (tx_conf->tx_deferred_start) {
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PMD_INIT_LOG(ERR, "Tx deferred start not supported");
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@ -1000,11 +1013,11 @@ nicvf_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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txq->nic = nic;
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txq->queue_id = qidx;
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txq->tx_free_thresh = tx_free_thresh;
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txq->txq_flags = tx_conf->txq_flags;
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txq->sq_head = nicvf_qset_base(nic, qidx) + NIC_QSET_SQ_0_7_HEAD;
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txq->sq_door = nicvf_qset_base(nic, qidx) + NIC_QSET_SQ_0_7_DOOR;
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is_single_pool = (txq->txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT &&
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txq->txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP);
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txq->offloads = conf_offloads;
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is_single_pool = !!(conf_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE);
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/* Choose optimum free threshold value for multipool case */
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if (!is_single_pool) {
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@ -1035,9 +1048,10 @@ nicvf_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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nicvf_tx_queue_reset(txq);
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PMD_TX_LOG(DEBUG, "[%d] txq=%p nb_desc=%d desc=%p phys=0x%" PRIx64,
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PMD_INIT_LOG(DEBUG, "[%d] txq=%p nb_desc=%d desc=%p"
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" phys=0x%" PRIx64 " offloads=0x%" PRIx64,
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nicvf_netdev_qidx(nic, qidx), txq, nb_desc, txq->desc,
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txq->phys);
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txq->phys, txq->offloads);
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dev->data->tx_queues[nicvf_netdev_qidx(nic, qidx)] = txq;
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dev->data->tx_queue_state[nicvf_netdev_qidx(nic, qidx)] =
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@ -1263,6 +1277,7 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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uint16_t rx_free_thresh;
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struct nicvf_rxq *rxq;
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struct nicvf *nic = nicvf_pmd_priv(dev);
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uint64_t conf_offloads, offload_capa, unsupported_offloads;
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PMD_INIT_FUNC_TRACE();
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@ -1276,6 +1291,24 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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PMD_DRV_LOG(WARNING, "socket_id expected %d, configured %d",
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socket_id, nic->node);
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conf_offloads = rx_conf->offloads;
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if (conf_offloads & DEV_RX_OFFLOAD_CHECKSUM) {
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PMD_INIT_LOG(NOTICE, "Rx checksum not supported");
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conf_offloads &= ~DEV_RX_OFFLOAD_CHECKSUM;
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}
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offload_capa = NICVF_RX_OFFLOAD_CAPA;
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unsupported_offloads = conf_offloads & ~offload_capa;
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if (unsupported_offloads) {
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PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. "
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"Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
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unsupported_offloads, conf_offloads, offload_capa);
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return -ENOTSUP;
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}
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/* Mempool memory must be contiguous, so must be one memory segment*/
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if (mp->nb_mem_chunks != 1) {
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PMD_INIT_LOG(ERR, "Non-contiguous mempool, add more huge pages");
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@ -1356,9 +1389,10 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
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nicvf_rx_queue_reset(rxq);
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PMD_RX_LOG(DEBUG, "[%d] rxq=%p pool=%s nb_desc=(%d/%d) phy=%" PRIx64,
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PMD_INIT_LOG(DEBUG, "[%d] rxq=%p pool=%s nb_desc=(%d/%d)"
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" phy=0x%" PRIx64 " offloads=0x%" PRIx64,
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nicvf_netdev_qidx(nic, qidx), rxq, mp->name, nb_desc,
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rte_mempool_avail_count(mp), rxq->phys);
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rte_mempool_avail_count(mp), rxq->phys, conf_offloads);
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dev->data->rx_queues[nicvf_netdev_qidx(nic, qidx)] = rxq;
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dev->data->rx_queue_state[nicvf_netdev_qidx(nic, qidx)] =
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@ -1392,13 +1426,10 @@ nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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dev_info->max_mac_addrs = 1;
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dev_info->max_vfs = pci_dev->max_vfs;
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dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP;
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dev_info->tx_offload_capa =
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DEV_TX_OFFLOAD_IPV4_CKSUM |
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DEV_TX_OFFLOAD_UDP_CKSUM |
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DEV_TX_OFFLOAD_TCP_CKSUM |
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DEV_TX_OFFLOAD_TCP_TSO |
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DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
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dev_info->rx_offload_capa = NICVF_RX_OFFLOAD_CAPA;
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dev_info->tx_offload_capa = NICVF_TX_OFFLOAD_CAPA;
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dev_info->rx_queue_offload_capa = NICVF_RX_OFFLOAD_CAPA;
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dev_info->tx_queue_offload_capa = NICVF_TX_OFFLOAD_CAPA;
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dev_info->reta_size = nic->rss_info.rss_size;
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dev_info->hash_key_size = RSS_HASH_KEY_BYTE_SIZE;
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@ -1409,6 +1440,7 @@ nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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dev_info->default_rxconf = (struct rte_eth_rxconf) {
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.rx_free_thresh = NICVF_DEFAULT_RX_FREE_THRESH,
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.rx_drop_en = 0,
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.offloads = DEV_RX_OFFLOAD_CRC_STRIP,
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};
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dev_info->default_txconf = (struct rte_eth_txconf) {
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@ -1419,6 +1451,10 @@ nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
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ETH_TXQ_FLAGS_NOMULTMEMP |
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ETH_TXQ_FLAGS_NOVLANOFFL |
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ETH_TXQ_FLAGS_NOXSUMSCTP,
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.offloads = DEV_TX_OFFLOAD_MBUF_FAST_FREE |
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DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
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DEV_TX_OFFLOAD_UDP_CKSUM |
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DEV_TX_OFFLOAD_TCP_CKSUM,
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};
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}
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@ -1459,6 +1495,7 @@ nicvf_vf_start(struct rte_eth_dev *dev, struct nicvf *nic, uint32_t rbdrsz)
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struct rte_mbuf *mbuf;
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uint16_t rx_start, rx_end;
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uint16_t tx_start, tx_end;
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bool vlan_strip;
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PMD_INIT_FUNC_TRACE();
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@ -1578,7 +1615,9 @@ nicvf_vf_start(struct rte_eth_dev *dev, struct nicvf *nic, uint32_t rbdrsz)
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nic->rbdr->tail, nb_rbdr_desc, nic->vf_id);
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/* Configure VLAN Strip */
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nicvf_vlan_hw_strip(nic, dev->data->dev_conf.rxmode.hw_vlan_strip);
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vlan_strip = !!(dev->data->dev_conf.rxmode.offloads &
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DEV_RX_OFFLOAD_VLAN_STRIP);
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nicvf_vlan_hw_strip(nic, vlan_strip);
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/* Based on the packet type(IPv4 or IPv6), the nicvf HW aligns L3 data
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* to the 64bit memory address.
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@ -1706,11 +1745,11 @@ nicvf_dev_start(struct rte_eth_dev *dev)
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if (dev->data->dev_conf.rxmode.max_rx_pkt_len +
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2 * VLAN_TAG_SIZE > buffsz)
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dev->data->scattered_rx = 1;
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if (rx_conf->enable_scatter)
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if ((rx_conf->offloads & DEV_RX_OFFLOAD_SCATTER) != 0)
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dev->data->scattered_rx = 1;
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/* Setup MTU based on max_rx_pkt_len or default */
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mtu = dev->data->dev_conf.rxmode.jumbo_frame ?
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mtu = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME ?
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dev->data->dev_conf.rxmode.max_rx_pkt_len
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- ETHER_HDR_LEN - ETHER_CRC_LEN
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: ETHER_MTU;
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@ -1884,6 +1923,8 @@ nicvf_dev_configure(struct rte_eth_dev *dev)
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struct rte_eth_txmode *txmode = &conf->txmode;
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struct nicvf *nic = nicvf_pmd_priv(dev);
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uint8_t cqcount;
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uint64_t conf_rx_offloads, rx_offload_capa;
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uint64_t conf_tx_offloads, tx_offload_capa;
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PMD_INIT_FUNC_TRACE();
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@ -1892,6 +1933,36 @@ nicvf_dev_configure(struct rte_eth_dev *dev)
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return -EINVAL;
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}
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conf_tx_offloads = dev->data->dev_conf.txmode.offloads;
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tx_offload_capa = NICVF_TX_OFFLOAD_CAPA;
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if ((conf_tx_offloads & tx_offload_capa) != conf_tx_offloads) {
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PMD_INIT_LOG(ERR, "Some Tx offloads are not supported "
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"requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
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conf_tx_offloads, tx_offload_capa);
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return -ENOTSUP;
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}
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if (rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) {
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PMD_INIT_LOG(NOTICE, "Rx checksum not supported");
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rxmode->offloads &= ~DEV_RX_OFFLOAD_CHECKSUM;
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}
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conf_rx_offloads = rxmode->offloads;
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rx_offload_capa = NICVF_RX_OFFLOAD_CAPA;
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if ((conf_rx_offloads & rx_offload_capa) != conf_rx_offloads) {
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PMD_INIT_LOG(ERR, "Some Rx offloads are not supported "
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"requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n",
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conf_rx_offloads, rx_offload_capa);
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return -ENOTSUP;
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}
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if ((conf_rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP) == 0) {
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PMD_INIT_LOG(NOTICE, "Can't disable hw crc strip");
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rxmode->offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
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}
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if (txmode->mq_mode) {
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PMD_INIT_LOG(INFO, "Tx mq_mode DCB or VMDq not supported");
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return -EINVAL;
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@ -1903,36 +1974,11 @@ nicvf_dev_configure(struct rte_eth_dev *dev)
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return -EINVAL;
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}
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if (!rxmode->hw_strip_crc) {
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PMD_INIT_LOG(NOTICE, "Can't disable hw crc strip");
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rxmode->hw_strip_crc = 1;
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}
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if (rxmode->hw_ip_checksum) {
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PMD_INIT_LOG(NOTICE, "Rxcksum not supported");
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rxmode->hw_ip_checksum = 0;
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}
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if (rxmode->split_hdr_size) {
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PMD_INIT_LOG(INFO, "Rxmode does not support split header");
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return -EINVAL;
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}
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if (rxmode->hw_vlan_filter) {
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PMD_INIT_LOG(INFO, "VLAN filter not supported");
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return -EINVAL;
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}
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if (rxmode->hw_vlan_extend) {
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PMD_INIT_LOG(INFO, "VLAN extended not supported");
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return -EINVAL;
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}
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if (rxmode->enable_lro) {
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PMD_INIT_LOG(INFO, "LRO not supported");
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return -EINVAL;
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}
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if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
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PMD_INIT_LOG(INFO, "Setting link speed/duplex not supported");
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return -EINVAL;
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@ -29,6 +29,20 @@
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ETH_RSS_GENEVE | \
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ETH_RSS_NVGRE)
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#define NICVF_TX_OFFLOAD_CAPA ( \
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DEV_TX_OFFLOAD_IPV4_CKSUM | \
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DEV_TX_OFFLOAD_UDP_CKSUM | \
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DEV_TX_OFFLOAD_TCP_CKSUM | \
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DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
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DEV_TX_OFFLOAD_MBUF_FAST_FREE | \
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DEV_TX_OFFLOAD_MULTI_SEGS)
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#define NICVF_RX_OFFLOAD_CAPA ( \
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DEV_RX_OFFLOAD_VLAN_STRIP | \
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DEV_RX_OFFLOAD_CRC_STRIP | \
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DEV_RX_OFFLOAD_JUMBO_FRAME | \
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DEV_RX_OFFLOAD_SCATTER)
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#define NICVF_DEFAULT_RX_FREE_THRESH 224
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#define NICVF_DEFAULT_TX_FREE_THRESH 224
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#define NICVF_TX_FREE_MPOOL_THRESH 16
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@ -39,7 +39,7 @@ struct nicvf_txq {
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uint32_t tail;
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int32_t xmit_bufs;
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uint32_t qlen_mask;
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uint32_t txq_flags;
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uint64_t offloads;
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uint16_t queue_id;
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uint16_t tx_free_thresh;
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} __rte_cache_aligned;
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