ipsec: support more AEAD algorithms
Added support for AES_CCM, CHACHA20_POLY1305 and AES_GMAC. Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Signed-off-by: Abhijit Sinha <abhijit.sinha@intel.com> Signed-off-by: Daniel Martin Buckley <daniel.m.buckley@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
This commit is contained in:
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199fcba1bd
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c99d26197c
@ -313,7 +313,8 @@ Supported features
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* ESN and replay window.
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* algorithms: 3DES-CBC, AES-CBC, AES-CTR, AES-GCM, HMAC-SHA1, NULL.
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* algorithms: 3DES-CBC, AES-CBC, AES-CTR, AES-GCM, AES_CCM, CHACHA20_POLY1305,
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AES_GMAC, HMAC-SHA1, NULL.
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Limitations
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@ -151,6 +151,11 @@ New Features
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Added support for more comprehensive CRC options.
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* **Updated IPsec library.**
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* Added support for more AEAD algorithms AES_CCM, CHACHA20_POLY1305
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and AES_GMAC.
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* **Added multi-process support for testpmd.**
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Added command-line options to specify total number of processes and
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@ -21,6 +21,37 @@ struct aesctr_cnt_blk {
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uint32_t cnt;
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} __rte_packed;
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/*
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* CHACHA20-POLY1305 devices have some specific requirements
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* for IV and AAD formats.
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* Ideally that to be done by the driver itself.
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*/
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struct aead_chacha20_poly1305_iv {
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uint32_t salt;
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uint64_t iv;
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uint32_t cnt;
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} __rte_packed;
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struct aead_chacha20_poly1305_aad {
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uint32_t spi;
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/*
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* RFC 4106, section 5:
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* Two formats of the AAD are defined:
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* one for 32-bit sequence numbers, and one for 64-bit ESN.
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*/
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union {
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uint32_t u32[2];
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uint64_t u64;
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} sqn;
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uint32_t align0; /* align to 16B boundary */
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} __rte_packed;
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struct chacha20_poly1305_esph_iv {
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struct rte_esp_hdr esph;
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uint64_t iv;
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} __rte_packed;
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/*
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* AES-GCM devices have some specific requirements for IV and AAD formats.
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* Ideally that to be done by the driver itself.
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@ -51,6 +82,47 @@ struct gcm_esph_iv {
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uint64_t iv;
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} __rte_packed;
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/*
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* AES-CCM devices have some specific requirements for IV and AAD formats.
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* Ideally that to be done by the driver itself.
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*/
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union aead_ccm_salt {
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uint32_t salt;
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struct inner {
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uint8_t salt8[3];
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uint8_t ccm_flags;
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} inner;
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} __rte_packed;
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struct aead_ccm_iv {
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uint8_t ccm_flags;
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uint8_t salt[3];
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uint64_t iv;
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uint32_t cnt;
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} __rte_packed;
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struct aead_ccm_aad {
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uint8_t padding[18];
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uint32_t spi;
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/*
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* RFC 4309, section 5:
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* Two formats of the AAD are defined:
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* one for 32-bit sequence numbers, and one for 64-bit ESN.
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*/
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union {
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uint32_t u32[2];
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uint64_t u64;
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} sqn;
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uint32_t align0; /* align to 16B boundary */
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} __rte_packed;
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struct ccm_esph_iv {
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struct rte_esp_hdr esph;
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uint64_t iv;
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} __rte_packed;
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static inline void
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aes_ctr_cnt_blk_fill(struct aesctr_cnt_blk *ctr, uint64_t iv, uint32_t nonce)
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{
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@ -59,6 +131,16 @@ aes_ctr_cnt_blk_fill(struct aesctr_cnt_blk *ctr, uint64_t iv, uint32_t nonce)
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ctr->cnt = rte_cpu_to_be_32(1);
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}
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static inline void
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aead_chacha20_poly1305_iv_fill(struct aead_chacha20_poly1305_iv
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*chacha20_poly1305,
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uint64_t iv, uint32_t salt)
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{
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chacha20_poly1305->salt = salt;
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chacha20_poly1305->iv = iv;
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chacha20_poly1305->cnt = rte_cpu_to_be_32(1);
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}
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static inline void
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aead_gcm_iv_fill(struct aead_gcm_iv *gcm, uint64_t iv, uint32_t salt)
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{
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@ -67,6 +149,21 @@ aead_gcm_iv_fill(struct aead_gcm_iv *gcm, uint64_t iv, uint32_t salt)
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gcm->cnt = rte_cpu_to_be_32(1);
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}
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static inline void
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aead_ccm_iv_fill(struct aead_ccm_iv *ccm, uint64_t iv, uint32_t salt)
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{
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union aead_ccm_salt tsalt;
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tsalt.salt = salt;
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ccm->ccm_flags = tsalt.inner.ccm_flags;
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ccm->salt[0] = tsalt.inner.salt8[0];
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ccm->salt[1] = tsalt.inner.salt8[1];
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ccm->salt[2] = tsalt.inner.salt8[2];
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ccm->iv = iv;
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ccm->cnt = rte_cpu_to_be_32(1);
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}
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/*
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* RFC 4106, 5 AAD Construction
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* spi and sqn should already be converted into network byte order.
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@ -86,6 +183,25 @@ aead_gcm_aad_fill(struct aead_gcm_aad *aad, rte_be32_t spi, rte_be64_t sqn,
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aad->align0 = 0;
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}
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/*
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* RFC 4309, 5 AAD Construction
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* spi and sqn should already be converted into network byte order.
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* Make sure that not used bytes are zeroed.
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*/
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static inline void
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aead_ccm_aad_fill(struct aead_ccm_aad *aad, rte_be32_t spi, rte_be64_t sqn,
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int esn)
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{
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aad->spi = spi;
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if (esn)
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aad->sqn.u64 = sqn;
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else {
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aad->sqn.u32[0] = sqn_low32(sqn);
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aad->sqn.u32[1] = 0;
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}
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aad->align0 = 0;
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}
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static inline void
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gen_iv(uint64_t iv[IPSEC_MAX_IV_QWORD], rte_be64_t sqn)
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{
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@ -93,6 +209,27 @@ gen_iv(uint64_t iv[IPSEC_MAX_IV_QWORD], rte_be64_t sqn)
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iv[1] = 0;
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}
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/*
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* RFC 7634, 2.1 AAD Construction
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* spi and sqn should already be converted into network byte order.
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* Make sure that not used bytes are zeroed.
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*/
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static inline void
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aead_chacha20_poly1305_aad_fill(struct aead_chacha20_poly1305_aad *aad,
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rte_be32_t spi, rte_be64_t sqn,
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int esn)
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{
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aad->spi = spi;
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if (esn)
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aad->sqn.u64 = sqn;
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else {
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aad->sqn.u32[0] = sqn_low32(sqn);
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aad->sqn.u32[1] = 0;
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}
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aad->align0 = 0;
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}
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/*
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* Helper routine to copy IV
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* Right now we support only algorithms with IV length equals 0/8/16 bytes.
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@ -63,6 +63,8 @@ inb_cop_prepare(struct rte_crypto_op *cop,
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{
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struct rte_crypto_sym_op *sop;
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struct aead_gcm_iv *gcm;
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struct aead_ccm_iv *ccm;
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struct aead_chacha20_poly1305_iv *chacha20_poly1305;
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struct aesctr_cnt_blk *ctr;
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uint64_t *ivc, *ivp;
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uint32_t algo;
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@ -83,6 +85,24 @@ inb_cop_prepare(struct rte_crypto_op *cop,
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sa->iv_ofs);
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aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CCM:
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sop_aead_prepare(sop, sa, icv, pofs, plen);
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/* fill AAD IV (located inside crypto op) */
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ccm = rte_crypto_op_ctod_offset(cop, struct aead_ccm_iv *,
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sa->iv_ofs);
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aead_ccm_iv_fill(ccm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_CHACHA20_POLY1305:
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sop_aead_prepare(sop, sa, icv, pofs, plen);
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/* fill AAD IV (located inside crypto op) */
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chacha20_poly1305 = rte_crypto_op_ctod_offset(cop,
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struct aead_chacha20_poly1305_iv *,
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sa->iv_ofs);
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aead_chacha20_poly1305_iv_fill(chacha20_poly1305,
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ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CBC:
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case ALGO_TYPE_3DES_CBC:
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sop_ciph_auth_prepare(sop, sa, icv, pofs, plen);
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@ -91,6 +111,14 @@ inb_cop_prepare(struct rte_crypto_op *cop,
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ivc = rte_crypto_op_ctod_offset(cop, uint64_t *, sa->iv_ofs);
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copy_iv(ivc, ivp, sa->iv_len);
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break;
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case ALGO_TYPE_AES_GMAC:
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sop_ciph_auth_prepare(sop, sa, icv, pofs, plen);
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/* fill AAD IV (located inside crypto op) */
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gcm = rte_crypto_op_ctod_offset(cop, struct aead_gcm_iv *,
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sa->iv_ofs);
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aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CTR:
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sop_ciph_auth_prepare(sop, sa, icv, pofs, plen);
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@ -110,6 +138,8 @@ inb_cpu_crypto_prepare(const struct rte_ipsec_sa *sa, struct rte_mbuf *mb,
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uint32_t *pofs, uint32_t plen, void *iv)
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{
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struct aead_gcm_iv *gcm;
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struct aead_ccm_iv *ccm;
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struct aead_chacha20_poly1305_iv *chacha20_poly1305;
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struct aesctr_cnt_blk *ctr;
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uint64_t *ivp;
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uint32_t clen;
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@ -120,9 +150,19 @@ inb_cpu_crypto_prepare(const struct rte_ipsec_sa *sa, struct rte_mbuf *mb,
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switch (sa->algo_type) {
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case ALGO_TYPE_AES_GCM:
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case ALGO_TYPE_AES_GMAC:
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gcm = (struct aead_gcm_iv *)iv;
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aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CCM:
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ccm = (struct aead_ccm_iv *)iv;
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aead_ccm_iv_fill(ccm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_CHACHA20_POLY1305:
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chacha20_poly1305 = (struct aead_chacha20_poly1305_iv *)iv;
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aead_chacha20_poly1305_iv_fill(chacha20_poly1305,
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ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CBC:
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case ALGO_TYPE_3DES_CBC:
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copy_iv(iv, ivp, sa->iv_len);
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@ -175,6 +215,8 @@ inb_pkt_xprepare(const struct rte_ipsec_sa *sa, rte_be64_t sqc,
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const union sym_op_data *icv)
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{
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struct aead_gcm_aad *aad;
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struct aead_ccm_aad *caad;
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struct aead_chacha20_poly1305_aad *chacha_aad;
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/* insert SQN.hi between ESP trailer and ICV */
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if (sa->sqh_len != 0)
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@ -184,9 +226,27 @@ inb_pkt_xprepare(const struct rte_ipsec_sa *sa, rte_be64_t sqc,
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* fill AAD fields, if any (aad fields are placed after icv),
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* right now we support only one AEAD algorithm: AES-GCM.
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*/
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if (sa->aad_len != 0) {
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aad = (struct aead_gcm_aad *)(icv->va + sa->icv_len);
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aead_gcm_aad_fill(aad, sa->spi, sqc, IS_ESN(sa));
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switch (sa->algo_type) {
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case ALGO_TYPE_AES_GCM:
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if (sa->aad_len != 0) {
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aad = (struct aead_gcm_aad *)(icv->va + sa->icv_len);
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aead_gcm_aad_fill(aad, sa->spi, sqc, IS_ESN(sa));
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}
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break;
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case ALGO_TYPE_AES_CCM:
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if (sa->aad_len != 0) {
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caad = (struct aead_ccm_aad *)(icv->va + sa->icv_len);
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aead_ccm_aad_fill(caad, sa->spi, sqc, IS_ESN(sa));
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}
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break;
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case ALGO_TYPE_CHACHA20_POLY1305:
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if (sa->aad_len != 0) {
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chacha_aad = (struct aead_chacha20_poly1305_aad *)
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(icv->va + sa->icv_len);
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aead_chacha20_poly1305_aad_fill(chacha_aad,
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sa->spi, sqc, IS_ESN(sa));
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}
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break;
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}
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}
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@ -63,6 +63,8 @@ outb_cop_prepare(struct rte_crypto_op *cop,
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{
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struct rte_crypto_sym_op *sop;
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struct aead_gcm_iv *gcm;
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struct aead_ccm_iv *ccm;
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struct aead_chacha20_poly1305_iv *chacha20_poly1305;
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struct aesctr_cnt_blk *ctr;
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uint32_t algo;
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@ -80,6 +82,15 @@ outb_cop_prepare(struct rte_crypto_op *cop,
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/* NULL case */
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sop_ciph_auth_prepare(sop, sa, icv, hlen, plen);
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break;
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case ALGO_TYPE_AES_GMAC:
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/* GMAC case */
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sop_ciph_auth_prepare(sop, sa, icv, hlen, plen);
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/* fill AAD IV (located inside crypto op) */
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gcm = rte_crypto_op_ctod_offset(cop, struct aead_gcm_iv *,
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sa->iv_ofs);
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aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_GCM:
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/* AEAD (AES_GCM) case */
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sop_aead_prepare(sop, sa, icv, hlen, plen);
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@ -89,6 +100,26 @@ outb_cop_prepare(struct rte_crypto_op *cop,
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sa->iv_ofs);
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aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CCM:
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/* AEAD (AES_CCM) case */
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sop_aead_prepare(sop, sa, icv, hlen, plen);
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/* fill AAD IV (located inside crypto op) */
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ccm = rte_crypto_op_ctod_offset(cop, struct aead_ccm_iv *,
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sa->iv_ofs);
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aead_ccm_iv_fill(ccm, ivp[0], sa->salt);
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break;
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case ALGO_TYPE_CHACHA20_POLY1305:
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/* AEAD (CHACHA20_POLY) case */
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sop_aead_prepare(sop, sa, icv, hlen, plen);
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/* fill AAD IV (located inside crypto op) */
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chacha20_poly1305 = rte_crypto_op_ctod_offset(cop,
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struct aead_chacha20_poly1305_iv *,
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sa->iv_ofs);
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aead_chacha20_poly1305_iv_fill(chacha20_poly1305,
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ivp[0], sa->salt);
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break;
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case ALGO_TYPE_AES_CTR:
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/* Cipher-Auth (AES-CTR *) case */
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sop_ciph_auth_prepare(sop, sa, icv, hlen, plen);
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@ -196,7 +227,9 @@ outb_pkt_xprepare(const struct rte_ipsec_sa *sa, rte_be64_t sqc,
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const union sym_op_data *icv)
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{
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uint32_t *psqh;
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struct aead_gcm_aad *aad;
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struct aead_gcm_aad *gaad;
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struct aead_ccm_aad *caad;
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struct aead_chacha20_poly1305_aad *chacha20_poly1305_aad;
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/* insert SQN.hi between ESP trailer and ICV */
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if (sa->sqh_len != 0) {
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@ -208,9 +241,29 @@ outb_pkt_xprepare(const struct rte_ipsec_sa *sa, rte_be64_t sqc,
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* fill IV and AAD fields, if any (aad fields are placed after icv),
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* right now we support only one AEAD algorithm: AES-GCM .
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*/
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switch (sa->algo_type) {
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case ALGO_TYPE_AES_GCM:
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if (sa->aad_len != 0) {
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aad = (struct aead_gcm_aad *)(icv->va + sa->icv_len);
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aead_gcm_aad_fill(aad, sa->spi, sqc, IS_ESN(sa));
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gaad = (struct aead_gcm_aad *)(icv->va + sa->icv_len);
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aead_gcm_aad_fill(gaad, sa->spi, sqc, IS_ESN(sa));
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}
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break;
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case ALGO_TYPE_AES_CCM:
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if (sa->aad_len != 0) {
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caad = (struct aead_ccm_aad *)(icv->va + sa->icv_len);
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aead_ccm_aad_fill(caad, sa->spi, sqc, IS_ESN(sa));
|
||||
}
|
||||
break;
|
||||
case ALGO_TYPE_CHACHA20_POLY1305:
|
||||
if (sa->aad_len != 0) {
|
||||
chacha20_poly1305_aad = (struct aead_chacha20_poly1305_aad *)
|
||||
(icv->va + sa->icv_len);
|
||||
aead_chacha20_poly1305_aad_fill(chacha20_poly1305_aad,
|
||||
sa->spi, sqc, IS_ESN(sa));
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -418,6 +471,8 @@ outb_cpu_crypto_prepare(const struct rte_ipsec_sa *sa, uint32_t *pofs,
|
||||
{
|
||||
uint64_t *ivp = iv;
|
||||
struct aead_gcm_iv *gcm;
|
||||
struct aead_ccm_iv *ccm;
|
||||
struct aead_chacha20_poly1305_iv *chacha20_poly1305;
|
||||
struct aesctr_cnt_blk *ctr;
|
||||
uint32_t clen;
|
||||
|
||||
@ -426,6 +481,15 @@ outb_cpu_crypto_prepare(const struct rte_ipsec_sa *sa, uint32_t *pofs,
|
||||
gcm = iv;
|
||||
aead_gcm_iv_fill(gcm, ivp[0], sa->salt);
|
||||
break;
|
||||
case ALGO_TYPE_AES_CCM:
|
||||
ccm = iv;
|
||||
aead_ccm_iv_fill(ccm, ivp[0], sa->salt);
|
||||
break;
|
||||
case ALGO_TYPE_CHACHA20_POLY1305:
|
||||
chacha20_poly1305 = iv;
|
||||
aead_chacha20_poly1305_iv_fill(chacha20_poly1305,
|
||||
ivp[0], sa->salt);
|
||||
break;
|
||||
case ALGO_TYPE_AES_CTR:
|
||||
ctr = iv;
|
||||
aes_ctr_cnt_blk_fill(ctr, ivp[0], sa->salt);
|
||||
|
@ -47,6 +47,15 @@ fill_crypto_xform(struct crypto_xform *xform, uint64_t type,
|
||||
if (xfn != NULL)
|
||||
return -EINVAL;
|
||||
xform->aead = &xf->aead;
|
||||
|
||||
/* GMAC has only auth */
|
||||
} else if (xf->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
|
||||
xf->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) {
|
||||
if (xfn != NULL)
|
||||
return -EINVAL;
|
||||
xform->auth = &xf->auth;
|
||||
xform->cipher = &xfn->cipher;
|
||||
|
||||
/*
|
||||
* CIPHER+AUTH xforms are expected in strict order,
|
||||
* depending on SA direction:
|
||||
@ -247,12 +256,13 @@ esp_inb_init(struct rte_ipsec_sa *sa)
|
||||
sa->ctp.cipher.length = sa->icv_len + sa->ctp.cipher.offset;
|
||||
|
||||
/*
|
||||
* for AEAD and NULL algorithms we can assume that
|
||||
* for AEAD algorithms we can assume that
|
||||
* auth and cipher offsets would be equal.
|
||||
*/
|
||||
switch (sa->algo_type) {
|
||||
case ALGO_TYPE_AES_GCM:
|
||||
case ALGO_TYPE_NULL:
|
||||
case ALGO_TYPE_AES_CCM:
|
||||
case ALGO_TYPE_CHACHA20_POLY1305:
|
||||
sa->ctp.auth.raw = sa->ctp.cipher.raw;
|
||||
break;
|
||||
default:
|
||||
@ -294,6 +304,8 @@ esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen)
|
||||
|
||||
switch (algo_type) {
|
||||
case ALGO_TYPE_AES_GCM:
|
||||
case ALGO_TYPE_AES_CCM:
|
||||
case ALGO_TYPE_CHACHA20_POLY1305:
|
||||
case ALGO_TYPE_AES_CTR:
|
||||
case ALGO_TYPE_NULL:
|
||||
sa->ctp.cipher.offset = hlen + sizeof(struct rte_esp_hdr) +
|
||||
@ -305,15 +317,20 @@ esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen)
|
||||
sa->ctp.cipher.offset = hlen + sizeof(struct rte_esp_hdr);
|
||||
sa->ctp.cipher.length = sa->iv_len;
|
||||
break;
|
||||
case ALGO_TYPE_AES_GMAC:
|
||||
sa->ctp.cipher.offset = 0;
|
||||
sa->ctp.cipher.length = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* for AEAD and NULL algorithms we can assume that
|
||||
* for AEAD algorithms we can assume that
|
||||
* auth and cipher offsets would be equal.
|
||||
*/
|
||||
switch (algo_type) {
|
||||
case ALGO_TYPE_AES_GCM:
|
||||
case ALGO_TYPE_NULL:
|
||||
case ALGO_TYPE_AES_CCM:
|
||||
case ALGO_TYPE_CHACHA20_POLY1305:
|
||||
sa->ctp.auth.raw = sa->ctp.cipher.raw;
|
||||
break;
|
||||
default:
|
||||
@ -374,13 +391,39 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct rte_ipsec_sa_prm *prm,
|
||||
sa->pad_align = IPSEC_PAD_AES_GCM;
|
||||
sa->algo_type = ALGO_TYPE_AES_GCM;
|
||||
break;
|
||||
case RTE_CRYPTO_AEAD_AES_CCM:
|
||||
/* RFC 4309 */
|
||||
sa->aad_len = sizeof(struct aead_ccm_aad);
|
||||
sa->icv_len = cxf->aead->digest_length;
|
||||
sa->iv_ofs = cxf->aead->iv.offset;
|
||||
sa->iv_len = sizeof(uint64_t);
|
||||
sa->pad_align = IPSEC_PAD_AES_CCM;
|
||||
sa->algo_type = ALGO_TYPE_AES_CCM;
|
||||
break;
|
||||
case RTE_CRYPTO_AEAD_CHACHA20_POLY1305:
|
||||
/* RFC 7634 & 8439*/
|
||||
sa->aad_len = sizeof(struct aead_chacha20_poly1305_aad);
|
||||
sa->icv_len = cxf->aead->digest_length;
|
||||
sa->iv_ofs = cxf->aead->iv.offset;
|
||||
sa->iv_len = sizeof(uint64_t);
|
||||
sa->pad_align = IPSEC_PAD_CHACHA20_POLY1305;
|
||||
sa->algo_type = ALGO_TYPE_CHACHA20_POLY1305;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
} else if (cxf->auth->algo == RTE_CRYPTO_AUTH_AES_GMAC) {
|
||||
/* RFC 4543 */
|
||||
/* AES-GMAC is a special case of auth that needs IV */
|
||||
sa->pad_align = IPSEC_PAD_AES_GMAC;
|
||||
sa->iv_len = sizeof(uint64_t);
|
||||
sa->icv_len = cxf->auth->digest_length;
|
||||
sa->iv_ofs = cxf->auth->iv.offset;
|
||||
sa->algo_type = ALGO_TYPE_AES_GMAC;
|
||||
|
||||
} else {
|
||||
sa->icv_len = cxf->auth->digest_length;
|
||||
sa->iv_ofs = cxf->cipher->iv.offset;
|
||||
sa->sqh_len = IS_ESN(sa) ? sizeof(uint32_t) : 0;
|
||||
|
||||
switch (cxf->cipher->algo) {
|
||||
case RTE_CRYPTO_CIPHER_NULL:
|
||||
@ -414,6 +457,7 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct rte_ipsec_sa_prm *prm,
|
||||
}
|
||||
}
|
||||
|
||||
sa->sqh_len = IS_ESN(sa) ? sizeof(uint32_t) : 0;
|
||||
sa->udata = prm->userdata;
|
||||
sa->spi = rte_cpu_to_be_32(prm->ipsec_xform.spi);
|
||||
sa->salt = prm->ipsec_xform.salt;
|
||||
|
@ -19,7 +19,10 @@ enum {
|
||||
IPSEC_PAD_AES_CBC = IPSEC_MAX_IV_SIZE,
|
||||
IPSEC_PAD_AES_CTR = IPSEC_PAD_DEFAULT,
|
||||
IPSEC_PAD_AES_GCM = IPSEC_PAD_DEFAULT,
|
||||
IPSEC_PAD_AES_CCM = IPSEC_PAD_DEFAULT,
|
||||
IPSEC_PAD_CHACHA20_POLY1305 = IPSEC_PAD_DEFAULT,
|
||||
IPSEC_PAD_NULL = IPSEC_PAD_DEFAULT,
|
||||
IPSEC_PAD_AES_GMAC = IPSEC_PAD_DEFAULT,
|
||||
};
|
||||
|
||||
/* iv sizes for different algorithms */
|
||||
@ -67,6 +70,9 @@ enum sa_algo_type {
|
||||
ALGO_TYPE_AES_CBC,
|
||||
ALGO_TYPE_AES_CTR,
|
||||
ALGO_TYPE_AES_GCM,
|
||||
ALGO_TYPE_AES_CCM,
|
||||
ALGO_TYPE_CHACHA20_POLY1305,
|
||||
ALGO_TYPE_AES_GMAC,
|
||||
ALGO_TYPE_MAX
|
||||
};
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user