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net/octeontx2: support Rx

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Add Rx burst support.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
This commit is contained in:
Jerin Jacob 2019-06-02 15:02:02 +05:30 committed by Ferruh Yigit
parent 4d9f5b8adc
commit cc4d7693f2
6 changed files with 380 additions and 7 deletions
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1
drivers/net/octeontx2/Makefile
View File

@ -31,6 +31,7 @@ LIBABIVER := 1
# all source are stored in SRCS-y
#
SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_rx.c \
otx2_tm.c \
otx2_rss.c \
otx2_mac.c \

2
drivers/net/octeontx2/meson.build
View File

@ -2,7 +2,7 @@
# Copyright(C) 2019 Marvell International Ltd.
#
sources = files(
sources = files('otx2_rx.c',
'otx2_tm.c',
'otx2_rss.c',
'otx2_mac.c',

6
drivers/net/octeontx2/otx2_ethdev.c
View File

@ -14,12 +14,6 @@
#include "otx2_ethdev.h"
static inline void
otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
{
RTE_SET_USED(eth_dev);
}
static inline void
otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)
{

2
drivers/net/octeontx2/otx2_ethdev.h
View File

@ -280,6 +280,7 @@ struct otx2_eth_dev {
struct otx2_eth_qconf *tx_qconf;
struct otx2_eth_qconf *rx_qconf;
struct rte_eth_dev *eth_dev;
eth_rx_burst_t rx_pkt_burst_no_offload;
/* PTP counters */
bool ptp_en;
struct otx2_timesync_info tstamp;
@ -482,6 +483,7 @@ int otx2_ethdev_parse_devargs(struct rte_devargs *devargs,
struct otx2_eth_dev *dev);
/* Rx and Tx routines */
void otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev);
void otx2_nix_form_default_desc(struct otx2_eth_txq *txq);
/* Timesync - PTP routines */

129
drivers/net/octeontx2/otx2_rx.c Normal file
View File

@ -0,0 +1,129 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(C) 2019 Marvell International Ltd.
*/
#include <rte_vect.h>
#include "otx2_ethdev.h"
#include "otx2_rx.h"
#define NIX_DESCS_PER_LOOP 4
#define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
#define CQE_SZ(x) ((x) * NIX_CQ_ENTRY_SZ)
static inline uint16_t
nix_rx_nb_pkts(struct otx2_eth_rxq *rxq, const uint64_t wdata,
const uint16_t pkts, const uint32_t qmask)
{
uint32_t available = rxq->available;
/* Update the available count if cached value is not enough */
if (unlikely(available < pkts)) {
uint64_t reg, head, tail;
/* Use LDADDA version to avoid reorder */
reg = otx2_atomic64_add_sync(wdata, rxq->cq_status);
/* CQ_OP_STATUS operation error */
if (reg & BIT_ULL(CQ_OP_STAT_OP_ERR) ||
reg & BIT_ULL(CQ_OP_STAT_CQ_ERR))
return 0;
tail = reg & 0xFFFFF;
head = (reg >> 20) & 0xFFFFF;
if (tail < head)
available = tail - head + qmask + 1;
else
available = tail - head;
rxq->available = available;
}
return RTE_MIN(pkts, available);
}
static __rte_always_inline uint16_t
nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t pkts, const uint16_t flags)
{
struct otx2_eth_rxq *rxq = rx_queue;
const uint64_t mbuf_init = rxq->mbuf_initializer;
const void *lookup_mem = rxq->lookup_mem;
const uint64_t data_off = rxq->data_off;
const uintptr_t desc = rxq->desc;
const uint64_t wdata = rxq->wdata;
const uint32_t qmask = rxq->qmask;
uint16_t packets = 0, nb_pkts;
uint32_t head = rxq->head;
struct nix_cqe_hdr_s *cq;
struct rte_mbuf *mbuf;
nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
while (packets < nb_pkts) {
/* Prefetch N desc ahead */
rte_prefetch_non_temporal((void *)(desc + (CQE_SZ(head + 2))));
cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
mbuf = nix_get_mbuf_from_cqe(cq, data_off);
otx2_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
flags);
otx2_nix_mbuf_to_tstamp(mbuf, rxq->tstamp, flags);
rx_pkts[packets++] = mbuf;
otx2_prefetch_store_keep(mbuf);
head++;
head &= qmask;
}
rxq->head = head;
rxq->available -= nb_pkts;
/* Free all the CQs that we've processed */
otx2_write64((wdata | nb_pkts), rxq->cq_door);
return nb_pkts;
}
#define R(name, f5, f4, f3, f2, f1, f0, flags) \
static uint16_t __rte_noinline __hot \
otx2_nix_recv_pkts_ ## name(void *rx_queue, \
struct rte_mbuf **rx_pkts, uint16_t pkts) \
{ \
return nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \
} \
NIX_RX_FASTPATH_MODES
#undef R
static inline void
pick_rx_func(struct rte_eth_dev *eth_dev,
const eth_rx_burst_t rx_burst[2][2][2][2][2][2])
{
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
/* [TSTMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
eth_dev->rx_pkt_burst = rx_burst
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_CHECKSUM_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_RSS_F)];
}
void
otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
{
const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {
#define R(name, f5, f4, f3, f2, f1, f0, flags) \
[f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_ ## name,
NIX_RX_FASTPATH_MODES
#undef R
};
pick_rx_func(eth_dev, nix_eth_rx_burst);
rte_mb();
}

247
drivers/net/octeontx2/otx2_rx.h
View File

@ -15,7 +15,10 @@
PTYPE_TUNNEL_ARRAY_SZ) *\
sizeof(uint16_t))
#define NIX_RX_OFFLOAD_NONE (0)
#define NIX_RX_OFFLOAD_RSS_F BIT(0)
#define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
#define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
#define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(3)
#define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4)
#define NIX_RX_OFFLOAD_TSTAMP_F BIT(5)
@ -30,4 +33,248 @@ struct otx2_timesync_info {
uint8_t rx_ready;
} __rte_cache_aligned;
union mbuf_initializer {
struct {
uint16_t data_off;
uint16_t refcnt;
uint16_t nb_segs;
uint16_t port;
} fields;
uint64_t value;
};
static __rte_always_inline void
otx2_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
struct otx2_timesync_info *tstamp, const uint16_t flag)
{
if ((flag & NIX_RX_OFFLOAD_TSTAMP_F) &&
mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC &&
(mbuf->data_off == RTE_PKTMBUF_HEADROOM +
NIX_TIMESYNC_RX_OFFSET)) {
uint64_t *tstamp_ptr;
/* Deal with rx timestamp */
tstamp_ptr = rte_pktmbuf_mtod_offset(mbuf, uint64_t *,
-NIX_TIMESYNC_RX_OFFSET);
mbuf->timestamp = rte_be_to_cpu_64(*tstamp_ptr);
tstamp->rx_tstamp = mbuf->timestamp;
tstamp->rx_ready = 1;
mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST
| PKT_RX_TIMESTAMP;
}
}
static __rte_always_inline uint64_t
nix_clear_data_off(uint64_t oldval)
{
union mbuf_initializer mbuf_init = { .value = oldval };
mbuf_init.fields.data_off = 0;
return mbuf_init.value;
}
static __rte_always_inline struct rte_mbuf *
nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
{
rte_iova_t buff;
/* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
buff = *((rte_iova_t *)((uint64_t *)cq + 9));
return (struct rte_mbuf *)(buff - data_off);
}
static __rte_always_inline uint32_t
nix_ptype_get(const void * const lookup_mem, const uint64_t in)
{
const uint16_t * const ptype = lookup_mem;
const uint16_t lg_lf_le = (in & 0xFFF000000000000) >> 48;
const uint16_t tu_l2 = ptype[(in & 0x000FFF000000000) >> 36];
const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lg_lf_le];
return (il4_tu << PTYPE_WIDTH) | tu_l2;
}
static __rte_always_inline uint32_t
nix_rx_olflags_get(const void * const lookup_mem, const uint64_t in)
{
const uint32_t * const ol_flags = (const uint32_t *)
((const uint8_t *)lookup_mem + PTYPE_ARRAY_SZ);
return ol_flags[(in & 0xfff00000) >> 20];
}
static inline uint64_t
nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
struct rte_mbuf *mbuf)
{
/* There is no separate bit to check match_id
* is valid or not? and no flag to identify it is an
* RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
* action. The former case addressed through 0 being invalid
* value and inc/dec match_id pair when MARK is activated.
* The later case addressed through defining
* OTX2_FLOW_MARK_DEFAULT as value for
* RTE_FLOW_ACTION_TYPE_MARK.
* This would translate to not use
* OTX2_FLOW_ACTION_FLAG_DEFAULT - 1 and
* OTX2_FLOW_ACTION_FLAG_DEFAULT for match_id.
* i.e valid mark_id's are from
* 0 to OTX2_FLOW_ACTION_FLAG_DEFAULT - 2
*/
if (likely(match_id)) {
ol_flags |= PKT_RX_FDIR;
if (match_id != OTX2_FLOW_ACTION_FLAG_DEFAULT) {
ol_flags |= PKT_RX_FDIR_ID;
mbuf->hash.fdir.hi = match_id - 1;
}
}
return ol_flags;
}
static __rte_always_inline void
otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
struct rte_mbuf *mbuf, const void *lookup_mem,
const uint64_t val, const uint16_t flag)
{
const struct nix_rx_parse_s *rx =
(const struct nix_rx_parse_s *)((const uint64_t *)cq + 1);
const uint64_t w1 = *(const uint64_t *)rx;
const uint16_t len = rx->pkt_lenm1 + 1;
uint64_t ol_flags = 0;
/* Mark mempool obj as "get" as it is alloc'ed by NIX */
__mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
if (flag & NIX_RX_OFFLOAD_PTYPE_F)
mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
else
mbuf->packet_type = 0;
if (flag & NIX_RX_OFFLOAD_RSS_F) {
mbuf->hash.rss = tag;
ol_flags |= PKT_RX_RSS_HASH;
}
if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
if (rx->vtag0_gone) {
ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
mbuf->vlan_tci = rx->vtag0_tci;
}
if (rx->vtag1_gone) {
ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
mbuf->vlan_tci_outer = rx->vtag1_tci;
}
}
if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
mbuf->ol_flags = ol_flags;
*(uint64_t *)(&mbuf->rearm_data) = val;
mbuf->pkt_len = len;
mbuf->data_len = len;
}
#define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
#define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
#define RSS_F NIX_RX_OFFLOAD_RSS_F
#define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
#define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
#define TS_F NIX_RX_OFFLOAD_TSTAMP_F
/* [TSMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
#define NIX_RX_FASTPATH_MODES \
R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F)\
R(vlan, 0, 0, 1, 0, 0, 0, RX_VLAN_F) \
R(vlan_rss, 0, 0, 1, 0, 0, 1, RX_VLAN_F | RSS_F) \
R(vlan_ptype, 0, 0, 1, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
R(vlan_ptype_rss, 0, 0, 1, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F)\
R(vlan_cksum, 0, 0, 1, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
R(vlan_cksum_rss, 0, 0, 1, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F)\
R(vlan_cksum_ptype, 0, 0, 1, 1, 1, 0, \
RX_VLAN_F | CKSUM_F | PTYPE_F) \
R(vlan_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
R(mark, 0, 1, 0, 0, 0, 0, MARK_F) \
R(mark_rss, 0, 1, 0, 0, 0, 1, MARK_F | RSS_F) \
R(mark_ptype, 0, 1, 0, 0, 1, 0, MARK_F | PTYPE_F) \
R(mark_ptype_rss, 0, 1, 0, 0, 1, 1, MARK_F | PTYPE_F | RSS_F)\
R(mark_cksum, 0, 1, 0, 1, 0, 0, MARK_F | CKSUM_F) \
R(mark_cksum_rss, 0, 1, 0, 1, 0, 1, MARK_F | CKSUM_F | RSS_F)\
R(mark_cksum_ptype, 0, 1, 0, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\
R(mark_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
R(mark_vlan, 0, 1, 1, 0, 0, 0, MARK_F | RX_VLAN_F) \
R(mark_vlan_rss, 0, 1, 1, 0, 0, 1, MARK_F | RX_VLAN_F | RSS_F)\
R(mark_vlan_ptype, 0, 1, 1, 0, 1, 0, \
MARK_F | RX_VLAN_F | PTYPE_F) \
R(mark_vlan_ptype_rss, 0, 1, 1, 0, 1, 1, \
MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
R(mark_vlan_cksum, 0, 1, 1, 1, 0, 0, \
MARK_F | RX_VLAN_F | CKSUM_F) \
R(mark_vlan_cksum_rss, 0, 1, 1, 1, 0, 1, \
MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
R(mark_vlan_cksum_ptype, 0, 1, 1, 1, 1, 0, \
MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
R(mark_vlan_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
R(ts, 1, 0, 0, 0, 0, 0, TS_F) \
R(ts_rss, 1, 0, 0, 0, 0, 1, TS_F | RSS_F) \
R(ts_ptype, 1, 0, 0, 0, 1, 0, TS_F | PTYPE_F) \
R(ts_ptype_rss, 1, 0, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F)\
R(ts_cksum, 1, 0, 0, 1, 0, 0, TS_F | CKSUM_F) \
R(ts_cksum_rss, 1, 0, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F)\
R(ts_cksum_ptype, 1, 0, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F)\
R(ts_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
TS_F | CKSUM_F | PTYPE_F | RSS_F) \
R(ts_vlan, 1, 0, 1, 0, 0, 0, TS_F | RX_VLAN_F) \
R(ts_vlan_rss, 1, 0, 1, 0, 0, 1, TS_F | RX_VLAN_F | RSS_F)\
R(ts_vlan_ptype, 1, 0, 1, 0, 1, 0, TS_F | RX_VLAN_F | PTYPE_F)\
R(ts_vlan_ptype_rss, 1, 0, 1, 0, 1, 1, \
TS_F | RX_VLAN_F | PTYPE_F | RSS_F) \
R(ts_vlan_cksum, 1, 0, 1, 1, 0, 0, \
TS_F | RX_VLAN_F | CKSUM_F) \
R(ts_vlan_cksum_rss, 1, 0, 1, 1, 0, 1, \
MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
R(ts_vlan_cksum_ptype, 1, 0, 1, 1, 1, 0, \
TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
R(ts_vlan_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
R(ts_mark, 1, 1, 0, 0, 0, 0, TS_F | MARK_F) \
R(ts_mark_rss, 1, 1, 0, 0, 0, 1, TS_F | MARK_F | RSS_F)\
R(ts_mark_ptype, 1, 1, 0, 0, 1, 0, TS_F | MARK_F | PTYPE_F)\
R(ts_mark_ptype_rss, 1, 1, 0, 0, 1, 1, \
TS_F | MARK_F | PTYPE_F | RSS_F) \
R(ts_mark_cksum, 1, 1, 0, 1, 0, 0, TS_F | MARK_F | CKSUM_F)\
R(ts_mark_cksum_rss, 1, 1, 0, 1, 0, 1, \
TS_F | MARK_F | CKSUM_F | RSS_F)\
R(ts_mark_cksum_ptype, 1, 1, 0, 1, 1, 0, \
TS_F | MARK_F | CKSUM_F | PTYPE_F) \
R(ts_mark_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
R(ts_mark_vlan, 1, 1, 1, 0, 0, 0, TS_F | MARK_F | RX_VLAN_F)\
R(ts_mark_vlan_rss, 1, 1, 1, 0, 0, 1, \
TS_F | MARK_F | RX_VLAN_F | RSS_F)\
R(ts_mark_vlan_ptype, 1, 1, 1, 0, 1, 0, \
TS_F | MARK_F | RX_VLAN_F | PTYPE_F) \
R(ts_mark_vlan_ptype_rss, 1, 1, 1, 0, 1, 1, \
TS_F | MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
R(ts_mark_vlan_cksum_ptype, 1, 1, 1, 1, 1, 0, \
TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
R(ts_mark_vlan_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)
#endif /* __OTX2_RX_H__ */