net/ark: provide API for hardware modules UDM and DDM
Provide C-level interface for Arkville's internal HW resources DDM (Downstream Data Mover) and UDM (Upstream Data Mover) modules Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
This commit is contained in:
Ed Czeck
Ferruh Yigit
parent
b33ccdb17f
commit
cf18d4def2
@ -46,10 +46,12 @@ LIBABIVER := 1
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#
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# all source are stored in SRCS-y
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#
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_ddm.c
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_ethdev.c
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_mpu.c
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_pktdir.c
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_rqp.c
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SRCS-$(CONFIG_RTE_LIBRTE_ARK_PMD) += ark_udm.c
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# this lib depends upon:
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LDLIBS += -lpthread
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151
drivers/net/ark/ark_ddm.c
Normal file
151
drivers/net/ark/ark_ddm.c
Normal file
@ -0,0 +1,151 @@
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/*-
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* BSD LICENSE
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*
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* Copyright (c) 2015-2017 Atomic Rules LLC
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <unistd.h>
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#include "ark_logs.h"
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#include "ark_ddm.h"
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/* ************************************************************************* */
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int
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ark_ddm_verify(struct ark_ddm_t *ddm)
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{
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if (sizeof(struct ark_ddm_t) != ARK_DDM_EXPECTED_SIZE) {
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PMD_DRV_LOG(ERR, "ARK: DDM structure looks incorrect %d vs %zd\n",
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ARK_DDM_EXPECTED_SIZE, sizeof(struct ark_ddm_t));
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return -1;
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}
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if (ddm->cfg.const0 != ARK_DDM_CONST) {
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PMD_DRV_LOG(ERR, "ARK: DDM module not found as expected 0x%08x\n",
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ddm->cfg.const0);
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return -1;
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}
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return 0;
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}
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void
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ark_ddm_start(struct ark_ddm_t *ddm)
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{
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ddm->cfg.command = 1;
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}
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int
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ark_ddm_stop(struct ark_ddm_t *ddm, const int wait)
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{
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int cnt = 0;
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ddm->cfg.command = 2;
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while (wait && (ddm->cfg.stop_flushed & 0x01) == 0) {
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if (cnt++ > 1000)
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return 1;
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usleep(10);
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}
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return 0;
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}
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void
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ark_ddm_reset(struct ark_ddm_t *ddm)
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{
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int status;
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/* reset only works if ddm has stopped properly. */
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status = ark_ddm_stop(ddm, 1);
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if (status != 0) {
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PMD_DEBUG_LOG(INFO, "%s stop failed doing forced reset\n",
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__func__);
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ddm->cfg.command = 4;
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usleep(10);
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}
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ddm->cfg.command = 3;
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}
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void
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ark_ddm_setup(struct ark_ddm_t *ddm, phys_addr_t cons_addr, uint32_t interval)
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{
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ddm->setup.cons_write_index_addr = cons_addr;
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ddm->setup.write_index_interval = interval / 4; /* 4 ns period */
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}
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void
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ark_ddm_stats_reset(struct ark_ddm_t *ddm)
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{
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ddm->cfg.tlp_stats_clear = 1;
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}
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void
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ark_ddm_dump(struct ark_ddm_t *ddm, const char *msg)
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{
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PMD_FUNC_LOG(DEBUG, "%s Stopped: %d\n", msg,
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ark_ddm_is_stopped(ddm)
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);
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}
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void
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ark_ddm_dump_stats(struct ark_ddm_t *ddm, const char *msg)
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{
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struct ark_ddm_stats_t *stats = &ddm->stats;
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PMD_STATS_LOG(INFO, "DDM Stats: %s"
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ARK_SU64 ARK_SU64 ARK_SU64
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"\n", msg,
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"Bytes:", stats->tx_byte_count,
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"Packets:", stats->tx_pkt_count,
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"MBufs", stats->tx_mbuf_count);
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}
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int
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ark_ddm_is_stopped(struct ark_ddm_t *ddm)
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{
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return (ddm->cfg.stop_flushed & 0x01) != 0;
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}
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uint64_t
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ark_ddm_queue_byte_count(struct ark_ddm_t *ddm)
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{
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return ddm->queue_stats.byte_count;
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}
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uint64_t
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ark_ddm_queue_pkt_count(struct ark_ddm_t *ddm)
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{
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return ddm->queue_stats.pkt_count;
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}
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void
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ark_ddm_queue_reset_stats(struct ark_ddm_t *ddm)
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{
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ddm->queue_stats.byte_count = 1;
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}
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177
drivers/net/ark/ark_ddm.h
Normal file
177
drivers/net/ark/ark_ddm.h
Normal file
@ -0,0 +1,177 @@
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/*-
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* BSD LICENSE
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*
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* Copyright (c) 2015-2017 Atomic Rules LLC
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARK_DDM_H_
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#define _ARK_DDM_H_
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#include <stdint.h>
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#include <rte_memory.h>
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/* The DDM or Downstream Data Mover is an internal Arkville hardware
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* module for moving packet from host memory to the TX packet streams.
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* This module is *not* intended for end-user manipulation, hence
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* there is minimal documentation.
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*/
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/* struct defining Tx meta data -- fixed in FPGA -- 16 bytes */
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struct ark_tx_meta {
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uint64_t physaddr;
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uint32_t delta_ns;
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uint16_t data_len; /* of this MBUF */
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#define ARK_DDM_EOP 0x01
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#define ARK_DDM_SOP 0x02
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uint8_t flags; /* bit 0 indicates last mbuf in chain. */
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uint8_t reserved[1];
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};
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/*
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* DDM core hardware structures
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* These are overlay structures to a memory mapped FPGA device. These
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* structs will never be instantiated in ram memory
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*/
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#define ARK_DDM_CFG 0x0000
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#define ARK_DDM_CONST 0xfacecafe
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struct ark_ddm_cfg_t {
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uint32_t r0;
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volatile uint32_t tlp_stats_clear;
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uint32_t const0;
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volatile uint32_t tag_max;
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volatile uint32_t command;
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volatile uint32_t stop_flushed;
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};
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#define ARK_DDM_STATS 0x0020
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struct ark_ddm_stats_t {
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volatile uint64_t tx_byte_count;
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volatile uint64_t tx_pkt_count;
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volatile uint64_t tx_mbuf_count;
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};
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#define ARK_DDM_MRDQ 0x0040
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struct ark_ddm_mrdq_t {
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volatile uint32_t mrd_q1;
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volatile uint32_t mrd_q2;
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volatile uint32_t mrd_q3;
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volatile uint32_t mrd_q4;
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volatile uint32_t mrd_full;
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};
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#define ARK_DDM_CPLDQ 0x0068
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struct ark_ddm_cpldq_t {
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volatile uint32_t cpld_q1;
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volatile uint32_t cpld_q2;
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volatile uint32_t cpld_q3;
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volatile uint32_t cpld_q4;
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volatile uint32_t cpld_full;
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};
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#define ARK_DDM_MRD_PS 0x0090
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struct ark_ddm_mrd_ps_t {
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volatile uint32_t mrd_ps_min;
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volatile uint32_t mrd_ps_max;
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volatile uint32_t mrd_full_ps_min;
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volatile uint32_t mrd_full_ps_max;
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volatile uint32_t mrd_dw_ps_min;
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volatile uint32_t mrd_dw_ps_max;
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};
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#define ARK_DDM_QUEUE_STATS 0x00a8
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struct ark_ddm_qstats_t {
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volatile uint64_t byte_count;
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volatile uint64_t pkt_count;
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volatile uint64_t mbuf_count;
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};
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#define ARK_DDM_CPLD_PS 0x00c0
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struct ark_ddm_cpld_ps_t {
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volatile uint32_t cpld_ps_min;
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volatile uint32_t cpld_ps_max;
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volatile uint32_t cpld_full_ps_min;
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volatile uint32_t cpld_full_ps_max;
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volatile uint32_t cpld_dw_ps_min;
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volatile uint32_t cpld_dw_ps_max;
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};
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#define ARK_DDM_SETUP 0x00e0
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struct ark_ddm_setup_t {
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phys_addr_t cons_write_index_addr;
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uint32_t write_index_interval; /* 4ns each */
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volatile uint32_t cons_index;
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};
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#define ARK_DDM_EXPECTED_SIZE 256
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#define ARK_DDM_QOFFSET ARK_DDM_EXPECTED_SIZE
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/* Consolidated structure */
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struct ark_ddm_t {
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struct ark_ddm_cfg_t cfg;
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uint8_t reserved0[(ARK_DDM_STATS - ARK_DDM_CFG) -
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sizeof(struct ark_ddm_cfg_t)];
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struct ark_ddm_stats_t stats;
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uint8_t reserved1[(ARK_DDM_MRDQ - ARK_DDM_STATS) -
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sizeof(struct ark_ddm_stats_t)];
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struct ark_ddm_mrdq_t mrdq;
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uint8_t reserved2[(ARK_DDM_CPLDQ - ARK_DDM_MRDQ) -
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sizeof(struct ark_ddm_mrdq_t)];
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struct ark_ddm_cpldq_t cpldq;
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uint8_t reserved3[(ARK_DDM_MRD_PS - ARK_DDM_CPLDQ) -
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sizeof(struct ark_ddm_cpldq_t)];
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struct ark_ddm_mrd_ps_t mrd_ps;
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struct ark_ddm_qstats_t queue_stats;
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struct ark_ddm_cpld_ps_t cpld_ps;
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uint8_t reserved5[(ARK_DDM_SETUP - ARK_DDM_CPLD_PS) -
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sizeof(struct ark_ddm_cpld_ps_t)];
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struct ark_ddm_setup_t setup;
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uint8_t reserved_p[(ARK_DDM_EXPECTED_SIZE - ARK_DDM_SETUP) -
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sizeof(struct ark_ddm_setup_t)];
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};
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/* DDM function prototype */
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int ark_ddm_verify(struct ark_ddm_t *ddm);
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void ark_ddm_start(struct ark_ddm_t *ddm);
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int ark_ddm_stop(struct ark_ddm_t *ddm, const int wait);
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void ark_ddm_reset(struct ark_ddm_t *ddm);
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void ark_ddm_stats_reset(struct ark_ddm_t *ddm);
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void ark_ddm_setup(struct ark_ddm_t *ddm, phys_addr_t cons_addr,
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uint32_t interval);
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void ark_ddm_dump_stats(struct ark_ddm_t *ddm, const char *msg);
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void ark_ddm_dump(struct ark_ddm_t *ddm, const char *msg);
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int ark_ddm_is_stopped(struct ark_ddm_t *ddm);
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uint64_t ark_ddm_queue_byte_count(struct ark_ddm_t *ddm);
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uint64_t ark_ddm_queue_pkt_count(struct ark_ddm_t *ddm);
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void ark_ddm_queue_reset_stats(struct ark_ddm_t *ddm);
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#endif
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226
drivers/net/ark/ark_udm.c
Normal file
226
drivers/net/ark/ark_udm.c
Normal file
@ -0,0 +1,226 @@
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/*-
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* BSD LICENSE
|
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*
|
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* Copyright (c) 2015-2017 Atomic Rules LLC
|
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* All rights reserved.
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
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#include <unistd.h>
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#include "ark_logs.h"
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#include "ark_udm.h"
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int
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ark_udm_verify(struct ark_udm_t *udm)
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{
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if (sizeof(struct ark_udm_t) != ARK_UDM_EXPECT_SIZE) {
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PMD_DRV_LOG(ERR,
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"ARK: UDM structure looks incorrect %d vs %zd\n",
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ARK_UDM_EXPECT_SIZE, sizeof(struct ark_udm_t));
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return -1;
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}
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if (udm->setup.const0 != ARK_UDM_CONST) {
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PMD_DRV_LOG(ERR,
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"ARK: UDM module not found as expected 0x%08x\n",
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udm->setup.const0);
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return -1;
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}
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return 0;
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}
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int
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ark_udm_stop(struct ark_udm_t *udm, const int wait)
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{
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int cnt = 0;
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udm->cfg.command = 2;
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while (wait && (udm->cfg.stop_flushed & 0x01) == 0) {
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if (cnt++ > 1000)
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return 1;
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usleep(10);
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}
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return 0;
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}
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int
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ark_udm_reset(struct ark_udm_t *udm)
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{
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int status;
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status = ark_udm_stop(udm, 1);
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if (status != 0) {
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PMD_DEBUG_LOG(INFO, "%s stop failed doing forced reset\n",
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__func__);
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udm->cfg.command = 4;
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usleep(10);
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udm->cfg.command = 3;
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status = ark_udm_stop(udm, 0);
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PMD_DEBUG_LOG(INFO, "%s stop status %d post failure"
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" and forced reset\n",
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__func__, status);
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} else {
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udm->cfg.command = 3;
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}
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return status;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_start(struct ark_udm_t *udm)
|
||||
{
|
||||
udm->cfg.command = 1;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_stats_reset(struct ark_udm_t *udm)
|
||||
{
|
||||
udm->pcibp.pci_clear = 1;
|
||||
udm->tlp_ps.tlp_clear = 1;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_configure(struct ark_udm_t *udm,
|
||||
uint32_t headroom,
|
||||
uint32_t dataroom,
|
||||
uint32_t write_interval_ns)
|
||||
{
|
||||
/* headroom and data room are in DWords in the UDM */
|
||||
udm->cfg.dataroom = dataroom / 4;
|
||||
udm->cfg.headroom = headroom / 4;
|
||||
|
||||
/* 4 NS period ns */
|
||||
udm->rt_cfg.write_interval = write_interval_ns / 4;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_write_addr(struct ark_udm_t *udm, phys_addr_t addr)
|
||||
{
|
||||
udm->rt_cfg.hw_prod_addr = addr;
|
||||
}
|
||||
|
||||
int
|
||||
ark_udm_is_flushed(struct ark_udm_t *udm)
|
||||
{
|
||||
return (udm->cfg.stop_flushed & 0x01) != 0;
|
||||
}
|
||||
|
||||
uint64_t
|
||||
ark_udm_dropped(struct ark_udm_t *udm)
|
||||
{
|
||||
return udm->qstats.q_pkt_drop;
|
||||
}
|
||||
|
||||
uint64_t
|
||||
ark_udm_bytes(struct ark_udm_t *udm)
|
||||
{
|
||||
return udm->qstats.q_byte_count;
|
||||
}
|
||||
|
||||
uint64_t
|
||||
ark_udm_packets(struct ark_udm_t *udm)
|
||||
{
|
||||
return udm->qstats.q_ff_packet_count;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_dump_stats(struct ark_udm_t *udm, const char *msg)
|
||||
{
|
||||
PMD_STATS_LOG(INFO, "UDM Stats: %s"
|
||||
ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64 "\n",
|
||||
msg,
|
||||
"Pkts Received", udm->stats.rx_packet_count,
|
||||
"Pkts Finalized", udm->stats.rx_sent_packets,
|
||||
"Pkts Dropped", udm->tlp.pkt_drop,
|
||||
"Bytes Count", udm->stats.rx_byte_count,
|
||||
"MBuf Count", udm->stats.rx_mbuf_count);
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_dump_queue_stats(struct ark_udm_t *udm, const char *msg, uint16_t qid)
|
||||
{
|
||||
PMD_STATS_LOG(INFO, "UDM Queue %3u Stats: %s"
|
||||
ARK_SU64 ARK_SU64
|
||||
ARK_SU64 ARK_SU64
|
||||
ARK_SU64 "\n",
|
||||
qid, msg,
|
||||
"Pkts Received", udm->qstats.q_packet_count,
|
||||
"Pkts Finalized", udm->qstats.q_ff_packet_count,
|
||||
"Pkts Dropped", udm->qstats.q_pkt_drop,
|
||||
"Bytes Count", udm->qstats.q_byte_count,
|
||||
"MBuf Count", udm->qstats.q_mbuf_count);
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_dump(struct ark_udm_t *udm, const char *msg)
|
||||
{
|
||||
PMD_DEBUG_LOG(DEBUG, "UDM Dump: %s Stopped: %d\n", msg,
|
||||
udm->cfg.stop_flushed);
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_dump_setup(struct ark_udm_t *udm, uint16_t q_id)
|
||||
{
|
||||
PMD_DEBUG_LOG(DEBUG, "UDM Setup Q: %u"
|
||||
ARK_SU64X ARK_SU32 "\n",
|
||||
q_id,
|
||||
"hw_prod_addr", udm->rt_cfg.hw_prod_addr,
|
||||
"prod_idx", udm->rt_cfg.prod_idx);
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_dump_perf(struct ark_udm_t *udm, const char *msg)
|
||||
{
|
||||
struct ark_udm_pcibp_t *bp = &udm->pcibp;
|
||||
|
||||
PMD_STATS_LOG(INFO, "UDM Performance %s"
|
||||
ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32
|
||||
"\n",
|
||||
msg,
|
||||
"PCI Empty", bp->pci_empty,
|
||||
"PCI Q1", bp->pci_q1,
|
||||
"PCI Q2", bp->pci_q2,
|
||||
"PCI Q3", bp->pci_q3,
|
||||
"PCI Q4", bp->pci_q4,
|
||||
"PCI Full", bp->pci_full);
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_queue_stats_reset(struct ark_udm_t *udm)
|
||||
{
|
||||
udm->qstats.q_byte_count = 1;
|
||||
}
|
||||
|
||||
void
|
||||
ark_udm_queue_enable(struct ark_udm_t *udm, int enable)
|
||||
{
|
||||
udm->qstats.q_enable = enable ? 1 : 0;
|
||||
}
|
||||
192
drivers/net/ark/ark_udm.h
Normal file
192
drivers/net/ark/ark_udm.h
Normal file
@ -0,0 +1,192 @@
|
||||
/*-
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright (c) 2015-2017 Atomic Rules LLC
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _ARK_UDM_H_
|
||||
#define _ARK_UDM_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <rte_memory.h>
|
||||
|
||||
/* The UDM or Upstream Data Mover is an internal Arkville hardware
|
||||
* module for moving packet from the RX packet streams to host memory.
|
||||
* This module is *not* intended for end-user manipulation, hence
|
||||
* there is minimal documentation.
|
||||
*/
|
||||
|
||||
/* Meta data structure apssed from FPGA, must match layout in FPGA */
|
||||
struct ark_rx_meta {
|
||||
uint64_t timestamp;
|
||||
uint64_t user_data;
|
||||
uint8_t port;
|
||||
uint8_t dst_queue;
|
||||
uint16_t pkt_len;
|
||||
};
|
||||
|
||||
/*
|
||||
* UDM hardware structures
|
||||
* These are overlay structures to a memory mapped FPGA device. These
|
||||
* structs will never be instantiated in ram memory
|
||||
*/
|
||||
|
||||
#define ARK_RX_WRITE_TIME_NS 2500
|
||||
#define ARK_UDM_SETUP 0
|
||||
#define ARK_UDM_CONST 0xbACECACE
|
||||
struct ark_udm_setup_t {
|
||||
uint32_t r0;
|
||||
uint32_t r4;
|
||||
volatile uint32_t cycle_count;
|
||||
uint32_t const0;
|
||||
};
|
||||
|
||||
#define ARK_UDM_CFG 0x010
|
||||
struct ark_udm_cfg_t {
|
||||
volatile uint32_t stop_flushed; /* RO */
|
||||
volatile uint32_t command;
|
||||
uint32_t dataroom;
|
||||
uint32_t headroom;
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
ARK_UDM_START = 0x1,
|
||||
ARK_UDM_STOP = 0x2,
|
||||
ARK_UDM_RESET = 0x3
|
||||
} ark_udm_commands;
|
||||
|
||||
#define ARK_UDM_STATS 0x020
|
||||
struct ark_udm_stats_t {
|
||||
volatile uint64_t rx_byte_count;
|
||||
volatile uint64_t rx_packet_count;
|
||||
volatile uint64_t rx_mbuf_count;
|
||||
volatile uint64_t rx_sent_packets;
|
||||
};
|
||||
|
||||
#define ARK_UDM_PQ 0x040
|
||||
struct ark_udm_queue_stats_t {
|
||||
volatile uint64_t q_byte_count;
|
||||
volatile uint64_t q_packet_count; /* includes drops */
|
||||
volatile uint64_t q_mbuf_count;
|
||||
volatile uint64_t q_ff_packet_count;
|
||||
volatile uint64_t q_pkt_drop;
|
||||
uint32_t q_enable;
|
||||
};
|
||||
|
||||
#define ARK_UDM_TLP 0x0070
|
||||
struct ark_udm_tlp_t {
|
||||
volatile uint64_t pkt_drop; /* global */
|
||||
volatile uint32_t tlp_q1;
|
||||
volatile uint32_t tlp_q2;
|
||||
volatile uint32_t tlp_q3;
|
||||
volatile uint32_t tlp_q4;
|
||||
volatile uint32_t tlp_full;
|
||||
};
|
||||
|
||||
#define ARK_UDM_PCIBP 0x00a0
|
||||
struct ark_udm_pcibp_t {
|
||||
volatile uint32_t pci_clear;
|
||||
volatile uint32_t pci_empty;
|
||||
volatile uint32_t pci_q1;
|
||||
volatile uint32_t pci_q2;
|
||||
volatile uint32_t pci_q3;
|
||||
volatile uint32_t pci_q4;
|
||||
volatile uint32_t pci_full;
|
||||
};
|
||||
|
||||
#define ARK_UDM_TLP_PS 0x00bc
|
||||
struct ark_udm_tlp_ps_t {
|
||||
volatile uint32_t tlp_clear;
|
||||
volatile uint32_t tlp_ps_min;
|
||||
volatile uint32_t tlp_ps_max;
|
||||
volatile uint32_t tlp_full_ps_min;
|
||||
volatile uint32_t tlp_full_ps_max;
|
||||
volatile uint32_t tlp_dw_ps_min;
|
||||
volatile uint32_t tlp_dw_ps_max;
|
||||
volatile uint32_t tlp_pldw_ps_min;
|
||||
volatile uint32_t tlp_pldw_ps_max;
|
||||
};
|
||||
|
||||
#define ARK_UDM_RT_CFG 0x00e0
|
||||
struct ark_udm_rt_cfg_t {
|
||||
phys_addr_t hw_prod_addr;
|
||||
uint32_t write_interval; /* 4ns cycles */
|
||||
volatile uint32_t prod_idx; /* RO */
|
||||
};
|
||||
|
||||
/* Consolidated structure */
|
||||
#define ARK_UDM_EXPECT_SIZE (0x00fc + 4)
|
||||
#define ARK_UDM_QOFFSET ARK_UDM_EXPECT_SIZE
|
||||
struct ark_udm_t {
|
||||
struct ark_udm_setup_t setup;
|
||||
struct ark_udm_cfg_t cfg;
|
||||
struct ark_udm_stats_t stats;
|
||||
struct ark_udm_queue_stats_t qstats;
|
||||
uint8_t reserved1[(ARK_UDM_TLP - ARK_UDM_PQ) -
|
||||
sizeof(struct ark_udm_queue_stats_t)];
|
||||
struct ark_udm_tlp_t tlp;
|
||||
uint8_t reserved2[(ARK_UDM_PCIBP - ARK_UDM_TLP) -
|
||||
sizeof(struct ark_udm_tlp_t)];
|
||||
struct ark_udm_pcibp_t pcibp;
|
||||
struct ark_udm_tlp_ps_t tlp_ps;
|
||||
struct ark_udm_rt_cfg_t rt_cfg;
|
||||
int8_t reserved3[(ARK_UDM_EXPECT_SIZE - ARK_UDM_RT_CFG) -
|
||||
sizeof(struct ark_udm_rt_cfg_t)];
|
||||
};
|
||||
|
||||
|
||||
int ark_udm_verify(struct ark_udm_t *udm);
|
||||
int ark_udm_stop(struct ark_udm_t *udm, int wait);
|
||||
void ark_udm_start(struct ark_udm_t *udm);
|
||||
int ark_udm_reset(struct ark_udm_t *udm);
|
||||
void ark_udm_configure(struct ark_udm_t *udm,
|
||||
uint32_t headroom,
|
||||
uint32_t dataroom,
|
||||
uint32_t write_interval_ns);
|
||||
void ark_udm_write_addr(struct ark_udm_t *udm, phys_addr_t addr);
|
||||
void ark_udm_stats_reset(struct ark_udm_t *udm);
|
||||
void ark_udm_dump_stats(struct ark_udm_t *udm, const char *msg);
|
||||
void ark_udm_dump_queue_stats(struct ark_udm_t *udm, const char *msg,
|
||||
uint16_t qid);
|
||||
void ark_udm_dump(struct ark_udm_t *udm, const char *msg);
|
||||
void ark_udm_dump_perf(struct ark_udm_t *udm, const char *msg);
|
||||
void ark_udm_dump_setup(struct ark_udm_t *udm, uint16_t q_id);
|
||||
int ark_udm_is_flushed(struct ark_udm_t *udm);
|
||||
|
||||
/* Per queue data */
|
||||
uint64_t ark_udm_dropped(struct ark_udm_t *udm);
|
||||
uint64_t ark_udm_bytes(struct ark_udm_t *udm);
|
||||
uint64_t ark_udm_packets(struct ark_udm_t *udm);
|
||||
|
||||
void ark_udm_queue_stats_reset(struct ark_udm_t *udm);
|
||||
void ark_udm_queue_enable(struct ark_udm_t *udm, int enable);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user