net/ixgbe/base: add functions to get version info
Add common functions for getting OEM product version, option ROM version, and ETrack id. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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@ -4983,6 +4983,117 @@ s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)
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return IXGBE_NOT_IMPLEMENTED;
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}
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/**
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* ixgbe_get_orom_version - Return option ROM from EEPROM
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*
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* @hw: pointer to hardware structure
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* @nvm_ver: pointer to output structure
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*
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* if valid option ROM version, nvm_ver->or_valid set to true
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* else nvm_ver->or_valid is false.
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**/
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void ixgbe_get_orom_version(struct ixgbe_hw *hw,
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struct ixgbe_nvm_version *nvm_ver)
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{
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u16 offset, eeprom_cfg_blkh, eeprom_cfg_blkl;
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nvm_ver->or_valid = false;
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/* Option Rom may or may not be present. Start with pointer */
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hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset);
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/* make sure offset is valid */
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if ((offset == 0x0) || (offset == NVM_INVALID_PTR))
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return;
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hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh);
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hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl);
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/* option rom exists and is valid */
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if ((eeprom_cfg_blkl | eeprom_cfg_blkh) == 0x0 ||
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eeprom_cfg_blkl == NVM_VER_INVALID ||
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eeprom_cfg_blkh == NVM_VER_INVALID)
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return;
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nvm_ver->or_valid = true;
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nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT;
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nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) |
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(eeprom_cfg_blkh >> NVM_OROM_SHIFT);
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nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK;
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}
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/**
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* ixgbe_get_oem_prod_version - Return OEM Product version
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*
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* @hw: pointer to hardware structure
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* @nvm_ver: pointer to output structure
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*
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* if valid OEM product version, nvm_ver->oem_valid set to true
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* else nvm_ver->oem_valid is false.
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**/
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void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
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struct ixgbe_nvm_version *nvm_ver)
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{
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u16 rel_num, prod_ver, mod_len, cap, offset;
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nvm_ver->oem_valid = false;
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hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset);
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/* Return is offset to OEM Product Version block is invalid */
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if (offset == 0x0 && offset == NVM_INVALID_PTR)
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return;
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/* Read product version block */
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hw->eeprom.ops.read(hw, offset, &mod_len);
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hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap);
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/* Return if OEM product version block is invalid */
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if (mod_len != NVM_OEM_PROD_VER_MOD_LEN ||
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(cap & NVM_OEM_PROD_VER_CAP_MASK) != 0x0)
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return;
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hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver);
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hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num);
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/* Return if version is invalid */
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if ((rel_num | prod_ver) == 0x0 ||
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rel_num == NVM_VER_INVALID || prod_ver == NVM_VER_INVALID)
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return;
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nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT;
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nvm_ver->oem_minor = prod_ver & NVM_VER_MASK;
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nvm_ver->oem_release = rel_num;
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nvm_ver->oem_valid = true;
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}
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/**
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* ixgbe_get_etk_id - Return Etrack ID from EEPROM
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*
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* @hw: pointer to hardware structure
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* @nvm_ver: pointer to output structure
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*
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* word read errors will return 0xFFFF
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**/
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void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver)
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{
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u16 etk_id_l, etk_id_h;
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if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l))
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etk_id_l = NVM_VER_INVALID;
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if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h))
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etk_id_h = NVM_VER_INVALID;
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/* The word order for the version format is determined by high order
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* word bit 15.
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*/
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if ((etk_id_h & NVM_ETK_VALID) == 0) {
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nvm_ver->etk_id = etk_id_h;
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nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT);
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} else {
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nvm_ver->etk_id = etk_id_l;
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nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT);
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}
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}
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/**
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* ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg
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@ -183,6 +183,12 @@ bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
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s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
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s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
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void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
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void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
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struct ixgbe_nvm_version *nvm_ver);
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void ixgbe_get_orom_version(struct ixgbe_hw *hw,
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struct ixgbe_nvm_version *nvm_ver);
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void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
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void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
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s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
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@ -303,6 +303,47 @@ struct ixgbe_thermal_sensor_data {
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struct ixgbe_thermal_diode_data sensor[IXGBE_MAX_SENSORS];
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};
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#define NVM_OROM_OFFSET 0x17
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#define NVM_OROM_BLK_LOW 0x83
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#define NVM_OROM_BLK_HI 0x84
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#define NVM_OROM_PATCH_MASK 0xFF
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#define NVM_OROM_SHIFT 8
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#define NVM_VER_MASK 0x00FF /* version mask */
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#define NVM_VER_SHIFT 8 /* version bit shift */
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#define NVM_OEM_PROD_VER_PTR 0x1B /* OEM Product version block pointer */
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#define NVM_OEM_PROD_VER_CAP_OFF 0x1 /* OEM Product version format offset */
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#define NVM_OEM_PROD_VER_OFF_L 0x2 /* OEM Product version offset low */
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#define NVM_OEM_PROD_VER_OFF_H 0x3 /* OEM Product version offset high */
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#define NVM_OEM_PROD_VER_CAP_MASK 0xF /* OEM Product version cap mask */
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#define NVM_OEM_PROD_VER_MOD_LEN 0x3 /* OEM Product version module length */
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#define NVM_ETK_OFF_LOW 0x2D /* version low order word */
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#define NVM_ETK_OFF_HI 0x2E /* version high order word */
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#define NVM_ETK_SHIFT 16 /* high version word shift */
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#define NVM_VER_INVALID 0xFFFF
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#define NVM_ETK_VALID 0x8000
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#define NVM_INVALID_PTR 0xFFFF
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#define NVM_VER_SIZE 32 /* version sting size */
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struct ixgbe_nvm_version {
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u32 etk_id;
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u8 nvm_major;
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u16 nvm_minor;
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u8 nvm_id;
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bool oem_valid;
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u8 oem_major;
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u8 oem_minor;
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u16 oem_release;
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bool or_valid;
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u8 or_major;
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u16 or_build;
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u8 or_patch;
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};
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/* Interrupt Registers */
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#define IXGBE_EICR 0x00800
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#define IXGBE_EICS 0x00808
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@ -570,7 +611,6 @@ struct ixgbe_thermal_sensor_data {
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#define IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK 0x0000ffff /* VXLAN port */
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#define IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK 0xffff0000 /* GENEVE port */
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#define IXGBE_VXLANCTRL_ALL_UDPPORT_MASK 0xffffffff /* GENEVE/VXLAN */
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#define IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT 16
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#define IXGBE_FHFT(_n) (0x09000 + ((_n) * 0x100)) /* Flex host filter table */
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@ -580,7 +620,6 @@ struct ixgbe_thermal_sensor_data {
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/* Four Flexible Filters are supported */
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#define IXGBE_FLEXIBLE_FILTER_COUNT_MAX 4
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/* Six Flexible Filters are supported */
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#define IXGBE_FLEXIBLE_FILTER_COUNT_MAX_6 6
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/* Eight Flexible Filters are supported */
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@ -728,8 +767,6 @@ struct ixgbe_dmac_config {
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#define IXGBE_EEE_RX_LPI_STATUS 0x40000000 /* RX Link in LPI status */
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#define IXGBE_EEE_TX_LPI_STATUS 0x80000000 /* TX Link in LPI status */
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/* Security Control Registers */
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#define IXGBE_SECTXCTRL 0x08800
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#define IXGBE_SECTXSTAT 0x08804
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@ -867,7 +904,6 @@ struct ixgbe_dmac_config {
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#define IXGBE_RTTBCNRTT 0x05150
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#define IXGBE_RTTBCNRD 0x0498C
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/* FCoE DMA Context Registers */
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/* FCoE Direct DMA Context */
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#define IXGBE_FCDDC(_i, _j) (0x20000 + ((_i) * 0x4) + ((_j) * 0x10))
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@ -4222,7 +4258,6 @@ struct ixgbe_hw {
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#define IXGBE_NOT_IMPLEMENTED 0x7FFFFFFF
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#define IXGBE_FUSES0_GROUP(_i) (0x11158 + ((_i) * 4))
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#define IXGBE_FUSES0_300MHZ (1 << 5)
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#define IXGBE_FUSES0_REV_MASK (3 << 6)
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