From cf8a8a8f4896c0885d3996716f73513c4317e545 Mon Sep 17 00:00:00 2001
From: Thomas Monjalon <thomas@monjalon.net>
Date: Wed, 21 Jul 2021 22:37:40 +0800
Subject: [PATCH] vdpa/mlx5: support Sub-Function
RoCE disabling requirement is based on PCI address.
In order to support Sub-Function, a conversion is needed
in the case of an auxiliary device.
SF device can be probed with such devargs string:
auxiliary:mlx5_core.sf.<id>,class=vdpa
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
doc/guides/vdpadevs/mlx5.rst | 12 ++++++++++++
drivers/vdpa/mlx5/mlx5_vdpa.c | 8 ++++++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/doc/guides/vdpadevs/mlx5.rst b/doc/guides/vdpadevs/mlx5.rst
index 9b2f9f12c7..30f0b62eb4 100644
--- a/doc/guides/vdpadevs/mlx5.rst
+++ b/doc/guides/vdpadevs/mlx5.rst
@@ -163,6 +163,18 @@ Driver options
- 0, HW default.
+Devargs example
+^^^^^^^^^^^^^^^
+
+- PCI devargs::
+
+ -a 0000:03:00.2,class=vdpa
+
+- Auxiliary devargs::
+
+ -a auxiliary:mlx5_core.sf.2,class=vdpa
+
+
Error handling
^^^^^^^^^^^^^^
diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c
index 9c9a552ba0..6d17d7a6f3 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c
@@ -553,9 +553,13 @@ close:
static int
mlx5_vdpa_roce_disable(struct rte_device *dev)
{
+ char pci_addr[PCI_PRI_STR_SIZE] = { 0 };
+
+ if (mlx5_dev_to_pci_str(dev, pci_addr, sizeof(pci_addr)) < 0)
+ return -rte_errno;
/* Firstly try to disable ROCE by Netlink and fallback to sysfs. */
- if (mlx5_vdpa_nl_roce_disable(dev->name) != 0 &&
- mlx5_vdpa_sys_roce_disable(dev->name) != 0)
+ if (mlx5_vdpa_nl_roce_disable(pci_addr) != 0 &&
+ mlx5_vdpa_sys_roce_disable(pci_addr) != 0)
return -rte_errno;
return 0;
}