net/i40e: fix interrupt throttling setting in PF
As no matter the PF host driver is DPDK or other kernel drivers,
they are sharing the same virtchnnl interfaces to communicate to VFs.
To follow the generic interface, DPDK PF need to set Interrupt
Throttling (ITR) index according to the rxitr_idx from virtchnnl
instead of ITR_NONE.
Fixes: 6d59e4ea74
("net/i40e: change version number to support Linux VF")
Cc: stable@dpdk.org
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
This commit is contained in:
parent
975ffea6f6
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cfd662d22e
@ -1596,7 +1596,8 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
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static void
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static void
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__vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
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__vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
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int base_queue, int nb_queue)
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int base_queue, int nb_queue,
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uint16_t itr_idx)
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{
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{
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int i;
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int i;
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uint32_t val;
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uint32_t val;
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@ -1605,7 +1606,7 @@ __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
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/* Bind all RX queues to allocated MSIX interrupt */
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/* Bind all RX queues to allocated MSIX interrupt */
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for (i = 0; i < nb_queue; i++) {
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for (i = 0; i < nb_queue; i++) {
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val = (msix_vect << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
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val = (msix_vect << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
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I40E_QINT_RQCTL_ITR_INDX_MASK |
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itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT |
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((base_queue + i + 1) <<
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((base_queue + i + 1) <<
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I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
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I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
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(0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
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(0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
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@ -1668,7 +1669,7 @@ __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
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}
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}
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void
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void
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i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
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i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)
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{
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{
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struct rte_eth_dev *dev = vsi->adapter->eth_dev;
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struct rte_eth_dev *dev = vsi->adapter->eth_dev;
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
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struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
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@ -1696,7 +1697,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
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/* VF bind interrupt */
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/* VF bind interrupt */
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if (vsi->type == I40E_VSI_SRIOV) {
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if (vsi->type == I40E_VSI_SRIOV) {
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__vsi_queues_bind_intr(vsi, msix_vect,
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__vsi_queues_bind_intr(vsi, msix_vect,
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vsi->base_queue, vsi->nb_qps);
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vsi->base_queue, vsi->nb_qps,
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itr_idx);
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return;
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return;
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}
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}
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@ -1722,7 +1724,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
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/* no enough msix_vect, map all to one */
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/* no enough msix_vect, map all to one */
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__vsi_queues_bind_intr(vsi, msix_vect,
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__vsi_queues_bind_intr(vsi, msix_vect,
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vsi->base_queue + i,
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vsi->base_queue + i,
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vsi->nb_used_qps - i);
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vsi->nb_used_qps - i,
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itr_idx);
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for (; !!record && i < vsi->nb_used_qps; i++)
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for (; !!record && i < vsi->nb_used_qps; i++)
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intr_handle->intr_vec[queue_idx + i] =
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intr_handle->intr_vec[queue_idx + i] =
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msix_vect;
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msix_vect;
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@ -1730,7 +1733,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
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}
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}
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/* 1:1 queue/msix_vect mapping */
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/* 1:1 queue/msix_vect mapping */
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__vsi_queues_bind_intr(vsi, msix_vect,
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__vsi_queues_bind_intr(vsi, msix_vect,
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vsi->base_queue + i, 1);
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vsi->base_queue + i, 1,
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itr_idx);
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if (!!record)
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if (!!record)
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intr_handle->intr_vec[queue_idx + i] = msix_vect;
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intr_handle->intr_vec[queue_idx + i] = msix_vect;
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@ -1959,19 +1963,21 @@ i40e_dev_start(struct rte_eth_dev *dev)
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/* Map queues with MSIX interrupt */
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/* Map queues with MSIX interrupt */
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main_vsi->nb_used_qps = dev->data->nb_rx_queues -
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main_vsi->nb_used_qps = dev->data->nb_rx_queues -
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pf->nb_cfg_vmdq_vsi * RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;
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pf->nb_cfg_vmdq_vsi * RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;
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i40e_vsi_queues_bind_intr(main_vsi);
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i40e_vsi_queues_bind_intr(main_vsi, I40E_ITR_INDEX_DEFAULT);
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i40e_vsi_enable_queues_intr(main_vsi);
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i40e_vsi_enable_queues_intr(main_vsi);
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/* Map VMDQ VSI queues with MSIX interrupt */
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/* Map VMDQ VSI queues with MSIX interrupt */
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for (i = 0; i < pf->nb_cfg_vmdq_vsi; i++) {
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for (i = 0; i < pf->nb_cfg_vmdq_vsi; i++) {
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pf->vmdq[i].vsi->nb_used_qps = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;
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pf->vmdq[i].vsi->nb_used_qps = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM;
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i40e_vsi_queues_bind_intr(pf->vmdq[i].vsi);
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i40e_vsi_queues_bind_intr(pf->vmdq[i].vsi,
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I40E_ITR_INDEX_DEFAULT);
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i40e_vsi_enable_queues_intr(pf->vmdq[i].vsi);
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i40e_vsi_enable_queues_intr(pf->vmdq[i].vsi);
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}
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}
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/* enable FDIR MSIX interrupt */
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/* enable FDIR MSIX interrupt */
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if (pf->fdir.fdir_vsi) {
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if (pf->fdir.fdir_vsi) {
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i40e_vsi_queues_bind_intr(pf->fdir.fdir_vsi);
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i40e_vsi_queues_bind_intr(pf->fdir.fdir_vsi,
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I40E_ITR_INDEX_NONE);
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i40e_vsi_enable_queues_intr(pf->fdir.fdir_vsi);
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i40e_vsi_enable_queues_intr(pf->fdir.fdir_vsi);
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}
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}
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@ -186,9 +186,9 @@ enum i40e_flxpld_layer_idx {
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/* Default queue interrupt throttling time in microseconds */
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/* Default queue interrupt throttling time in microseconds */
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#define I40E_ITR_INDEX_DEFAULT 0
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#define I40E_ITR_INDEX_DEFAULT 0
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#define I40E_ITR_INDEX_NONE 3
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#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
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#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
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#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
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#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
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/* Special FW support this floating VEB feature */
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/* Special FW support this floating VEB feature */
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#define FLOATING_VEB_SUPPORTED_FW_MAJ 5
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#define FLOATING_VEB_SUPPORTED_FW_MAJ 5
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#define FLOATING_VEB_SUPPORTED_FW_MIN 0
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#define FLOATING_VEB_SUPPORTED_FW_MIN 0
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@ -919,7 +919,7 @@ void i40e_update_vsi_stats(struct i40e_vsi *vsi);
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void i40e_pf_disable_irq0(struct i40e_hw *hw);
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void i40e_pf_disable_irq0(struct i40e_hw *hw);
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void i40e_pf_enable_irq0(struct i40e_hw *hw);
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void i40e_pf_enable_irq0(struct i40e_hw *hw);
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int i40e_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete);
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int i40e_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete);
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void i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi);
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void i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx);
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void i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi);
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void i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi);
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int i40e_vsi_vlan_pvid_set(struct i40e_vsi *vsi,
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int i40e_vsi_vlan_pvid_set(struct i40e_vsi *vsi,
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struct i40e_vsi_vlan_pvid_info *info);
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struct i40e_vsi_vlan_pvid_info *info);
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@ -647,7 +647,7 @@ i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
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(struct virtchnl_irq_map_info *)msg;
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(struct virtchnl_irq_map_info *)msg;
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struct virtchnl_vector_map *map;
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struct virtchnl_vector_map *map;
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int i;
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int i;
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uint16_t vector_id;
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uint16_t vector_id, itr_idx;
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unsigned long qbit_max;
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unsigned long qbit_max;
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if (!b_op) {
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if (!b_op) {
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@ -674,12 +674,13 @@ i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
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vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
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vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
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vf->vsi->nb_msix = irqmap->num_vectors;
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vf->vsi->nb_msix = irqmap->num_vectors;
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vf->vsi->nb_used_qps = vf->vsi->nb_qps;
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vf->vsi->nb_used_qps = vf->vsi->nb_qps;
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itr_idx = irqmap->vecmap[0].rxitr_idx;
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/* Don't care how the TX/RX queue mapping with this vector.
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/* Don't care how the TX/RX queue mapping with this vector.
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* Link all VF RX queues together. Only did mapping work.
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* Link all VF RX queues together. Only did mapping work.
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* VF can disable/enable the intr by itself.
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* VF can disable/enable the intr by itself.
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*/
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*/
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i40e_vsi_queues_bind_intr(vf->vsi);
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i40e_vsi_queues_bind_intr(vf->vsi, itr_idx);
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goto send_msg;
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goto send_msg;
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}
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}
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